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igb: add support for reporting 5GT/s during probe on PCIe Gen2

PATCH In review Jeff Kirsher 3 participants 3 messages Apr 9, 2010 – Apr 13, 2010

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Jeff Kirsher

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#0 lore raw

PATCH 1/1 igb: add support for reporting 5GT/s during probe on PCIe Gen2

From: Alexander Duyck <[email protected]>

This change corrects the fact that we were not reporting Gen2 link speeds when we were in fact connected at Gen2 rates.

Signed-off-by Alexander Duyck <[email protected]>
Signed-off-by Jeff Kirsher <[email protected]>

---

 drivers/net/igb/e1000_defines.h |    3 +++
 drivers/net/igb/e1000_mac.c     |   19 ++++++++++++++++---
 drivers/net/igb/igb_main.c      |    1 +
 3 files changed, 20 insertions(+), 3 deletions(-)
drivers/net/igb/e1000_defines.h +3 -0
index 31d24e0..8e440e8 100644
@@ -615,6 +615,9 @@
 
 #define PCIE_LINK_WIDTH_MASK         0x3F0
 #define PCIE_LINK_WIDTH_SHIFT        4
+#define PCIE_LINK_SPEED_MASK         0x0F
+#define PCIE_LINK_SPEED_2500         0x01
+#define PCIE_LINK_SPEED_5000         0x02
 #define PCIE_DEVICE_CONTROL2_16ms    0x0005
 
 #define PHY_REVISION_MASK      0xFFFFFFF0
drivers/net/igb/e1000_mac.c +16 -3
index be8d010..4371835 100644
@@ -53,17 +53,30 @@ s32 igb_get_bus_info_pcie(struct e1000_hw *hw)
 	u16 pcie_link_status;
 
 	bus->type = e1000_bus_type_pci_express;
-	bus->speed = e1000_bus_speed_2500;
 
 	ret_val = igb_read_pcie_cap_reg(hw,
 					  PCIE_LINK_STATUS,
 					  &pcie_link_status);
-	if (ret_val)
+	if (ret_val) {
 		bus->width = e1000_bus_width_unknown;
-	else
+		bus->speed = e1000_bus_speed_unknown;
+	} else {
+		switch (pcie_link_status & PCIE_LINK_SPEED_MASK) {
+		case PCIE_LINK_SPEED_2500:
+			bus->speed = e1000_bus_speed_2500;
+			break;
+		case PCIE_LINK_SPEED_5000:
+			bus->speed = e1000_bus_speed_5000;
+			break;
+		default:
+			bus->speed = e1000_bus_speed_unknown;
+			break;
+		}
+
 		bus->width = (enum e1000_bus_width)((pcie_link_status &
 						     PCIE_LINK_WIDTH_MASK) >>
 						     PCIE_LINK_WIDTH_SHIFT);
+	}
 
 	reg = rd32(E1000_STATUS);
 	bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
drivers/net/igb/igb_main.c +1 -0
index 876a49b..a3c79ad 100644
@@ -1637,6 +1637,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
 	dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
 		 netdev->name,
 		 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
+		  (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
 		                                            "unknown"),
 		 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
 		  (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
#1 lore raw
Quoted 19 lines · Jeff Kirsher

From: Alexander Duyck <[email protected]>

This change corrects the fact that we were not reporting Gen2 link speeds when we were in fact connected at Gen2 rates.

Signed-off-by Alexander Duyck <[email protected]>
Signed-off-by Jeff Kirsher <[email protected]>

---

 drivers/net/igb/e1000_defines.h |    3 +++
 drivers/net/igb/e1000_mac.c     |   19 ++++++++++++++++---
 drivers/net/igb/igb_main.c      |    1 +
 3 files changed, 20 insertions(+), 3 deletions(-)
drivers/net/igb/e1000_defines.h +0 -0
index 31d24e0..8e440e8 100644

drivers/net/igb/e1000_defines.h line 621

Quoted 7 lines
drivers/net/igb/e1000_defines.h +3 -0
@@ -615,6 +615,9 @@
 
 #define PCIE_LINK_WIDTH_MASK         0x3F0
 #define PCIE_LINK_WIDTH_SHIFT        4
+#define PCIE_LINK_SPEED_MASK         0x0F
+#define PCIE_LINK_SPEED_2500         0x01
+#define PCIE_LINK_SPEED_5000         0x02
 #define PCIE_DEVICE_CONTROL2_16ms    0x0005

[...]

These generic definitions belong in <linux/pci_regs.h>; in fact some of it is already there.

Ben.

Signature · 3 lines
Ben Hutchings, Senior Software Engineer, Solarflare Communications
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.
maintainer
#2 lore raw

From: Ben Hutchings <[email protected]>
Date: Sat, 10 Apr 2010 00:54:16 +0100

Quoted 29 lines · Jeff Kirsher
Quoted 26 lines

From: Alexander Duyck <[email protected]>

This change corrects the fact that we were not reporting Gen2 link speeds when we were in fact connected at Gen2 rates.

Signed-off-by Alexander Duyck <[email protected]>
Signed-off-by Jeff Kirsher <[email protected]>

---

 drivers/net/igb/e1000_defines.h |    3 +++
 drivers/net/igb/e1000_mac.c     |   19 ++++++++++++++++---
 drivers/net/igb/igb_main.c      |    1 +
 3 files changed, 20 insertions(+), 3 deletions(-)
drivers/net/igb/e1000_defines.h +3 -0
index 31d24e0..8e440e8 100644
@@ -615,6 +615,9 @@
 
 #define PCIE_LINK_WIDTH_MASK         0x3F0
 #define PCIE_LINK_WIDTH_SHIFT        4
+#define PCIE_LINK_SPEED_MASK         0x0F
+#define PCIE_LINK_SPEED_2500         0x01
+#define PCIE_LINK_SPEED_5000         0x02
 #define PCIE_DEVICE_CONTROL2_16ms    0x0005

[...]

Quoted 2 lines

These generic definitions belong in <linux/pci_regs.h>; in fact some of it is already there.

Agreed, please put these in the PCI header file.