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hw: better i440 emulation

PATCH In review Bernhard M. Wiedemann 3 participants 4 messages Apr 19, 2010 – May 4, 2010

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#0 lore raw

PATCH 1/1 hw: better i440 emulation

attached is a tested 0.12.3-version of an old patch
http://xenon.stanford.edu/~eswierk/misc/qemu-linuxbios/qemu-piix-ram-size.patch
that together with
http://www.mail-archive.com/[email protected]/msg02390.html
(which is already in coreboot trunk) allows coreboot BIOS to autodetect the amount of RAM within qemu/kvm from a register in i440 northbridge.

The message on the old patch states:
Unfortunately the current version of qemu does not set these registers, but I have patched qemu so that it emulates the i440 more faithfully in this regard.

new patch is also available at
http://www.zq1.de/~bernhard/linux/qemu-0.12.3-piix-ram-size.patch

Please discuss or apply this patch.

regards
Bernhard M. Wiedemann
--
software engineer

qpatch/hw/pc.c renamed from hw/pc.c +1 -1
diff -ru ./hw/pc.c ../qpatch/hw/pc.c
@@ -1130,7 +1130,7 @@
     }
 
     if (pci_enabled) {
-        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
+        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
     } else {
         pci_bus = NULL;
         isa_bus_new(NULL);
qpatch/hw/pc.h renamed from hw/pc.h +1 -1
diff -ru ./hw/pc.h ../qpatch/hw/pc.h
@@ -129,7 +129,7 @@
 struct PCII440FXState;
 typedef struct PCII440FXState PCII440FXState;
 
-PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic);
+PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, int ram_size);
 void i440fx_set_smm(PCII440FXState *d, int val);
 void i440fx_init_memory_mappings(PCII440FXState *d);
 
qpatch/hw/piix_pci.c renamed from hw/piix_pci.c +6 -1
diff -ru ./hw/piix_pci.c ../qpatch/hw/piix_pci.c
@@ -209,7 +209,7 @@
 
 static PIIX3State *piix3_dev;
 
-PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *pic)
+PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *pic, int ram_size)
 {
     DeviceState *dev;
     PCIBus *b;
@@ -236,6 +236,11 @@
 
     piix3_dev = piix3;
 
+    ram_size = ram_size / 8 / 1024 / 1024;
+    if (ram_size > 255)
+        ram_size = 255;
+    (*pi440fx_state)->dev.config[0x57]=ram_size;
+
     return b;
 }
 
#1 lore raw

Am 19.04.2010 um 17:47 schrieb Bernhard M. Wiedemann:

Quoted 10 lines

attached is a tested 0.12.3-version of an old patch
http://xenon.stanford.edu/~eswierk/misc/qemu-linuxbios/qemu-piix-ram-size.patch
that together with
http://www.mail-archive.com/[email protected]/msg02390.html
(which is already in coreboot trunk) allows coreboot BIOS to autodetect the amount of RAM within qemu/kvm from a register in i440 northbridge.

The message on the old patch states:
Unfortunately the current version of qemu does not set these registers, but I have patched qemu so that it emulates the i440 more faithfully in this regard.

Both the original patch and yours are missing a Signed-off-by statement.
Generally preferred are patches against git master branch with a ready-to-commit summary, sent with git-send-email.

Andreas

#2 lore raw

PATCH 1/1 hw: better i440 emulation

updated version of an old patch
http://xenon.stanford.edu/~eswierk/misc/qemu-linuxbios/qemu-piix-ram-size.patch
that together with
http://www.mail-archive.com/[email protected]/msg02390.html
(which is already in coreboot trunk) allows coreboot to autodetect the amount of RAM within qemu/kvm from a register in i440 northbridge.

The message on the old patch states:
Unfortunately the current version of qemu does not set these registers, but I have patched qemu so that it emulates the i440 more faithfully in this regard.

---
 hw/pc.c       |    2 +-
 hw/pc.h       |    2 +-
 hw/piix_pci.c |    7 ++++++-
 3 files changed, 8 insertions(+), 3 deletions(-)
hw/pc.c +1 -1
index b797f21..eec0864 100644
@@ -926,7 +926,7 @@ static void pc_init1(ram_addr_t ram_size,
     isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 
     if (pci_enabled) {
-        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
+        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
     } else {
         pci_bus = NULL;
         isa_bus_new(NULL);
hw/pc.h +1 -1
index 5f86b37..d11a576 100644
@@ -107,7 +107,7 @@ int pcspk_audio_init(qemu_irq *pic);
 struct PCII440FXState;
 typedef struct PCII440FXState PCII440FXState;
 
-PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic);
+PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, int ram_size);
 void i440fx_set_smm(PCII440FXState *d, int val);
 void i440fx_init_memory_mappings(PCII440FXState *d);
 
hw/piix_pci.c +6 -1
index cd12212..97519db 100644
@@ -213,7 +213,7 @@ static int i440fx_initfn(PCIDevice *dev)
     return 0;
 }
 
-PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *pic)
+PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *pic, int ram_size)
 {
     DeviceState *dev;
     PCIBus *b;
@@ -238,6 +238,11 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *
 
     *piix3_devfn = piix3->dev.devfn;
 
+    ram_size = ram_size / 8 / 1024 / 1024;
+    if (ram_size > 255)
+        ram_size = 255;
+    (*pi440fx_state)->dev.config[0x57]=ram_size;
+
     return b;
 }
 
Signature · 1 line
1.5.6.5
#3 lore raw
Quoted 6 lines · Bernhard M. Wiedemann

updated version of an old patch
http://xenon.stanford.edu/~eswierk/misc/qemu-linuxbios/qemu-piix-ram-size.patch
that together with
http://www.mail-archive.com/[email protected]/msg02390.html
(which is already in coreboot trunk) allows coreboot to autodetect the amount of RAM within qemu/kvm from a register in i440 northbridge.

Quoted 7 lines

The message on the old patch states:
Unfortunately the current version of qemu does not set these registers, but I have patched qemu so that it emulates the i440 more faithfully in this regard.

Applied. Thanks.

Regards,

Anthony Liguori