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ST-Ericsson Ux500 support

PATCH New Rabin Vincent 6 participants 22 messages Apr 8, 2010 – Apr 20, 2010

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#0 lore raw

v2 cover ST-Ericsson Ux500 support

v2: Addressed review comments.

This series adds base support for ST-Ericsson's Ux500 series of Cortex-A9 based SoCs. Several peripherals are shared with the Nomadik family, for which support already exists in U-Boot.

Rabin Vincent (13):
Nomadik: move nomadik.h to asm/arch/nhk8815.h
Nomadik: timer: push down single-use macros
Nomadik: timer: remove header and use C structs
Nomadik: move timer code to drivers/misc
Nomadik: move gpio driver to drivers/gpio
nomadik-gpio: check for invalid gpio numbers
nomadik-gpio: get base address from platform code
nomadik-mtu: support configurable clock rates
arm: add Cortex A9 support
ARM Cortex A9: ifdef code calling lowlevel init
ux500: add SoC-specific code
pl01x: add support for Ux500 variant of pl011
mop500: add board-specific files

 MAINTAINERS                                        |    4 +
 MAKEALL                                            |    9 +
 Makefile                                           |    9 +-
 board/st/nhk8815/nhk8815.c                         |   11 +-
 board/stericsson/mop500/Makefile                   |   54 +++
 board/stericsson/mop500/config.mk                  |   23 ++
 board/stericsson/mop500/mop500.c                   |   72 ++++
 cpu/arm926ejs/nomadik/Makefile                     |    1 -
 cpu/arm_cortexa9/Makefile                          |   47 +++
 cpu/arm_cortexa9/config.mk                         |   33 ++
 cpu/arm_cortexa9/cpu.c                             |   83 ++++
 cpu/arm_cortexa9/start.S                           |  394 ++++++++++++++++++++
 cpu/arm_cortexa9/u-boot.lds                        |   58 +++
 cpu/arm_cortexa9/ux500/Makefile                    |   45 +++
 .../gpio.h => cpu/arm_cortexa9/ux500/clock.c       |   48 ++-
 .../gpio.h => cpu/arm_cortexa9/ux500/cpu.c         |   45 ++-
 drivers/gpio/Makefile                              |    1 +
 .../nomadik/gpio.c => drivers/gpio/nomadik_gpio.c  |   28 +-
 drivers/misc/Makefile                              |    1 +
 .../nomadik/timer.c => drivers/misc/nomadik_mtu.c  |   65 +++-
 drivers/serial/serial_pl01x.c                      |    8 +
 drivers/serial/serial_pl01x.h                      |    1 +
 include/asm-arm/arch-nomadik/mtu.h                 |   66 ----
 include/asm-arm/arch-nomadik/nmdk8815.h            |   40 ++
 include/asm-arm/arch-ux500/clock.h                 |   80 ++++
 include/asm-arm/arch-ux500/hardware.h              |   72 ++++
 include/configs/mop500.h                           |  108 ++++++
 include/configs/nhk8815.h                          |   14 +-
 include/nomadik.h                                  |   74 ++--
 29 files changed, 1323 insertions(+), 171 deletions(-)
 create mode 100644 board/stericsson/mop500/Makefile
 create mode 100644 board/stericsson/mop500/config.mk
 create mode 100644 board/stericsson/mop500/mop500.c
 create mode 100644 cpu/arm_cortexa9/Makefile
 create mode 100644 cpu/arm_cortexa9/config.mk
 create mode 100644 cpu/arm_cortexa9/cpu.c
 create mode 100644 cpu/arm_cortexa9/start.S
 create mode 100644 cpu/arm_cortexa9/u-boot.lds
 create mode 100644 cpu/arm_cortexa9/ux500/Makefile
 copy include/asm-arm/arch-nomadik/gpio.h => cpu/arm_cortexa9/ux500/clock.c (51%)
 rename include/asm-arm/arch-nomadik/gpio.h => cpu/arm_cortexa9/ux500/cpu.c (55%)
 rename cpu/arm926ejs/nomadik/gpio.c => drivers/gpio/nomadik_gpio.c (90%)
 rename cpu/arm926ejs/nomadik/timer.c => drivers/misc/nomadik_mtu.c (57%)
 delete mode 100644 include/asm-arm/arch-nomadik/mtu.h
 create mode 100644 include/asm-arm/arch-nomadik/nmdk8815.h
 create mode 100644 include/asm-arm/arch-ux500/clock.h
 create mode 100644 include/asm-arm/arch-ux500/hardware.h
 create mode 100644 include/configs/mop500.h
#1 lore raw

PATCH v2 1/13 Nomadik: move nomadik.h to asm/arch/nhk8815.h

It contains only 8815-specific addresses, so move it to an appropriate location and name, freeing up the nomadik.h name for common Nomadik-family peripherals.

---
 .../{nomadik.h => asm-arm/arch-nomadik/nmdk8815.h} |    0
 include/configs/nhk8815.h                          |    2 +-
 2 files changed, 1 insertions(+), 1 deletions(-)
 rename include/{nomadik.h => asm-arm/arch-nomadik/nmdk8815.h} (100%)
include/asm-arm/arch-nomadik/nmdk8815.h renamed from include/nomadik.h +0 -0
similarity index 100%
rename from include/nomadik.h
rename to include/asm-arm/arch-nomadik/nmdk8815.h
include/configs/nhk8815.h +1 -1
index 2b640dc..376f43d 100644
@@ -26,7 +26,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <nomadik.h>
+#include <asm/arch/nmdk8815.h>
 
 #define CONFIG_ARM926EJS
 #define CONFIG_NOMADIK
Signature · 1 line
1.7.0
#2 lore raw

PATCH v2 2/13 Nomadik: timer: push down single-use macros

Eliminate some single-use macros. USEC_TO_COUNT and COUNT_TO_USEC are replaced in a later patch.

---
 cpu/arm926ejs/nomadik/timer.c |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)
cpu/arm926ejs/nomadik/timer.c +2 -3
index 1d98ef3..fdab650 100644
@@ -31,8 +31,6 @@
 #define TIMER_CLOCK		(24 * 100 * 1000)
 #define COUNT_TO_USEC(x)	((x) * 5 / 12)	/* overflows at 6min */
 #define USEC_TO_COUNT(x)	((x) * 12 / 5)	/* overflows at 6min */
-#define TICKS_PER_HZ		(TIMER_CLOCK / CONFIG_SYS_HZ)
-#define TICKS_TO_HZ(x)		((x) / TICKS_PER_HZ)
 
 /* macro to read the decrementing 32 bit timer as an increasing count */
 #define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
@@ -64,7 +62,8 @@ void reset_timer(void)
 /* Return how many HZ passed since "base" */
 ulong get_timer(ulong base)
 {
-	return  TICKS_TO_HZ(READ_TIMER()) - base;
+	ulong hz = READ_TIMER() / (TIMER_CLOCK / CONFIG_SYS_HZ);
+	return hz - base;
 }
 
 /* Delay x useconds */
Signature · 1 line
1.7.0
#3 lore raw

PATCH v2 3/13 Nomadik: timer: remove header and use C structs

Eliminate register address #defines by using C structs, and move the rest of the header contents into timer.c.

---
 cpu/arm926ejs/nomadik/timer.c      |   45 ++++++++++++++++++------
 include/asm-arm/arch-nomadik/mtu.h |   66 ------------------------------------
 2 files changed, 34 insertions(+), 77 deletions(-)
 delete mode 100644 include/asm-arm/arch-nomadik/mtu.h
cpu/arm926ejs/nomadik/timer.c +34 -11
index fdab650..0aeeb63 100644
@@ -22,7 +22,25 @@
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/mtu.h>
+
+struct mtu {
+	uint	imsc;
+	uint	ris;
+	uint	mis;
+	uint	icr;
+	struct mtu_timer {
+		uint	lr;
+		uint	val;
+		uint	cr;
+		uint	bglr;
+	} timer[4];
+};
+
+#define MTU_CRn_ENA		0x80
+#define MTU_CRn_PRESCALE_1	0x00
+#define MTU_CRn_PRESCALE_16	0x04
+#define MTU_CRn_PRESCALE_256	0x08
+#define MTU_CRn_32BITS		0x02
 
 /*
  * The timer is a decrementer, we'll left it free running at 2.4MHz.
@@ -32,14 +50,19 @@
 #define COUNT_TO_USEC(x)	((x) * 5 / 12)	/* overflows at 6min */
 #define USEC_TO_COUNT(x)	((x) * 12 / 5)	/* overflows at 6min */
 
-/* macro to read the decrementing 32 bit timer as an increasing count */
-#define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
+static const struct mtu_timer *timer
+	= &((struct mtu *) CONFIG_SYS_TIMERBASE)->timer[0];
+
+/* read the decrementing 32 bit timer as an increasing count */
+static ulong read_timer(void)
+{
+	return 0 - readl(&timer->val);
+}
 
 /* Configure a free-running, auto-wrap counter with no prescaler */
 int timer_init(void)
 {
-	writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
-	       CONFIG_SYS_TIMERBASE + MTU_CR(0));
+	writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS, &timer->cr);
 	reset_timer();
 	return 0;
 }
@@ -48,21 +71,21 @@ int timer_init(void)
 void reset_timer(void)
 {
 	ulong val;
-	writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0));
+	writel(0, &timer->lr);
 	/*
 	 * The load-register isn't really immediate: it changes on clock
 	 * edges, so we must wait for our newly-written value to appear.
 	 * Since we might miss reading 0, wait for any change in value.
 	 */
-	val = READ_TIMER();
-	while (READ_TIMER() == val)
+	val = read_timer();
+	while (read_timer() == val)
 		;
 }
 
 /* Return how many HZ passed since "base" */
 ulong get_timer(ulong base)
 {
-	ulong hz = READ_TIMER() / (TIMER_CLOCK / CONFIG_SYS_HZ);
+	ulong hz = read_timer() / (TIMER_CLOCK / CONFIG_SYS_HZ);
 	return hz - base;
 }
 
@@ -71,8 +94,8 @@ void __udelay(unsigned long usec)
 {
 	ulong ini, end;
 
-	ini = READ_TIMER();
+	ini = read_timer();
 	end = ini + USEC_TO_COUNT(usec);
-	while ((signed)(end - READ_TIMER()) > 0)
+	while ((signed)(end - read_timer()) > 0)
 		;
 }
include/asm-arm/arch-nomadik/mtu.h deleted +0 -66

66 lines not on this page · raw message

Signature · 1 line
1.7.0
#4 lore raw

PATCH v2 4/13 Nomadik: move timer code to drivers/misc

The Nomadik MTU driver will also be used on the U8500 SoC, so move it out of platform-specific code.

---
 cpu/arm926ejs/nomadik/Makefile                     |    2 +-
 drivers/misc/Makefile                              |    1 +
 .../nomadik/timer.c => drivers/misc/nomadik_mtu.c  |    0
 include/configs/nhk8815.h                          |    1 +
 4 files changed, 3 insertions(+), 1 deletions(-)
 rename cpu/arm926ejs/nomadik/timer.c => drivers/misc/nomadik_mtu.c (100%)
cpu/arm926ejs/nomadik/Makefile +1 -1
index 0fc9f2a..180db8b 100644
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).a
 
-COBJS	= timer.o gpio.o
+COBJS	= gpio.o
 SOBJS	= reset.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
drivers/misc/Makefile +1 -0
index f6df60f..5c0c6f3 100644
@@ -28,6 +28,7 @@ LIB	:= $(obj)libmisc.a
 COBJS-$(CONFIG_ALI152X) += ali512x.o
 COBJS-$(CONFIG_DS4510)  += ds4510.o
 COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
+COBJS-$(CONFIG_NOMADIK_MTU) += nomadik_mtu.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
 COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
drivers/misc/nomadik_mtu.c renamed from cpu/arm926ejs/nomadik/timer.c +0 -0
similarity index 100%
rename from cpu/arm926ejs/nomadik/timer.c
rename to drivers/misc/nomadik_mtu.c
include/configs/nhk8815.h +1 -0
index 376f43d..d84e787 100644
@@ -97,6 +97,7 @@
 /* timing informazion */
 #define CONFIG_SYS_HZ		1000 /* Mandatory... */
 #define CONFIG_SYS_TIMERBASE	0x101E2000
+#define CONFIG_NOMADIK_MTU
 
 /* serial port (PL011) configuration */
 #define CONFIG_PL011_SERIAL
Signature · 1 line
1.7.0
#5 lore raw

PATCH v2 5/13 Nomadik: move gpio driver to drivers/gpio

The Nomadik GPIO driver will also be used on the U8500 SoC, so move it out of platform-specific code.

---
 board/st/nhk8815/nhk8815.c                         |    2 +-
 cpu/arm926ejs/nomadik/Makefile                     |    1 -
 drivers/gpio/Makefile                              |    1 +
 .../nomadik/gpio.c => drivers/gpio/nomadik_gpio.c  |    2 +-
 include/configs/nhk8815.h                          |    7 +++++--
 include/{asm-arm/arch-nomadik/gpio.h => nomadik.h} |    0
 6 files changed, 8 insertions(+), 5 deletions(-)
 rename cpu/arm926ejs/nomadik/gpio.c => drivers/gpio/nomadik_gpio.c (98%)
 rename include/{asm-arm/arch-nomadik/gpio.h => nomadik.h} (100%)
board/st/nhk8815/nhk8815.c +1 -1
index faef810..fc5d3b8 100644
@@ -28,7 +28,7 @@
 #include <common.h>
 #include <netdev.h>
 #include <asm/io.h>
-#include <asm/arch/gpio.h>
+#include <nomadik.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
cpu/arm926ejs/nomadik/Makefile +0 -1
index 180db8b..35550d7 100644
@@ -25,7 +25,6 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).a
 
-COBJS	= gpio.o
 SOBJS	= reset.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
drivers/gpio/Makefile +1 -0
index d966082..d84f81e 100644
@@ -28,6 +28,7 @@ LIB 	:= $(obj)libgpio.a
 COBJS-$(CONFIG_AT91_GPIO)	+= at91_gpio.o
 COBJS-$(CONFIG_KIRKWOOD_GPIO)	+= kw_gpio.o
 COBJS-$(CONFIG_MX31_GPIO)	+= mx31_gpio.o
+COBJS-$(CONFIG_NOMADIK_GPIO)	+= nomadik_gpio.o
 COBJS-$(CONFIG_PCA953X)		+= pca953x.o
 
 COBJS	:= $(COBJS-y)
drivers/gpio/nomadik_gpio.c renamed from cpu/arm926ejs/nomadik/gpio.c +1 -1
similarity index 98%
rename from cpu/arm926ejs/nomadik/gpio.c
rename to drivers/gpio/nomadik_gpio.c
index 62a375b..670b684 100644
@@ -22,7 +22,7 @@
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/gpio.h>
+#include <nomadik.h>
 
 static unsigned long gpio_base[4] = {
 	NOMADIK_GPIO0_BASE,
include/configs/nhk8815.h +5 -2
index d84e787..f882715 100644
@@ -99,6 +99,9 @@
 #define CONFIG_SYS_TIMERBASE	0x101E2000
 #define CONFIG_NOMADIK_MTU
 
+/* GPIO */
+#define CONFIG_NOMADIK_GPIO
+
 /* serial port (PL011) configuration */
 #define CONFIG_PL011_SERIAL
 #define CONFIG_CONS_INDEX	1
@@ -110,9 +113,9 @@
 #define CONFIG_PL01x_PORTS	{ (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
 #define CONFIG_PL011_CLOCK	48000000
 
-/* i2c, for the port extenders (uses gpio.c in board directory) */
+/* i2c, for the port extenders */
 #ifndef __ASSEMBLY__
-#include <asm/arch/gpio.h>
+#include <nomadik.h>
 #define CONFIG_CMD_I2C
 #define CONFIG_SOFT_I2C
 #define CONFIG_SYS_I2C_SPEED	400000
include/nomadik.h renamed from include/asm-arm/arch-nomadik/gpio.h +0 -0
similarity index 100%
rename from include/asm-arm/arch-nomadik/gpio.h
rename to include/nomadik.h
Signature · 1 line
1.7.0
#6 lore raw

PATCH v2 6/13 nomadik-gpio: check for invalid gpio numbers

---
 drivers/gpio/nomadik_gpio.c |   17 +++++++++++++++++
 1 files changed, 17 insertions(+), 0 deletions(-)
drivers/gpio/nomadik_gpio.c +17 -0
index 670b684..d084235 100644
@@ -45,6 +45,11 @@ enum gpio_registers {
 
 static inline unsigned long gpio_to_base(int gpio)
 {
+	if ((gpio / 32) >= ARRAY_SIZE(gpio_base)) {
+		printf("nomadik-gpio: invalid gpio %d\n", gpio);
+		return 0;
+	}
+
 	return gpio_base[gpio / 32];
 }
 
@@ -59,6 +64,9 @@ void nmk_gpio_af(int gpio, int alternate_function)
 	u32 bit = gpio_to_bit(gpio);
 	u32 afunc, bfunc;
 
+	if (!base)
+		return;
+
 	/* alternate function is 0..3, with one bit per register */
 	afunc = readl(base + GPIO_AFSLA) & ~bit;
 	bfunc = readl(base + GPIO_AFSLB) & ~bit;
@@ -73,6 +81,9 @@ void nmk_gpio_dir(int gpio, int dir)
 	unsigned long base = gpio_to_base(gpio);
 	u32 bit = gpio_to_bit(gpio);
 
+	if (!base)
+		return;
+
 	if (dir)
 		writel(bit, base + GPIO_DIRS);
 	else
@@ -84,6 +95,9 @@ void nmk_gpio_set(int gpio, int val)
 	unsigned long base = gpio_to_base(gpio);
 	u32 bit = gpio_to_bit(gpio);
 
+	if (!base)
+		return;
+
 	if (val)
 		writel(bit, base + GPIO_DATS);
 	else
@@ -95,5 +109,8 @@ int nmk_gpio_get(int gpio)
 	unsigned long base = gpio_to_base(gpio);
 	u32 bit = gpio_to_bit(gpio);
 
+	if (!base)
+		return -1;
+
 	return readl(base + GPIO_DAT) & bit;
 }
Signature · 1 line
1.7.0
#7 lore raw

PATCH v2 7/13 nomadik-gpio: get base address from platform code

Change the Nomadik GPIO driver to get the base addresses from platform specific code, since it will be used on multiple platforms with different base addresses.

---
 board/st/nhk8815/nhk8815.c  |    9 +++++++++
 drivers/gpio/nomadik_gpio.c |   11 ++---------
 include/configs/nhk8815.h   |    1 +
 include/nomadik.h           |    2 ++
 4 files changed, 14 insertions(+), 9 deletions(-)
board/st/nhk8815/nhk8815.c +9 -0
index fc5d3b8..08fb332 100644
@@ -32,6 +32,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_NOMADIK_GPIO
+unsigned long nmk_gpio_base[CONFIG_NOMADIK_GPIO_NUM_BANKS] = {
+	NOMADIK_GPIO0_BASE,
+	NOMADIK_GPIO1_BASE,
+	NOMADIK_GPIO2_BASE,
+	NOMADIK_GPIO3_BASE
+};
+#endif
+
 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 void show_boot_progress(int progress)
 {
drivers/gpio/nomadik_gpio.c +2 -9
index d084235..721c167 100644
@@ -24,13 +24,6 @@
 #include <asm/io.h>
 #include <nomadik.h>
 
-static unsigned long gpio_base[4] = {
-	NOMADIK_GPIO0_BASE,
-	NOMADIK_GPIO1_BASE,
-	NOMADIK_GPIO2_BASE,
-	NOMADIK_GPIO3_BASE
-};
-
 enum gpio_registers {
 	GPIO_DAT =	0x00,		/* data register */
 	GPIO_DATS =	0x04,		/* data set */
@@ -45,12 +38,12 @@ enum gpio_registers {
 
 static inline unsigned long gpio_to_base(int gpio)
 {
-	if ((gpio / 32) >= ARRAY_SIZE(gpio_base)) {
+	if ((gpio / 32) >= ARRAY_SIZE(nmk_gpio_base)) {
 		printf("nomadik-gpio: invalid gpio %d\n", gpio);
 		return 0;
 	}
 
-	return gpio_base[gpio / 32];
+	return nmk_gpio_base[gpio / 32];
 }
 
 static inline u32 gpio_to_bit(int gpio)
include/configs/nhk8815.h +1 -0
index f882715..c7700b3 100644
@@ -101,6 +101,7 @@
 
 /* GPIO */
 #define CONFIG_NOMADIK_GPIO
+#define CONFIG_NOMADIK_GPIO_NUM_BANKS	4
 
 /* serial port (PL011) configuration */
 #define CONFIG_PL011_SERIAL
include/nomadik.h +2 -0
index 1d3c9ce..72f7e88 100644
@@ -34,6 +34,8 @@ enum nmk_af { /* alternate function settings */
 	GPIO_ALT_C
 };
 
+extern unsigned long nmk_gpio_base[CONFIG_NOMADIK_GPIO_NUM_BANKS];
+
 extern void nmk_gpio_af(int gpio, int alternate_function);
 extern void nmk_gpio_dir(int gpio, int dir);
 extern void nmk_gpio_set(int gpio, int val);
Signature · 1 line
1.7.0
#8 lore raw

PATCH v2 8/13 nomadik-mtu: support configurable clock rates

Change the Nomadik MTU driver to get the clock rate and prescaler from the config file. Also remove the hardcoded divisors and do the calculations based on the configured rate.

---
 drivers/misc/nomadik_mtu.c |   23 ++++++++++++-----------
 include/configs/nhk8815.h  |    3 +++
 2 files changed, 15 insertions(+), 11 deletions(-)
drivers/misc/nomadik_mtu.c +12 -11
index 0aeeb63..612ab34 100644
@@ -22,6 +22,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <div64.h>
 
 struct mtu {
 	uint	imsc;
@@ -42,14 +43,6 @@ struct mtu {
 #define MTU_CRn_PRESCALE_256	0x08
 #define MTU_CRn_32BITS		0x02
 
-/*
- * The timer is a decrementer, we'll left it free running at 2.4MHz.
- * We have 2.4 ticks per microsecond and an overflow in almost 30min
- */
-#define TIMER_CLOCK		(24 * 100 * 1000)
-#define COUNT_TO_USEC(x)	((x) * 5 / 12)	/* overflows at 6min */
-#define USEC_TO_COUNT(x)	((x) * 12 / 5)	/* overflows at 6min */
-
 static const struct mtu_timer *timer
 	= &((struct mtu *) CONFIG_SYS_TIMERBASE)->timer[0];
 
@@ -59,10 +52,18 @@ static ulong read_timer(void)
 	return 0 - readl(&timer->val);
 }
 
+static unsigned long usec_to_count(unsigned long long usec)
+{
+	unsigned long long count = usec * CONFIG_NOMADIK_MTU_CLOCK;
+	do_div(count, 1000000);
+	return count;
+}
+
 /* Configure a free-running, auto-wrap counter with no prescaler */
 int timer_init(void)
 {
-	writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS, &timer->cr);
+	writel(MTU_CRn_ENA | CONFIG_NOMADIK_MTU_PRESCALE | MTU_CRn_32BITS,
+	       &timer->cr);
 	reset_timer();
 	return 0;
 }
@@ -85,7 +86,7 @@ void reset_timer(void)
 /* Return how many HZ passed since "base" */
 ulong get_timer(ulong base)
 {
-	ulong hz = read_timer() / (TIMER_CLOCK / CONFIG_SYS_HZ);
+	ulong hz = read_timer() / (CONFIG_NOMADIK_MTU_CLOCK / CONFIG_SYS_HZ);
 	return hz - base;
 }
 
@@ -95,7 +96,7 @@ void __udelay(unsigned long usec)
 	ulong ini, end;
 
 	ini = read_timer();
-	end = ini + USEC_TO_COUNT(usec);
+	end = ini + usec_to_count(usec);
 	while ((signed)(end - read_timer()) > 0)
 		;
 }
include/configs/nhk8815.h +3 -0
index c7700b3..2f8294b 100644
@@ -98,6 +98,9 @@
 #define CONFIG_SYS_HZ		1000 /* Mandatory... */
 #define CONFIG_SYS_TIMERBASE	0x101E2000
 #define CONFIG_NOMADIK_MTU
+/* We have 2.4 ticks per microsecond and an overflow in almost 30min */
+#define CONFIG_NOMADIK_MTU_CLOCK	(24 * 100 * 1000)
+#define CONFIG_NOMADIK_MTU_PRESCALE	MTU_CRn_PRESCALE_1
 
 /* GPIO */
 #define CONFIG_NOMADIK_GPIO
Signature · 1 line
1.7.0
#9 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

Add Cortex A9 support by copying the code for Cortex A8. The only change is a removal of some OMAP3 specific code.

---
 cpu/{arm_cortexa8 => arm_cortexa9}/Makefile   |    0
 cpu/{arm_cortexa8 => arm_cortexa9}/config.mk  |    0
 cpu/{arm_cortexa8 => arm_cortexa9}/cpu.c      |    0
 cpu/{arm_cortexa8 => arm_cortexa9}/start.S    |   26 +------------------------
 cpu/{arm_cortexa8 => arm_cortexa9}/u-boot.lds |    2 +-
 5 files changed, 2 insertions(+), 26 deletions(-)
 copy cpu/{arm_cortexa8 => arm_cortexa9}/Makefile (100%)
 copy cpu/{arm_cortexa8 => arm_cortexa9}/config.mk (100%)
 copy cpu/{arm_cortexa8 => arm_cortexa9}/cpu.c (100%)
 copy cpu/{arm_cortexa8 => arm_cortexa9}/start.S (91%)
 copy cpu/{arm_cortexa8 => arm_cortexa9}/u-boot.lds (97%)
cpu/arm_cortexa9/Makefile renamed from cpu/arm_cortexa8/Makefile +0 -0
similarity index 100%
copy from cpu/arm_cortexa8/Makefile
copy to cpu/arm_cortexa9/Makefile
cpu/arm_cortexa9/config.mk renamed from cpu/arm_cortexa8/config.mk +0 -0
similarity index 100%
copy from cpu/arm_cortexa8/config.mk
copy to cpu/arm_cortexa9/config.mk
cpu/arm_cortexa9/cpu.c renamed from cpu/arm_cortexa8/cpu.c +0 -0
similarity index 100%
copy from cpu/arm_cortexa8/cpu.c
copy to cpu/arm_cortexa9/cpu.c
cpu/arm_cortexa9/start.S renamed from cpu/arm_cortexa8/start.S +1 -25
similarity index 91%
copy from cpu/arm_cortexa8/start.S
copy to cpu/arm_cortexa9/start.S
index 29dae2f..d667f6e 100644
@@ -1,5 +1,5 @@
 /*
- * armboot - Startup Code for OMAP3530/ARM Cortex CPU-core
+ * armboot - Startup Code for ARM Cortex-A9 CPU-core
  *
  * Copyright (c) 2004	Texas Instruments <[email protected]>
  *
@@ -108,30 +108,6 @@ reset:
 	orr	r0, r0, #0xd3
 	msr	cpsr,r0
 
-#if (CONFIG_OMAP34XX)
-	/* Copy vectors to mask ROM indirect addr */
-	adr	r0, _start		@ r0 <- current position of code
-	add	r0, r0, #4		@ skip reset vector
-	mov	r2, #64			@ r2 <- size to copy
-	add	r2, r0, r2		@ r2 <- source end address
-	mov	r1, #SRAM_OFFSET0	@ build vect addr
-	mov	r3, #SRAM_OFFSET1
-	add	r1, r1, r3
-	mov	r3, #SRAM_OFFSET2
-	add	r1, r1, r3
-next:
-	ldmia	r0!, {r3 - r10}		@ copy from source address [r0]
-	stmia	r1!, {r3 - r10}		@ copy to   target address [r1]
-	cmp	r0, r2			@ until source end address [r2]
-	bne	next			@ loop until equal */
-#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
-	/* No need to copy/exec the clock code - DPLL adjust already done
-	 * in NAND/oneNAND Boot.
-	 */
-	bl	cpy_clk_code		@ put dpll adjust code behind vectors
-#endif /* NAND Boot */
-#endif
-	/* the mask ROM code should have PLL and others stable */
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 	bl	cpu_init_crit
 #endif
cpu/arm_cortexa9/u-boot.lds renamed from cpu/arm_cortexa8/u-boot.lds +1 -1
similarity index 97%
copy from cpu/arm_cortexa8/u-boot.lds
copy to cpu/arm_cortexa9/u-boot.lds
index 4f1711c..fc787cd 100644
@@ -34,7 +34,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text	:
 	{
-		cpu/arm_cortexa8/start.o	(.text)
+		cpu/arm_cortexa9/start.o	(.text)
 		*(.text)
 	}
 
Signature · 1 line
1.7.0
#10 lore raw

PATCH v2 10/13 ARM Cortex A9: ifdef code calling lowlevel init

Conditionally compile the code calling lowlevel_init, to avoid the following build error when CONFIG_SKIP_LOWLEVEL_INIT is defined:

start.S:218: undefined reference to `lowlevel_init'

---
 cpu/arm_cortexa9/start.S |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)
cpu/arm_cortexa9/start.S +3 -1
index d667f6e..90f30b0 100644
@@ -157,7 +157,7 @@ clbss_l:
 
 _start_armboot: .word start_armboot
 
-
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 /*************************************************************************
  *
  * CPU_init_critical registers
@@ -194,6 +194,8 @@ cpu_init_crit:
 	bl	lowlevel_init		@ go setup pll,mux,memory
 	mov	lr, ip			@ restore link
 	mov	pc, lr			@ back to my caller
+#endif
+
 /*
  *************************************************************************
  *
Signature · 1 line
1.7.0
#11 lore raw

PATCH v2 11/13 ux500: add SoC-specific code

Add the base SoC code for ST-Ericsson's Ux500 series of Cortex A9 based SoCs.

---
 cpu/arm_cortexa9/ux500/Makefile       |   45 ++++++++++++++++++
 cpu/arm_cortexa9/ux500/clock.c        |   56 +++++++++++++++++++++++
 cpu/arm_cortexa9/ux500/cpu.c          |   53 ++++++++++++++++++++++
 include/asm-arm/arch-ux500/clock.h    |   80 +++++++++++++++++++++++++++++++++
 include/asm-arm/arch-ux500/hardware.h |   72 +++++++++++++++++++++++++++++
 5 files changed, 306 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm_cortexa9/ux500/Makefile
 create mode 100644 cpu/arm_cortexa9/ux500/clock.c
 create mode 100644 cpu/arm_cortexa9/ux500/cpu.c
 create mode 100644 include/asm-arm/arch-ux500/clock.h
 create mode 100644 include/asm-arm/arch-ux500/hardware.h
cpu/arm_cortexa9/ux500/Makefile new file +45 -0
new file mode 100644
index 0000000..c671010
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	=  $(obj)lib$(SOC).a
+
+COBJS	+= clock.o cpu.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:	 $(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
cpu/arm_cortexa9/ux500/clock.c new file +56 -0

56 lines not on this page · raw message

cpu/arm_cortexa9/ux500/cpu.c new file +53 -0

53 lines not on this page · raw message

include/asm-arm/arch-ux500/clock.h new file +80 -0

80 lines not on this page · raw message

include/asm-arm/arch-ux500/hardware.h new file +72 -0

72 lines not on this page · raw message

Signature · 1 line
1.7.0
#12 lore raw

PATCH v2 12/13 pl01x: add support for Ux500 variant of pl011

The Ux500 variants of the pl011 have separate LCRH registers for RX and TX. The TX register is at the same offset as the unmodified pl011, so we need to additionally program only the RX register.

---
 drivers/serial/serial_pl01x.c |    8 ++++++++
 drivers/serial/serial_pl01x.h |    1 +
 2 files changed, 9 insertions(+), 0 deletions(-)
drivers/serial/serial_pl01x.c +8 -0
index c645cef..c819f1d 100644
@@ -144,6 +144,14 @@ int serial_init (void)
 	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
 		  (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
 
+#ifdef CONFIG_UX500
+	/*
+	 * On Ux500 variants, also set up the separate LCRH for RX.
+	 */
+	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH_RX,
+		  (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+#endif
+
 	/*
 	 ** Finally, enable the UART
 	 */
drivers/serial/serial_pl01x.h +1 -0
index 5f20fdd..0ff6203 100644
@@ -93,6 +93,7 @@
  *  PL011 definitions
  *
  */
+#define UART_PL011_LCRH_RX              0x1C
 #define UART_PL011_IBRD                 0x24
 #define UART_PL011_FBRD                 0x28
 #define UART_PL011_LCRH                 0x2C
Signature · 1 line
1.7.0
#13 lore raw

PATCH v2 13/13 mop500: add board-specific files

Add base board code for the MOP500 board, which uses the U8500 SoC.

---
 MAINTAINERS                       |    4 ++
 MAKEALL                           |    9 +++
 Makefile                          |    9 +++-
 board/stericsson/mop500/Makefile  |   54 ++++++++++++++++++
 board/stericsson/mop500/config.mk |   23 ++++++++
 board/stericsson/mop500/mop500.c  |   72 ++++++++++++++++++++++++
 include/configs/mop500.h          |  108 +++++++++++++++++++++++++++++++++++++
 7 files changed, 278 insertions(+), 1 deletions(-)
 create mode 100644 board/stericsson/mop500/Makefile
 create mode 100644 board/stericsson/mop500/config.mk
 create mode 100644 board/stericsson/mop500/mop500.c
 create mode 100644 include/configs/mop500.h
MAINTAINERS +4 -0
index 0658bc3..2e556fe 100644
@@ -769,6 +769,10 @@ Hugo Villeneuve <[email protected]>
 
 	SFFSDR		ARM926EJS
 
+Rabin Vincent <[email protected]>
+
+	mop500		ARM CORTEX-A9 (U8500 SoC)
+
 Prafulla Wadaskar <[email protected]>
 
 	mv88f6281gtw_ge	ARM926EJS (Kirkwood SoC)
MAKEALL +9 -0
index a88c31e..d8585de 100755
@@ -642,6 +642,14 @@ LIST_ARM_CORTEX_A8="		\
 "
 
 #########################################################################
+## ARM Cortex-A9 Systems
+#########################################################################
+
+LIST_ARM_CORTEX_A9="		\
+	mop500			\
+"
+
+#########################################################################
 ## AT91 Systems
 #########################################################################
 
@@ -719,6 +727,7 @@ LIST_arm="			\
 	${LIST_ARM10}		\
 	${LIST_ARM11}		\
 	${LIST_ARM_CORTEX_A8}	\
+	${LIST_ARM_CORTEX_A9}	\
 	${LIST_at91}		\
 	${LIST_pxa}		\
 	${LIST_ixp}		\
Makefile +8 -1
index 4532550..141a9f6 100644
@@ -3141,7 +3141,7 @@ SMN42_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292
 
 #########################################################################
-## ARM CORTEX Systems
+## ARM CORTEX-A8 Systems
 #########################################################################
 
 devkit8000_config :	unconfig
@@ -3172,6 +3172,13 @@ smdkc100_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 smdkc100 samsung s5pc1xx
 
 #########################################################################
+## ARM CORTEX-A9 Systems
+#########################################################################
+
+mop500_config:		unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm_cortexa9 mop500 stericsson ux500
+
+#########################################################################
 ## XScale Systems
 #########################################################################
 
board/stericsson/mop500/Makefile new file +54 -0

54 lines not on this page · raw message

board/stericsson/mop500/config.mk new file +23 -0
new file mode 100644
index 0000000..af246bd
@@ -0,0 +1,23 @@
+#
+# (C) Copyright 2010 ST-Ericsson SA
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x05600000
board/stericsson/mop500/mop500.c new file +72 -0

72 lines not on this page · raw message

include/configs/mop500.h new file +108 -0

108 lines not on this page · raw message

Signature · 1 line
1.7.0
#14 lore raw

PATCH v2 12/13 pl01x: add support for Ux500 variant of pl011

In reply to Rabin Vincent

Dear Rabin Vincent,

drivers/serial/serial_pl01x.h line 99

Quoted 11 lines · In message <[email protected]>…
drivers/serial/serial_pl01x.h +1 -0
@@ -93,6 +93,7 @@
  *  PL011 definitions
  *
  */
+#define UART_PL011_LCRH_RX              0x1C
 #define UART_PL011_IBRD                 0x24
 #define UART_PL011_FBRD                 0x28
 #define UART_PL011_LCRH                 0x2C

This should be turned into a C struct.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Alles Gescheite ist schon gedacht worden, man mu? nur versuchen,
es noch einmal zu denken.          -- Goethe, Maximen und Reflexionen
#15 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

In reply to Rabin Vincent
Quoted 2 lines · Rabin Vincent

Add Cortex A9 support by copying the code for Cortex A8. The only change is a removal of some OMAP3 specific code.

Thanks :), I was hoping to help in the near future by adding OMAP4 code in cortex a9.. ;)

Quoted 15 lines
---
  cpu/{arm_cortexa8 =>  arm_cortexa9}/Makefile   |    0
  cpu/{arm_cortexa8 =>  arm_cortexa9}/config.mk  |    0
  cpu/{arm_cortexa8 =>  arm_cortexa9}/cpu.c      |    0
  cpu/{arm_cortexa8 =>  arm_cortexa9}/start.S    |   26 +------------------------
  cpu/{arm_cortexa8 =>  arm_cortexa9}/u-boot.lds |    2 +-
  5 files changed, 2 insertions(+), 26 deletions(-)
  copy cpu/{arm_cortexa8 =>  arm_cortexa9}/Makefile (100%)
  copy cpu/{arm_cortexa8 =>  arm_cortexa9}/config.mk (100%)
  copy cpu/{arm_cortexa8 =>  arm_cortexa9}/cpu.c (100%)
  copy cpu/{arm_cortexa8 =>  arm_cortexa9}/start.S (91%)
  copy cpu/{arm_cortexa8 =>  arm_cortexa9}/u-boot.lds (97%)

looking at the % of reuse.. for a9, cant we avoid a copy? since a9 and a8 are both v7 instruction set anyways,

how about cpu/arm_cortexa8,a9 etc replaced by cpu/armv7 and have cortex and soc specific code within it?

option a:
cpu/armv7/

	common code.[cS..]
	/cortex_a8/
	/cortex_a9/
	soc specific code:
	option 1:
	cpu/armv7/cortex_a[89]/soc
	or option 2:
	cpu/armv7/soc

option b:
cpu/armv7_common/
cpu/cortex_a8/
cpu/cortex_a9/

(socs thier usual place cpu/cortex_a[89]/socx
option c:
cpu/armv7
cpu/armv7/soc1
cpu/armv7/soc2
etc..
v7 has both a8 and a9 codebases..

Regards,
Nishanth Menon

#16 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

Quoted 23 lines · Nishanth Menon
Quoted 2 lines · Rabin Vincent

Add Cortex A9 support by copying the code for Cortex A8. The only change is a removal of some OMAP3 specific code.

Thanks :), I was hoping to help in the near future by adding OMAP4 code in cortex a9.. ;)

Quoted 8 lines
---
  cpu/{arm_cortexa8 =>  arm_cortexa9}/Makefile   |    0
  cpu/{arm_cortexa8 =>  arm_cortexa9}/config.mk  |    0
  cpu/{arm_cortexa8 =>  arm_cortexa9}/cpu.c      |    0
  cpu/{arm_cortexa8 =>  arm_cortexa9}/start.S    |   26
+------------------------
>   cpu/{arm_cortexa8 =>  arm_cortexa9}/u-boot.lds |    2 +-
>   5 files changed, 2 insertions(+), 26 deletions(-)
>   copy cpu/{arm_cortexa8 =>  arm_cortexa9}/Makefile (100%)
>   copy cpu/{arm_cortexa8 =>  arm_cortexa9}/config.mk (100%)
>   copy cpu/{arm_cortexa8 =>  arm_cortexa9}/cpu.c (100%)
>   copy cpu/{arm_cortexa8 =>  arm_cortexa9}/start.S (91%)
>   copy cpu/{arm_cortexa8 =>  arm_cortexa9}/u-boot.lds (97%)
Quoted 7 lines

looking at the % of reuse.. for a9, cant we avoid a copy? since a9 and a8 are both v7 instruction set anyways,

how about cpu/arm_cortexa8,a9 etc replaced by cpu/armv7 and have cortex and soc specific code within it?

Making the folders based on ISA version would be confusing as the other ARM

cores are not grouped that way.
As all Cortex processors implement the ARMv7 architecture a better grouping IMHO would be cpu/cortex/a8 and cpu/cortex/a9. The common stuff can be under cpu/cortex/.

Quoted 31 lines

option a:
cpu/armv7/

       common code.[cS..]
       /cortex_a8/
       /cortex_a9/
       soc specific code:
       option 1:
       cpu/armv7/cortex_a[89]/soc
       or option 2:
       cpu/armv7/soc

option b:
cpu/armv7_common/
cpu/cortex_a8/
cpu/cortex_a9/

(socs thier usual place cpu/cortex_a[89]/socx
option c:
cpu/armv7
cpu/armv7/soc1
cpu/armv7/soc2
etc..
v7 has both a8 and a9 codebases..

Regards,
Nishanth Menon
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Signature · 2 lines
Regards,
Vaibhav
#17 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

Dear Vaibhav Bedia,

Quoted 6 lines · In message <[email protected]> you…
Quoted 2 lines

Making the folders based on ISA version would be confusing as the other ARM

cores are not grouped that way.
As all Cortex processors implement the ARMv7 architecture a better grouping IMHO would be cpu/cortex/a8 and cpu/cortex/a9. The common stuff can be under cpu/cortex/.

Sounds good to me.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"I can call spirits from the vasty deep."
"Why so can I, or so can any man; but will they come when you do call
for them?"          - Shakespeare, 1 King Henry IV, Act III, Scene I.
#18 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

Wolfgang Denk had written, on 04/09/2010 06:06 PM, the following:

Quoted 11 lines

Dear Vaibhav Bedia,

Quoted 5 lines · In message <[email protected]> you…
Quoted 1 line

Making the folders based on ISA version would be confusing as the other ARM

cores are not grouped that way.
As all Cortex processors implement the ARMv7 architecture a better grouping IMHO would be cpu/cortex/a8 and cpu/cortex/a9. The common stuff can be under cpu/cortex/.

Sounds good to me.

Ack.

Signature · 2 lines
Regards,
Nishanth Menon
#19 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

In reply to Vaibhav Bedia
Quoted 3 lines · Vaibhav Bedia

As all Cortex processors implement the ARMv7 architecture a better grouping IMHO would be cpu/cortex/a8 and cpu/cortex/a9. The common stuff can be under cpu/cortex/.

Perhaps Tom can clarify if he's OK with this, since he wanted a separate cpu/cortex_a9 directory to be created (The first version of my patch series just put the Ux500 code into cortex_a8).

The only potential problem I see with this is that some fixups will have to be done in the Makefiles for lib$(CPU).a generation since $(CPU) would have a slash in it after this. This could be avoided by keeping the SOC directories for all Cortexes in cpu/arm_cortex itself instead of a8 and a9 subdirectories.

Rabin

#20 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

Quoted 9 lines · Rabin Vincent
Quoted 3 lines · Vaibhav Bedia

As all Cortex processors implement the ARMv7 architecture a better grouping IMHO would be cpu/cortex/a8 and cpu/cortex/a9. The common stuff can be under cpu/cortex/.

Perhaps Tom can clarify if he's OK with this, since he wanted a separate cpu/cortex_a9 directory to be created (The first version of my patch series just put the Ux500 code into cortex_a8).

Quoted 6 lines

The only potential problem I see with this is that some fixups will have to be done in the Makefiles for lib$(CPU).a generation since $(CPU) would have a slash in it after this. This could be avoided by keeping the SOC directories for all Cortexes in cpu/arm_cortex itself instead of a8 and a9 subdirectories.

Rabin

The change the Nishanth proposed is better.
I am ok with this change.

My concern with the original Ux500 code was not to include a9 in a8. As this would in the long run make for less readable and less maintainable code. The new change would mean less copying of files but more reordering.

I would suggest that 'fix me' warnings would be added to the a8 boards to defer the reordering. The reordering need not all in the ux500 patchset. If you want to take up all the reordering, that is fine too.

Tom

#21 lore raw

PATCH v2 9/13 arm: add Cortex A9 support

Hi Tom,

Quoted 20 lines · Tom
Quoted 9 lines · Rabin Vincent
Quoted 3 lines · Vaibhav Bedia

As all Cortex processors implement the ARMv7 architecture a better grouping IMHO would be cpu/cortex/a8 and cpu/cortex/a9. The common stuff can be under cpu/cortex/.

Perhaps Tom can clarify if he's OK with this, since he wanted a separate cpu/cortex_a9 directory to be created (The first version of my patch series just put the Ux500 code into cortex_a8).

Quoted 6 lines

The only potential problem I see with this is that some fixups will have to be done in the Makefiles for lib$(CPU).a generation since $(CPU) would have a slash in it after this. This could be avoided by keeping the SOC directories for all Cortexes in cpu/arm_cortex itself instead of a8 and a9 subdirectories.

Rabin

The change the Nishanth proposed is better.
I am ok with this change.

Quoted 7 lines

My concern with the original Ux500 code was not to include a9 in a8. As this would in the long run make for less readable and less maintainable code. The new change would mean less copying of files but more reordering.

I would suggest that 'fix me' warnings would be added to the a8 boards to defer the reordering. The reordering need not all in the ux500 patchset. If you want to take up all the reordering, that is fine too.

I've posted a set of patches which adds the Makefile modifications necessary to support this directory structure, and also moves all
Cortex-A8 SOCs into the new locations. If you find those patches
acceptable, I'll rebase the Ux500 patchset based on top of that.

Rabin