Skip to contentSkip to conversation

add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

RFC PATCH New Wolfgang Wegner 3 participants 10 messages Apr 23, 2010 – Apr 24, 2010 m68k architecture

lore
Share & tools
lore
#0 lore raw

RFC PATCH 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.

---
I implemented and tested this bootcount on a custom MCF54455 board. According to the data sheet, the internal SRAM is not supposed to be useful for data storage across resets. There is no explicit statement concerning the TCD registers, but in tests on our board the values did always survive reset. TCD[1] is currently unused by the linux drivers, so using its registers should be safe up to application start, where re-setting the bootcount would probably be done anyways.

 arch/m68k/cpu/mcf5445x/cpu.c        |   29 +++++++++++++++++++++++++++++
 arch/m68k/include/asm/immap_5445x.h |    1 +
 2 files changed, 30 insertions(+), 0 deletions(-)
arch/m68k/cpu/mcf5445x/cpu.c +29 -0
index 6238bc0..70007c1 100644
@@ -110,3 +110,32 @@ int cpu_eth_init(bd_t *bis)
 	return mcffec_initialize(bis);
 }
 #endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+/*
+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.
+ */
+#include <asm/io.h>
+
+void bootcount_store(ulong a)
+{
+	tcd_st *tcd = (tcd_st *)MMAP_TCD;
+
+	__raw_writel(a, &(tcd[1].saddr));
+	__raw_writel(BOOTCOUNT_MAGIC, &(tcd[1].daddr));
+}
+
+ulong bootcount_load(void)
+{
+	tcd_st *tcd = (tcd_st *)MMAP_TCD;
+
+	if (__raw_readl(&(tcd[1].daddr)) != BOOTCOUNT_MAGIC)
+		return 0;
+	else
+		return __raw_readl(&(tcd[1].saddr));
+}
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
arch/m68k/include/asm/immap_5445x.h +1 -0
index 57cf3ec..d6e416a 100644
@@ -37,6 +37,7 @@
 #define MMAP_EDMA	0xFC044000
 #define MMAP_INTC0	0xFC048000
 #define MMAP_INTC1	0xFC04C000
+#define MMAP_TCD	0xFC045000
 #define MMAP_IACK	0xFC054000
 #define MMAP_I2C	0xFC058000
 #define MMAP_DSPI	0xFC05C000
Signature · 1 line
1.5.6.5
#1 lore raw

RFC PATCH 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

Dear Wolfgang Wegner,

Quoted 4 lines · In message <[email protected]> you wrote:

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.

...

arch/m68k/cpu/mcf5445x/cpu.c int cpu_eth_init(bd_t *bis) · line 120

Quoted 7 lines
arch/m68k/cpu/mcf5445x/cpu.c +7 -0
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+/*
+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.

This is not sufficent, then. The bootcounter requires to be reset from User Space, i. e. _after_ the application has been succesfully started. If application start messes with the value, this fails to work.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"The combination of a number of things to make existence worthwhile."
"Yes, the philosophy of 'none,' meaning 'all.'"
	-- Spock and Lincoln, "The Savage Curtain", stardate 5906.4
#2 lore raw

RFC PATCH 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

Dear Wolfgang Denk,

Quoted 8 lines · Wolfgang Denk

Dear Wolfgang Wegner,

Quoted 4 lines · In message <[email protected]> you wrote:

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.

...

Quoted 12 lines

arch/m68k/cpu/mcf5445x/cpu.c int cpu_eth_init(bd_t *bis) · line 120

Quoted 7 lines
arch/m68k/cpu/mcf5445x/cpu.c +7 -0
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+/*
+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.

This is not sufficent, then. The bootcounter requires to be reset from User Space, i. e. _after_ the application has been succesfully started. If application start messes with the value, this fails to work.

sorry, my wording was not correct.
What I meant was that no device driver in stock kernel uses these registers, so the only possibility for them to get used is if the init system or application loads some non-standard drivers.

Regards,
Wolfgang

#3 lore raw

RFC PATCH 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

Dear Wolfgang Wegner,

Quoted 12 lines · In message <[email protected]> you wrote:
Quoted 11 lines
Quoted 6 lines

+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.

This is not sufficent, then. The bootcounter requires to be reset from User Space, i. e. _after_ the application has been succesfully started. If application start messes with the value, this fails to work.

Quoted 4 lines

sorry, my wording was not correct.
What I meant was that no device driver in stock kernel uses these registers, so the only possibility for them to get used is if the init system or application loads some non-standard drivers.

I see. I guess the comment should be updated, then.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If I can have honesty, it's easier to overlook mistakes.
	-- Kirk, "Space Seed", stardate 3141.9
#4 lore raw

RFC PATCH v2 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.

---
I implemented and tested this bootcount on a custom MCF54455 board. According to the data sheet, the internal SRAM is not supposed to be useful for data storage across resets. There is no explicit statement concerning the TCD registers, but in tests on our board the values did always survive reset. TCD[1] is currently unused by the linux drivers, so using its registers should be safe as long as no non- standard driver is loaded.
v2: fixed comment

 arch/m68k/cpu/mcf5445x/cpu.c        |   29 +++++++++++++++++++++++++++++
 arch/m68k/include/asm/immap_5445x.h |    1 +
 2 files changed, 30 insertions(+), 0 deletions(-)
arch/m68k/cpu/mcf5445x/cpu.c +29 -0
index 6238bc0..70007c1 100644
@@ -110,3 +110,32 @@ int cpu_eth_init(bd_t *bis)
 	return mcffec_initialize(bis);
 }
 #endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+/*
+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.
+ */
+#include <asm/io.h>
+
+void bootcount_store(ulong a)
+{
+	tcd_st *tcd = (tcd_st *)MMAP_TCD;
+
+	__raw_writel(a, &(tcd[1].saddr));
+	__raw_writel(BOOTCOUNT_MAGIC, &(tcd[1].daddr));
+}
+
+ulong bootcount_load(void)
+{
+	tcd_st *tcd = (tcd_st *)MMAP_TCD;
+
+	if (__raw_readl(&(tcd[1].daddr)) != BOOTCOUNT_MAGIC)
+		return 0;
+	else
+		return __raw_readl(&(tcd[1].saddr));
+}
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
arch/m68k/include/asm/immap_5445x.h +1 -0
index 57cf3ec..d6e416a 100644
@@ -37,6 +37,7 @@
 #define MMAP_EDMA	0xFC044000
 #define MMAP_INTC0	0xFC048000
 #define MMAP_INTC1	0xFC04C000
+#define MMAP_TCD	0xFC045000
 #define MMAP_IACK	0xFC054000
 #define MMAP_I2C	0xFC058000
 #define MMAP_DSPI	0xFC05C000
Signature · 1 line
1.6.3.3
#5 lore raw

RFC PATCH v2 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

Dear Wolfgang Wegner,

Quoted 6 lines · In message <[email protected]> you wrote:

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.

Quoted 9 lines

---
I implemented and tested this bootcount on a custom MCF54455 board. According to the data sheet, the internal SRAM is not supposed to be useful for data storage across resets. There is no explicit statement concerning the TCD registers, but in tests on our board the values did always survive reset. TCD[1] is currently unused by the linux drivers, so using its registers should be safe as long as no non- standard driver is loaded.
v2: fixed comment

Um... I think this was a misunderstanding. This comment here is lost in the git repository.

Quoted 11 lines
 arch/m68k/cpu/mcf5445x/cpu.c        |   29 +++++++++++++++++++++++++++++
 arch/m68k/include/asm/immap_5445x.h |    1 +
 2 files changed, 30 insertions(+), 0 deletions(-)
arch/m68k/cpu/mcf5445x/cpu.c +0 -0
index 6238bc0..70007c1 100644
@@ -110,3 +110,32 @@ int cpu_eth_init(bd_t *bis)
 	return mcffec_initialize(bis);
 }

arch/m68k/cpu/mcf5445x/cpu.c int cpu_eth_init(bd_t *bis) · line 121

Quoted 10 lines
arch/m68k/cpu/mcf5445x/cpu.c +9 -0
 #endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+/*
+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.
+ */

It was this comment here that IMHO should be changed as the "until application start" is misleading.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
All your people must learn before you can reach for the stars.
	-- Kirk, "The Gamesters of Triskelion", stardate 3259.2
#6 lore raw

RFC PATCH v3 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.
TCD[1] is currently unused by the linux drivers, so using its registers should be safe as long as no non-standard driver is loaded.

---
I implemented and tested this bootcount on a custom MCF54455 board. According to the data sheet, the internal SRAM is not supposed to be useful for data storage across resets. There is no explicit statement concerning the TCD registers, but in tests on our board the values did always survive reset.
v2: updated comment
v3: moved updated comment to the right place :-)

 arch/m68k/cpu/mcf5445x/cpu.c        |   29 +++++++++++++++++++++++++++++
 arch/m68k/include/asm/immap_5445x.h |    1 +
 2 files changed, 30 insertions(+), 0 deletions(-)
arch/m68k/cpu/mcf5445x/cpu.c +29 -0
index 6238bc0..70007c1 100644
@@ -110,3 +110,32 @@ int cpu_eth_init(bd_t *bis)
 	return mcffec_initialize(bis);
 }
 #endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+/*
+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.
+ */
+#include <asm/io.h>
+
+void bootcount_store(ulong a)
+{
+	tcd_st *tcd = (tcd_st *)MMAP_TCD;
+
+	__raw_writel(a, &(tcd[1].saddr));
+	__raw_writel(BOOTCOUNT_MAGIC, &(tcd[1].daddr));
+}
+
+ulong bootcount_load(void)
+{
+	tcd_st *tcd = (tcd_st *)MMAP_TCD;
+
+	if (__raw_readl(&(tcd[1].daddr)) != BOOTCOUNT_MAGIC)
+		return 0;
+	else
+		return __raw_readl(&(tcd[1].saddr));
+}
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
arch/m68k/include/asm/immap_5445x.h +1 -0
index 57cf3ec..d6e416a 100644
@@ -37,6 +37,7 @@
 #define MMAP_EDMA	0xFC044000
 #define MMAP_INTC0	0xFC048000
 #define MMAP_INTC1	0xFC04C000
+#define MMAP_TCD	0xFC045000
 #define MMAP_IACK	0xFC054000
 #define MMAP_I2C	0xFC058000
 #define MMAP_DSPI	0xFC05C000
Signature · 1 line
1.6.3.3
#7 lore raw

RFC PATCH v3 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

Dear Wolfgang Wegner,

Quoted 8 lines · In message <[email protected]> you wrote:

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.
TCD[1] is currently unused by the linux drivers, so using its registers should be safe as long as no non-standard driver is loaded.

Quoted 8 lines

---
I implemented and tested this bootcount on a custom MCF54455 board. According to the data sheet, the internal SRAM is not supposed to be useful for data storage across resets. There is no explicit statement concerning the TCD registers, but in tests on our board the values did always survive reset.
v2: updated comment
v3: moved updated comment to the right place :-)

Did you???

Quoted 11 lines
 arch/m68k/cpu/mcf5445x/cpu.c        |   29 +++++++++++++++++++++++++++++
 arch/m68k/include/asm/immap_5445x.h |    1 +
 2 files changed, 30 insertions(+), 0 deletions(-)
arch/m68k/cpu/mcf5445x/cpu.c +0 -0
index 6238bc0..70007c1 100644
@@ -110,3 +110,32 @@ int cpu_eth_init(bd_t *bis)
 	return mcffec_initialize(bis);
 }

arch/m68k/cpu/mcf5445x/cpu.c int cpu_eth_init(bd_t *bis) · line 121

Quoted 10 lines
arch/m68k/cpu/mcf5445x/cpu.c +9 -0
 #endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+/*
+ * We use transfer descriptor registers as a persistent storage
+ * across resets. This was tested on a MCF54455.
+ * Neither U-Boot nor the stock LTIB kernel seem to use
+ * TCD[1], so it should be safe at least until application
+ * start.
+ */

This still reads the same...

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The biggest difference between time and space is that you can't reuse
time.                                                 - Merrick Furst
#8 lore raw

RFC PATCH v3 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

Dear Wolfgang Denk,

Quoted 20 lines · Wolfgang Denk

Dear Wolfgang Wegner,

Quoted 8 lines · In message <[email protected]> you wrote:

This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets.
TCD[1] is currently unused by the linux drivers, so using its registers should be safe as long as no non-standard driver is loaded.

Quoted 8 lines

---
I implemented and tested this bootcount on a custom MCF54455 board. According to the data sheet, the internal SRAM is not supposed to be useful for data storage across resets. There is no explicit statement concerning the TCD registers, but in tests on our board the values did always survive reset.
v2: updated comment
v3: moved updated comment to the right place :-)

Quoted 1 line

Did you???

The part about how long the registers are untouched by other drivers - yes. The other part not.
Originally the other part of the comment was more or less meant to be a hint for others (probably having more experience with coldfire than me) reviewing the patch, so that I could afterwards provide a completely revised version.
Looking at it today, I should simply have moved everything up to the commit message, but as it is now, I should probably simply wait to let others comment before sending another patch?

Best regards,
Wolfgang

#9 lore raw

RFC PATCH v2 1/1 add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

In reply to Wolfgang Denk

Dear Wolfgang Denk,

On Fri, Apr 23, 2010 at 10:47:53PM +0200, Wolfgang Denk wrote:
[...]

Quoted 2 lines

Um... I think this was a misunderstanding. This comment here is lost in the git repository.

only half misunderstanding and half too late for me today... Sorry!

Best regards,
Wolfgang