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ARM: mx3: Fix a race condition in mxcmmc

PATCH New Daniel Mack 4 participants 8 messages Apr 27, 2010 – May 17, 2010

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Daniel Mack

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#0 lore raw

PATCH 1/1 ARM: mx3: Fix a race condition in mxcmmc

The patch below is a result of more MMC/SDIO tests on MX31 hardware.

#1 lore raw

PATCH 1/1 ARM: mx3: Fix a race condition in mxcmmc

Quoted 34 lines · Daniel Mack

The patch below is a result of more MMC/SDIO tests on MX31 hardware.

From 1b01327ff9c50980c31d7afa3fb6b314eb152fea Mon Sep 17 00:00:00 2001
From: Volker Ernst<[email protected]>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12 in the INT-handler anymore. INT-handler might be called during an ongoing PIO-data-transfer (with some other INT-flag set) and PIO-transfer depends on these bits being set to detect the end of the data-transfer. This also means that at the end of PIO- transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by Volker Ernst<[email protected]>
Acked-by Daniel Mack<[email protected]>
Cc Andy Green<[email protected]>
---
  drivers/mmc/host/mxcmmc.c |   10 +++++++++-
  1 files changed, 9 insertions(+), 1 deletions(-)
drivers/mmc/host/mxcmmc.c +0 -0
index 2c53024..d625702 100644

drivers/mmc/host/mxcmmc.c static void mxcmci_datawork(struct work_struct *work) · line 492

Quoted 4 lines
drivers/mmc/host/mxcmmc.c +1 -0
@@ -489,6 +489,8 @@ static void mxcmci_datawork(struct work_struct *work)
  	struct mxcmci_host *host = container_of(work, struct mxcmci_host,
  						  datawork);
  	int datastat = mxcmci_transfer_data(host);
+        writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, host->base + MMC_REG_STATUS);

Use TAB for indentation.

Quoted 26 lines
drivers/mmc/host/mxcmmc.c +8 -1
+
  	mxcmci_finish_data(host, datastat);
 
  	if (host->req->stop) {

@@ -553,7 +555,8 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
  	u32 stat;
 
  	stat = readl(host->base + MMC_REG_STATUS);
-	writel(stat&  ~STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
+	writel(stat&  ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
+			STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS);
 
  	dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
 

@@ -561,6 +564,11 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
  	sdio_irq = (stat&  STATUS_SDIO_INT_ACTIVE)&&  host->use_sdio;
  	spin_unlock_irqrestore(&host->lock, flags);
 
+#ifdef HAS_DMA
+	if (mxcmci_use_dma(host)&&  (stat&  (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
+		writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, host->base + MMC_REG_STATUS);
+#endif
+
  	if (sdio_irq) {
  		writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
  		mmc_signal_sdio_irq(host->mmc);
#2 lore raw

PATCH 1/1 ARM: mx3: Fix a race condition in mxcmmc

In reply to Daniel Mack

Hello.

Quoted 34 lines · Daniel Mack

The patch below is a result of more MMC/SDIO tests on MX31 hardware.

From 1b01327ff9c50980c31d7afa3fb6b314eb152fea Mon Sep 17 00:00:00 2001
From: Volker Ernst <[email protected]>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12 in the INT-handler anymore. INT-handler might be called during an ongoing PIO-data-transfer (with some other INT-flag set) and PIO-transfer depends on these bits being set to detect the end of the data-transfer. This also means that at the end of PIO- transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by Volker Ernst <[email protected]>
Acked-by Daniel Mack <[email protected]>
Cc Andy Green <[email protected]>
---
 drivers/mmc/host/mxcmmc.c |   10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)
drivers/mmc/host/mxcmmc.c +0 -0
index 2c53024..d625702 100644

drivers/mmc/host/mxcmmc.c static void mxcmci_datawork(struct work_struct *work) · line 492

Quoted 4 lines
drivers/mmc/host/mxcmmc.c +1 -0
@@ -489,6 +489,8 @@ static void mxcmci_datawork(struct work_struct *work)
 	struct mxcmci_host *host = container_of(work, struct mxcmci_host,
 						  datawork);
 	int datastat = mxcmci_transfer_data(host);
+        writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, host->base + MMC_REG_STATUS);

Spaces instead of tab here...

WBR, Sergei

author
#4 lore raw

PATCH 1/1 ARM: mx3: Fix a race condition in mxcmmc

Sascha, can you take this to your tree?

Quoted 73 lines · Daniel Mack

From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001
From: Volker Ernst <[email protected]>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12 in the INT-handler anymore. INT-handler might be called during an ongoing PIO-data-transfer (with some other INT-flag set) and PIO-transfer depends on these bits being set to detect the end of the data-transfer. This also means that at the end of PIO- transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by Volker Ernst <[email protected]>
Acked-by Daniel Mack <[email protected]>
Cc Andy Green <[email protected]>
---
 drivers/mmc/host/mxcmmc.c |   13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)
drivers/mmc/host/mxcmmc.c +12 -1
index 2c53024..ec18e3b 100644
@@ -489,6 +489,9 @@ static void mxcmci_datawork(struct work_struct *work)
 	struct mxcmci_host *host = container_of(work, struct mxcmci_host,
 						  datawork);
 	int datastat = mxcmci_transfer_data(host);
+
+	writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+		host->base + MMC_REG_STATUS);
 	mxcmci_finish_data(host, datastat);
 
 	if (host->req->stop) {

@@ -553,7 +556,8 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	u32 stat;
 
 	stat = readl(host->base + MMC_REG_STATUS);
-	writel(stat & ~STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
+	writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
+			STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS);
 
 	dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
 

@@ -561,6 +565,13 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
 	spin_unlock_irqrestore(&host->lock, flags);
 
+#ifdef HAS_DMA
+	if (mxcmci_use_dma(host) &&
+	    (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
+		writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+			host->base + MMC_REG_STATUS);
+#endif
+
 	if (sdio_irq) {
 		writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
 		mmc_signal_sdio_irq(host->mmc);
Signature · 7 lines
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author
#5 lore raw

PATCH 1/1 ARM: mx3: Fix a race condition in mxcmmc

Any comments on this one?

Thanks,
Daniel

Quoted 80 lines · Daniel Mack
Quoted 73 lines · Daniel Mack

From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001
From: Volker Ernst <[email protected]>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12 in the INT-handler anymore. INT-handler might be called during an ongoing PIO-data-transfer (with some other INT-flag set) and PIO-transfer depends on these bits being set to detect the end of the data-transfer. This also means that at the end of PIO- transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by Volker Ernst <[email protected]>
Acked-by Daniel Mack <[email protected]>
Cc Andy Green <[email protected]>
---
 drivers/mmc/host/mxcmmc.c |   13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)
drivers/mmc/host/mxcmmc.c +12 -1
index 2c53024..ec18e3b 100644
@@ -489,6 +489,9 @@ static void mxcmci_datawork(struct work_struct *work)
 	struct mxcmci_host *host = container_of(work, struct mxcmci_host,
 						  datawork);
 	int datastat = mxcmci_transfer_data(host);
+
+	writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+		host->base + MMC_REG_STATUS);
 	mxcmci_finish_data(host, datastat);
 
 	if (host->req->stop) {

@@ -553,7 +556,8 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	u32 stat;
 
 	stat = readl(host->base + MMC_REG_STATUS);
-	writel(stat & ~STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
+	writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
+			STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS);
 
 	dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
 

@@ -561,6 +565,13 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
 	spin_unlock_irqrestore(&host->lock, flags);
 
+#ifdef HAS_DMA
+	if (mxcmci_use_dma(host) &&
+	    (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
+		writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+			host->base + MMC_REG_STATUS);
+#endif
+
 	if (sdio_irq) {
 		writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
 		mmc_signal_sdio_irq(host->mmc);
Signature · 7 lines
1.7.0.3


_______________________________________________
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linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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author
#6 lore raw

PATCH 1/1 ARM: mx3: Fix a race condition in mxcmmc

Sascha, any chance to get this in for the next merge window?

Thanks,
Daniel

Quoted 91 lines · Daniel Mack

Any comments on this one?

Thanks,
Daniel

Quoted 71 lines · Daniel Mack
Quoted 69 lines · Daniel Mack

From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001
From: Volker Ernst <[email protected]>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12 in the INT-handler anymore. INT-handler might be called during an ongoing PIO-data-transfer (with some other INT-flag set) and PIO-transfer depends on these bits being set to detect the end of the data-transfer. This also means that at the end of PIO- transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by Volker Ernst <[email protected]>
Acked-by Daniel Mack <[email protected]>
Cc Andy Green <[email protected]>
---
 drivers/mmc/host/mxcmmc.c |   13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)
drivers/mmc/host/mxcmmc.c +12 -1
index 2c53024..ec18e3b 100644
@@ -489,6 +489,9 @@ static void mxcmci_datawork(struct work_struct *work)
 	struct mxcmci_host *host = container_of(work, struct mxcmci_host,
 						  datawork);
 	int datastat = mxcmci_transfer_data(host);
+
+	writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+		host->base + MMC_REG_STATUS);
 	mxcmci_finish_data(host, datastat);
 
 	if (host->req->stop) {

@@ -553,7 +556,8 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	u32 stat;
 
 	stat = readl(host->base + MMC_REG_STATUS);
-	writel(stat & ~STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
+	writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
+			STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS);
 
 	dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
 

@@ -561,6 +565,13 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
 	spin_unlock_irqrestore(&host->lock, flags);
 
+#ifdef HAS_DMA
+	if (mxcmci_use_dma(host) &&
+	    (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
+		writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+			host->base + MMC_REG_STATUS);
+#endif
+
 	if (sdio_irq) {
 		writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
 		mmc_signal_sdio_irq(host->mmc);
Signature · 1 line
1.7.0.3
Quoted 9 lines
Quoted 4 lines

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Applied
#7 lore raw

PATCH 1/1 ARM: mx3: Fix a race condition in mxcmmc

Quoted 1 line · Daniel Mack

Sascha, any chance to get this in for the next merge window?

Applied to mxc-master. Sorry for the delay.

Sascha

Quoted 97 lines

Thanks,
Daniel

Quoted 91 lines · Daniel Mack

Any comments on this one?

Thanks,
Daniel

Quoted 71 lines · Daniel Mack
Quoted 69 lines · Daniel Mack

From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001
From: Volker Ernst <[email protected]>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12 in the INT-handler anymore. INT-handler might be called during an ongoing PIO-data-transfer (with some other INT-flag set) and PIO-transfer depends on these bits being set to detect the end of the data-transfer. This also means that at the end of PIO- transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by Volker Ernst <[email protected]>
Acked-by Daniel Mack <[email protected]>
Cc Andy Green <[email protected]>
---
 drivers/mmc/host/mxcmmc.c |   13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)
drivers/mmc/host/mxcmmc.c +12 -1
index 2c53024..ec18e3b 100644
@@ -489,6 +489,9 @@ static void mxcmci_datawork(struct work_struct *work)
 	struct mxcmci_host *host = container_of(work, struct mxcmci_host,
 						  datawork);
 	int datastat = mxcmci_transfer_data(host);
+
+	writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+		host->base + MMC_REG_STATUS);
 	mxcmci_finish_data(host, datastat);
 
 	if (host->req->stop) {

@@ -553,7 +556,8 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	u32 stat;
 
 	stat = readl(host->base + MMC_REG_STATUS);
-	writel(stat & ~STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
+	writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
+			STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS);
 
 	dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
 

@@ -561,6 +565,13 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
 	sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
 	spin_unlock_irqrestore(&host->lock, flags);
 
+#ifdef HAS_DMA
+	if (mxcmci_use_dma(host) &&
+	    (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
+		writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
+			host->base + MMC_REG_STATUS);
+#endif
+
 	if (sdio_irq) {
 		writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
 		mmc_signal_sdio_irq(host->mmc);
Signature · 1 line
1.7.0.3
Quoted 9 lines
Quoted 4 lines

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