SPARC: added unaligned definitions, patch supplied by Magnus Sjalander.

new file mode 100644
index 0000000..4e604c1
@@ -0,0 +1,17 @@
+#ifndef _ASM_SPARC_UNALIGNED_H
+#define _ASM_SPARC_UNALIGNED_H
+
+#ifdef __KERNEL__
+
+/*
+ * The SPARC can not do unaligned accesses, it must be split into multiple
+ * byte accesses. The SPARC is in big endian mode.
+ */
+#include <linux/unaligned/be_byteshift.h>
+#include <linux/unaligned/generic.h>
+
+#define get_unaligned	__get_unaligned_be
+#define put_unaligned	__put_unaligned_be
+
+#endif	/* __KERNEL__ */
+#endif	/* _ASM_SPARC_UNALIGNED_H */

index 79bc4d9..833915d 100644
@@ -45,7 +45,7 @@
 /* ByPass Cache when reading regs */
 #define GRETH_REGLOAD(addr)		SPARC_NOCACHE_READ(addr)
 /* Write-through cache ==> no bypassing needed on writes */
-#define GRETH_REGSAVE(addr,data)	(*(unsigned int *)(addr) = (data))
+#define GRETH_REGSAVE(addr,data) (*(volatile unsigned int *)(addr) = (data))
 #define GRETH_REGORIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)|data)
 #define GRETH_REGANDIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)&data)
 

@@ -102,12 +102,12 @@ typedef struct {
 } greth_priv;
 
 /* Read MII register 'addr' from core 'regs' */
-static int read_mii(int addr, volatile greth_regs * regs)
+static int read_mii(int phyaddr, int regaddr, volatile greth_regs * regs)
 {
 	while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 	}
 
-	GRETH_REGSAVE(&regs->mdio, (0 << 11) | ((addr & 0x1F) << 6) | 2);
+	GRETH_REGSAVE(&regs->mdio, ((phyaddr & 0x1F) << 11) | ((regaddr & 0x1F) << 6) | 2);
 
 	while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 	}

@@ -119,14 +119,14 @@ static int read_mii(int addr, volatile greth_regs * regs)
 	}
 }
 
-static void write_mii(int addr, int data, volatile greth_regs * regs)
+static void write_mii(int phyaddr, int regaddr, int data, volatile greth_regs * regs)
 {
 	while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 	}
 
 	GRETH_REGSAVE(&regs->mdio,
-		      ((data & 0xFFFF) << 16) | (0 << 11) | ((addr & 0x1F) << 6)
-		      | 1);
+		      ((data & 0xFFFF) << 16) | ((phyaddr & 0x1F) << 11) | 
+		      ((regaddr & 0x1F) << 6) | 1);
 
 	while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 	}

@@ -146,8 +146,6 @@ int greth_init(struct eth_device *dev, bd_t * bis)
 	printf("greth_init\n");
 #endif
 
-	GRETH_REGSAVE(&regs->control, 0);
-
 	if (!greth->rxbd_base) {
 
 		/* allocate descriptors */

@@ -161,6 +159,7 @@ int greth_init(struct eth_device *dev, bd_t * bis)
 		    malloc(GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT);
 	}
 
+	memset(greth->rxbuf_base, 0, GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT);
 	/* initate rx decriptors */
 	for (i = 0; i < GRETH_RXBD_CNT; i++) {
 		greth->rxbd_base[i].addr = (unsigned int)

@@ -219,6 +218,11 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 	greth_regs *regs = dev->regs;
 	int tmp, tmp1, tmp2, i;
 	unsigned int start, timeout;
+#ifdef CONFIG_SYS_GRLIB_GRETH_PHYADDR
+	int phyaddr = CONFIG_SYS_GRLIB_GRETH_PHYADDR;
+#else
+	int phyaddr = 0;
+#endif
 
 	/* X msecs to ticks */
 	timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000);

@@ -230,17 +234,25 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 
 	/* get phy control register default values */
 
-	while ((tmp = read_mii(0, regs)) & 0x8000) {
-		if (get_timer(start) > timeout)
+	while ((tmp = read_mii(phyaddr, 0, regs)) & 0x8000) {
+		if (get_timer(start) > timeout) {
+#ifdef DEBUG
+			printf("greth_init_phy: PHY read 1 failed\n");
+#endif
 			return 1;	/* Fail */
+		}
 	}
 
 	/* reset PHY and wait for completion */
-	write_mii(0, 0x8000 | tmp, regs);
+	write_mii(phyaddr, 0, 0x8000 | tmp, regs);
 
-	while (((tmp = read_mii(0, regs))) & 0x8000) {
-		if (get_timer(start) > timeout)
+	while (((tmp = read_mii(phyaddr, 0, regs))) & 0x8000) {
+		if (get_timer(start) > timeout) {
+#ifdef DEBUG
+			printf("greth_init_phy: PHY read 2 failed\n");
+#endif
 			return 1;	/* Fail */
+		}
 	}
 
 	/* Check if PHY is autoneg capable and then determine operating

@@ -251,16 +263,16 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 	dev->sp = 0;
 	dev->auto_neg = 0;
 	if (!((tmp >> 12) & 1)) {
-		write_mii(0, 0, regs);
+		write_mii(phyaddr, 0, 0, regs);
 	} else {
 		/* wait for auto negotiation to complete and then check operating mode */
 		dev->auto_neg = 1;
 		i = 0;
-		while (!(((tmp = read_mii(1, regs)) >> 5) & 1)) {
+		while (!(((tmp = read_mii(phyaddr, 1, regs)) >> 5) & 1)) {
 			if (get_timer(start) > timeout) {
 				printf("Auto negotiation timed out. "
 				       "Selecting default config\n");
-				tmp = read_mii(0, regs);
+				tmp = read_mii(phyaddr, 0, regs);
 				dev->gb = ((tmp >> 6) & 1)
 				    && !((tmp >> 13) & 1);
 				dev->sp = !((tmp >> 6) & 1)

@@ -270,8 +282,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 			}
 		}
 		if ((tmp >> 8) & 1) {
-			tmp1 = read_mii(9, regs);
-			tmp2 = read_mii(10, regs);
+			tmp1 = read_mii(phyaddr, 9, regs);
+			tmp2 = read_mii(phyaddr, 10, regs);
 			if ((tmp1 & GRETH_MII_EXTADV_1000FD) &&
 			    (tmp2 & GRETH_MII_EXTPRT_1000FD)) {
 				dev->gb = 1;

@@ -284,8 +296,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 			}
 		}
 		if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) {
-			tmp1 = read_mii(4, regs);
-			tmp2 = read_mii(5, regs);
+			tmp1 = read_mii(phyaddr, 4, regs);
+			tmp2 = read_mii(phyaddr, 5, regs);
 			if ((tmp1 & GRETH_MII_100TXFD) &&
 			    (tmp2 & GRETH_MII_100TXFD)) {
 				dev->sp = 1;

@@ -302,7 +314,7 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 			if ((dev->gb == 1) && (dev->gbit_mac == 0)) {
 				dev->gb = 0;
 				dev->fd = 0;
-				write_mii(0, dev->sp << 13, regs);
+				write_mii(phyaddr, 0, dev->sp << 13, regs);
 			}
 		}
 

@@ -314,8 +326,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 #endif
 	/* Read out PHY info if extended registers are available */
 	if (tmp & 1) {
-		tmp1 = read_mii(2, regs);
-		tmp2 = read_mii(3, regs);
+		tmp1 = read_mii(phyaddr, 2, regs);
+		tmp2 = read_mii(phyaddr, 3, regs);
 		tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F);
 		tmp = tmp2 & 0xF;
 

@@ -542,10 +554,9 @@ int greth_recv(struct eth_device *dev)
 		/* increase index */
 		greth->rxbd_curr =
 		    ((unsigned int)greth->rxbd_curr >=
-		     (unsigned int)greth->rxbd_max) ? greth->
-		    rxbd_base : (greth->rxbd_curr + 1);
+		     (unsigned int)greth->rxbd_max) ? greth->rxbd_base : (greth->rxbd_curr + 1);
 
-	};
+	}
 
 	if (enable) {
 		GRETH_REGORIN(&regs->control, GRETH_RXEN);

@@ -630,6 +641,9 @@ int greth_initialize(bd_t * bis)
 	/* initiate PHY, select speed/duplex depending on connected PHY */
 	if (greth_init_phy(greth, bis)) {
 		/* Failed to init PHY (timedout) */
+#ifdef DEBUG
+		printf("GRETH[0x%08x]: Failed to init PHY\n", greth->regs);
+#endif
 		return -1;
 	}
 

@@ -658,5 +672,8 @@ int greth_initialize(bd_t * bis)
 	/* set and remember MAC address */
 	greth_set_hwaddr(greth, addr);
 
+#ifdef DEBUG
+	printf("GRETH[0x%08x]: Initialized successfully\n", greth->regs);
+#endif
 	return 0;
 }

index 833915d..383b25c 100644
@@ -146,13 +146,23 @@ int greth_init(struct eth_device *dev, bd_t * bis)
 	printf("greth_init\n");
 #endif
 
+	/* Reset core */
+	GRETH_REGSAVE(&regs->control, (GRETH_RESET | (greth->gb << 8) |
+		(greth->sp << 7) | (greth->fd << 4)));
+
+	/* Wait for Reset to complete */
+	while ( GRETH_REGLOAD(&regs->control) & GRETH_RESET) ;
+
+	GRETH_REGSAVE(&regs->control,
+		((greth->gb << 8) | (greth->sp << 7) | (greth->fd << 4)));
+
 	if (!greth->rxbd_base) {
 
 		/* allocate descriptors */
 		greth->rxbd_base = (greth_bd *)
 		    memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
 		greth->txbd_base = (greth_bd *)
-		    memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
+		    memalign(0x1000, GRETH_TXBD_CNT * sizeof(greth_bd));
 
 		/* allocate buffers to all descriptors  */
 		greth->rxbuf_base =

@@ -185,7 +195,7 @@ int greth_init(struct eth_device *dev, bd_t * bis)
 	for (i = 0; i < GRETH_TXBD_CNT; i++) {
 		greth->txbd_base[i].addr = 0;
 		/* enable desciptor & set wrap bit if last descriptor */
-		if (i >= (GRETH_RXBD_CNT - 1)) {
+		if (i >= (GRETH_TXBD_CNT - 1)) {
 			greth->txbd_base[i].stat = GRETH_BD_WR;
 		} else {
 			greth->txbd_base[i].stat = 0;

index bb20ab5..55b2757 100644
@@ -31,92 +31,380 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* We put these variables into .data section so that they are zero
- * when entering the AMBA Plug & Play routines (in cpu/cpu/ambapp.c)
- * the first time. BSS is not garantueed to be zero since BSS
- * hasn't been cleared the first times entering the CPU AMBA functions.
- *
- * The AMBA PnP routines call these functions if ambapp_???_print is set.
- *
- */
-int ambapp_apb_print __attribute__ ((section(".data"))) = 0;
-int ambapp_ahb_print __attribute__ ((section(".data"))) = 0;
-
 typedef struct {
 	int device_id;
 	char *name;
+	char *desc;
 } ambapp_device_name;
 
-static ambapp_device_name gaisler_devices[] = {
-	{GAISLER_LEON3, "GAISLER_LEON3"},
-	{GAISLER_LEON3DSU, "GAISLER_LEON3DSU"},
-	{GAISLER_ETHAHB, "GAISLER_ETHAHB"},
-	{GAISLER_ETHMAC, "GAISLER_ETHMAC"},
-	{GAISLER_APBMST, "GAISLER_APBMST"},
-	{GAISLER_AHBUART, "GAISLER_AHBUART"},
-	{GAISLER_SRCTRL, "GAISLER_SRCTRL"},
-	{GAISLER_SDCTRL, "GAISLER_SDCTRL"},
-	{GAISLER_APBUART, "GAISLER_APBUART"},
-	{GAISLER_IRQMP, "GAISLER_IRQMP"},
-	{GAISLER_AHBRAM, "GAISLER_AHBRAM"},
-	{GAISLER_GPTIMER, "GAISLER_GPTIMER"},
-	{GAISLER_PCITRG, "GAISLER_PCITRG"},
-	{GAISLER_PCISBRG, "GAISLER_PCISBRG"},
-	{GAISLER_PCIFBRG, "GAISLER_PCIFBRG"},
-	{GAISLER_PCITRACE, "GAISLER_PCITRACE"},
-	{GAISLER_AHBTRACE, "GAISLER_AHBTRACE"},
-	{GAISLER_ETHDSU, "GAISLER_ETHDSU"},
-	{GAISLER_PIOPORT, "GAISLER_PIOPORT"},
-	{GAISLER_AHBJTAG, "GAISLER_AHBJTAG"},
-	{GAISLER_ATACTRL, "GAISLER_ATACTRL"},
-	{GAISLER_VGA, "GAISLER_VGA"},
-	{GAISLER_KBD, "GAISLER_KBD"},
-	{GAISLER_L2TIME, "GAISLER_L2TIME"},
-	{GAISLER_L2C, "GAISLER_L2C"},
-	{GAISLER_PLUGPLAY, "GAISLER_PLUGPLAY"},
-	{GAISLER_SPW, "GAISLER_SPW"},
-	{GAISLER_SPW2, "GAISLER_SPW2"},
-	{GAISLER_EHCI, "GAISLER_EHCI"},
-	{GAISLER_UHCI, "GAISLER_UHCI"},
-	{GAISLER_AHBSTAT, "GAISLER_AHBSTAT"},
-	{GAISLER_DDR2SPA, "GAISLER_DDR2SPA"},
-	{GAISLER_DDRSPA, "GAISLER_DDRSPA"},
-	{0, NULL}
+typedef struct {
+        unsigned int vendor_id;
+        char *name;
+        char *desc;
+        ambapp_device_name *devices;
+} ambapp_vendor_devnames;    
+
+/** Vendor GAISLER devices */
+static ambapp_device_name GAISLER_devices[] =
+{
+  {GAISLER_LEON2DSU, "LEON2DSU", "Leon2 Debug Support Unit"},
+  {GAISLER_LEON3, "LEON3", "Leon3 SPARC V8 Processor"},
+  {GAISLER_LEON3DSU, "LEON3DSU", "Leon3 Debug Support Unit"},
+  {GAISLER_ETHAHB, "ETHAHB", "OC ethernet AHB interface"},
+  {GAISLER_APBMST, "APBMST", "AHB/APB Bridge"},
+  {GAISLER_AHBUART, "AHBUART", "AHB Debug UART"},
+  {GAISLER_SRCTRL, "SRCTRL", "Simple SRAM Controller"},
+  {GAISLER_SDCTRL, "SDCTRL", "PC133 SDRAM Controller"},
+  {GAISLER_SSRCTRL, "SSRCTRL", "Synchronous SRAM Controller"},
+  {GAISLER_APBUART, "APBUART", "Generic UART"},
+  {GAISLER_IRQMP, "IRQMP", "Multi-processor Interrupt Ctrl."},
+  {GAISLER_AHBRAM, "AHBRAM", "Single-port AHB SRAM module"},
+  {GAISLER_AHBDPRAM, "AHBDPRAM", "Dual-port AHB SRAM module"},
+  {GAISLER_GPTIMER, "GPTIMER", "Modular Timer Unit"},
+  {GAISLER_PCITRG, "PCITRG", "Simple 32-bit PCI Target"},
+  {GAISLER_PCISBRG, "PCISBRG", "Simple 32-bit PCI Bridge"},
+  {GAISLER_PCIFBRG, "PCIFBRG", "Fast 32-bit PCI Bridge"},
+  {GAISLER_PCITRACE, "PCITRACE", "32-bit PCI Trace Buffer"},
+  {GAISLER_DMACTRL, "DMACTRL", "AMBA DMA controller"},
+  {GAISLER_AHBTRACE, "AHBTRACE", "AMBA Trace Buffer"},
+  {GAISLER_DSUCTRL, "DSUCTRL", "DSU/ETH controller"},
+  {GAISLER_CANAHB, "CANAHB", "OC CAN AHB interface"},
+  {GAISLER_GPIO, "GPIO", "General Purpose I/O port"},
+  {GAISLER_AHBROM, "AHBROM", "Generic AHB ROM"},
+  {GAISLER_AHBJTAG, "AHBJTAG", "JTAG Debug Link"},
+  {GAISLER_ETHMAC, "ETHMAC", "GR Ethernet MAC"},
+  {GAISLER_SWNODE, "SWNODE", "SpaceWire Node Interface"},
+  {GAISLER_SPW, "SPW", "SpaceWire Serial Link"},
+  {GAISLER_AHB2AHB, "AHB2AHB", "AHB-to-AHB Bridge"},
+  {GAISLER_USBDC, "USBDC", "GR USB 2.0 Device Controller"},
+  {GAISLER_USB_DCL, "USB_DCL", "USB Debug Communication Link"},
+  {GAISLER_DDRMP, "DDRMP", "Multi-port DDR controller"},
+  {GAISLER_ATACTRL, "ATACTRL", "ATA controller"},
+  {GAISLER_DDRSP, "DDRSP", "Single-port DDR266 controller"},
+  {GAISLER_EHCI, "EHCI", "USB Enhanced Host Controller"},
+  {GAISLER_UHCI, "UHCI", "USB Universal Host Controller"},
+  {GAISLER_I2CMST, "I2CMST", "AMBA Wrapper for OC I2C-master"},
+  {GAISLER_SPW2, "SPW2", "GRSPW2 SpaceWire Serial Link"},
+  {GAISLER_AHBDMA, "AHBDMA", ""},
+  {GAISLER_NUHOSP3, "NUHOSP3", "Nuhorizons Spartan3 IO I/F"},
+  {GAISLER_CLKGATE, "CLKGATE", "Clock gating unit"},
+  {GAISLER_SPICTRL, "SPICTRL", "SPI Controller"},
+  {GAISLER_DDR2SP, "DDR2SP", "Single-port DDR2 controller"},
+  {GAISLER_SLINK, "SLINK", "SLINK Master"},
+  {GAISLER_GRTM, "GRTM", "CCSDS Telemetry Encoder"},
+  {GAISLER_GRTC, "GRTC", "CCSDS Telecommand Decoder"},
+  {GAISLER_GRPW, "GRPW", "PacketWire to AMBA AHB I/F"},
+  {GAISLER_GRCTM, "GRCTM", "CCSDS Time Manager"},
+  {GAISLER_GRHCAN, "GRHCAN", "ESA HurriCANe CAN with DMA"},
+  {GAISLER_GRFIFO, "GRFIFO", "FIFO Controller"},
+  {GAISLER_GRADCDAC, "GRADCDAC", "ADC / DAC Interface"},
+  {GAISLER_GRPULSE, "GRPULSE", "General Purpose I/O with Pulses"},
+  {GAISLER_GRTIMER, "GRTIMER", "Timer Unit with Latches"},
+  {GAISLER_AHB2PP, "AHB2PP", "AMBA AHB to Packet Parallel I/F"},
+  {GAISLER_GRVERSION, "GRVERSION", "Version and Revision Register"},
+  {GAISLER_APB2PW, "APB2PW", "PacketWire Transmit Interface"},
+  {GAISLER_PW2APB, "PW2APB", "PacketWire Receive Interface"},
+  {GAISLER_GRCAN, "GRCAN", "CAN Controller with DMA"},
+  {GAISLER_I2CSLV, "I2CSLV", "I2C Slave"},
+  {GAISLER_U16550, "U16550", "Simple 16550 UART"},
+  {GAISLER_AHBMST_EM, "AHBMST_EM", "AMBA Master Emulator"},
+  {GAISLER_AHBSLV_EM, "AHBSLV_EM", "AMBA Slave Emulator"},
+  {GAISLER_GRTESTMOD, "GRTESTMOD", "Test report module"},
+  {GAISLER_ASCS, "ASCS", "ASCS Master"},
+  {GAISLER_IPMVBCTRL, "IPMVBCTRL", "IPM-bus/MVBC memory controller"},
+  {GAISLER_SPIMCTRL, "SPIMCTRL", "SPI Memory Controller"},
+  {GAISLER_LEON4, "LEON4", "Leon4 SPARC V8 Processor"},
+  {GAISLER_LEON4DSU, "LEON4DSU", "Leon4 Debug Support Unit"},
+  {GAISLER_PWM, "PWM", "PWM generator"},
+  {GAISLER_L2CACHE, "L2CACHE", "L2-Cache Controller"},
+  {GAISLER_SDCTRL64, "SDCTRL64", ""},
+  {GAISLER_FTAHBRAM, "FTAHBRAM", "Generic FT AHB SRAM module"},
+  {GAISLER_FTSRCTRL, "FTSRCTRL", "Simple FT SRAM Controller"},
+  {GAISLER_AHBSTAT, "AHBSTAT", "AHB Status Register"},
+  {GAISLER_LEON3FT, "LEON3FT", "Leon3-FT SPARC V8 Processor"},
+  {GAISLER_FTMCTRL, "FTMCTRL", "Memory controller with EDAC"},
+  {GAISLER_FTSDCTRL, "FTSDCTRL", "FT PC133 SDRAM Controller"},
+  {GAISLER_FTSRCTRL8, "FTSRCTRL8", "FT 8-bit SRAM/16-bit IO Ctrl"},
+  {GAISLER_APBPS2, "APBPS2", "PS2 interface"},
+  {GAISLER_VGACTRL, "VGACTRL", "VGA controller"},
+  {GAISLER_LOGAN, "LOGAN", "On chip Logic Analyzer"},
+  {GAISLER_SVGACTRL, "SVGACTRL", "SVGA frame buffer"},
+  {GAISLER_T1AHB, "T1AHB", "Niagara T1 PCX/AHB bridge"},
+  {GAISLER_MP7WRAP, "MP7WRAP", "CoreMP7 wrapper"},
+  {GAISLER_GRSYSMON, "GRSYSMON", "AMBA wrapper for System Monitor"},
+  {GAISLER_GRACECTRL, "GRACECTRL", "System ACE I/F Controller"},
+  {GAISLER_ATAHBSLV, "ATAHBSLV", "AMBA Test Framework AHB Slave"},
+  {GAISLER_ATAHBMST, "ATAHBMST", "AMBA Test Framework AHB Master"},
+  {GAISLER_ATAPBSLV, "ATAPBSLV", "AMBA Test Framework APB Slave"},
+  {GAISLER_B1553BC, "B1553BC", "AMBA Wrapper for Core1553BBC"},
+  {GAISLER_B1553RT, "B1553RT", "AMBA Wrapper for Core1553BRT"},
+  {GAISLER_B1553BRM, "B1553BRM", "AMBA Wrapper for Core1553BRM"},
+  {GAISLER_AES, "AES", "Advanced Encryption Standard"},
+  {GAISLER_ECC, "ECC", "Elliptic Curve Cryptography"},
+  {GAISLER_PCIF, "PCIF", "AMBA Wrapper for CorePCIF"},
+  {GAISLER_CLKMOD, "CLKMOD", "CPU Clock Switching Ctrl module"},
+  {GAISLER_HAPSTRAK, "HAPSTRAK", "HAPS HapsTrak I/O Port"},
+  {GAISLER_TEST_1X2, "TEST_1X2", "HAPS TEST_1x2 interface"},
+  {GAISLER_WILD2AHB, "WILD2AHB", "WildCard CardBus interface"},
+  {GAISLER_BIO1, "BIO1", "Basic I/O board BIO1"},
+  {GAISLER_SATCAN, "SATCAN", "SatCAN controller"},
+  {GAISLER_CANMUX, "CANMUX", "CAN Bus multiplexer"},
+  {GAISLER_GRTMRX, "GRTMRX", "CCSDS Telemetry Receiver"},
+  {GAISLER_GRTCTX, "GRTCTX", "CCSDS Telecommand Transmitter"},
+  {GAISLER_GRTMDESC, "GRTMDESC", "CCSDS Telemetry Descriptor"},
+  {GAISLER_GRTMVC, "GRTMVC", "CCSDS Telemetry VC Generator"},
+  {GAISLER_GEFFE, "GEFFE", "Geffe Generator"},
+  {GAISLER_GPREG, "GPREG", ""},
+  {GAISLER_GRTMPAHB, "GRTMPAHB", "CCSDS Telemetry VC AHB Input"},
+  {0, NULL, NULL}
 };
 
-static ambapp_device_name esa_devices[] = {
-	{ESA_LEON2, "ESA_LEON2"},
-	{ESA_MCTRL, "ESA_MCTRL"},
-	{0, NULL}
+
+/** Vendor PENDER devices */
+static ambapp_device_name PENDER_devices[] =
+{
+  {0, NULL, NULL}
 };
 
-static ambapp_device_name opencores_devices[] = {
-	{OPENCORES_PCIBR, "OPENCORES_PCIBR"},
-	{OPENCORES_ETHMAC, "OPENCORES_ETHMAC"},
+
+/** Vendor ESA devices */
+static ambapp_device_name ESA_devices[] =
+{
+  {ESA_LEON2, "LEON2", "Leon2 SPARC V8 Processor"},
+  {ESA_LEON2APB, "LEON2APB", "Leon2 Peripheral Bus"},
+  {ESA_IRQ, "IRQ", "Leon2 Interrupt Controller"},
+  {ESA_TIMER, "TIMER", "Leon2 Timer"},
+  {ESA_UART, "UART", "Leon2 UART"},
+  {ESA_CFG, "CFG", "Leon2 Configuration Register"},
+  {ESA_IO, "IO", "Leon2 Input/Output"},
+  {ESA_MCTRL, "MCTRL", "Leon2 Memory Controller"},
+  {ESA_PCIARB, "PCIARB", "PCI Arbiter"},
+  {ESA_HURRICANE, "HURRICANE", "HurriCANe/HurryAMBA CAN Ctrl"},
+  {ESA_SPW_RMAP, "SPW_RMAP", "UoD/Saab SpaceWire/RMAP link"},
+  {ESA_AHBUART, "AHBUART", "Leon2 AHB Debug UART"},
+  {ESA_SPWA, "SPWA", "ESA/ASTRIUM SpaceWire link"},
+  {ESA_BOSCHCAN, "BOSCHCAN", "SSC/BOSCH CAN Ctrl"},
+  {ESA_IRQ2, "IRQ2", "Leon2 Secondary Irq Controller"},
+  {ESA_AHBSTAT, "AHBSTAT", "Leon2 AHB Status Register"},
+  {ESA_WPROT, "WPROT", "Leon2 Write Protection"},
+  {ESA_WPROT2, "WPROT2", "Leon2 Extended Write Protection"},
+  {ESA_PDEC3AMBA, "PDEC3AMBA", "ESA CCSDS PDEC3AMBA TC Decoder"},
+  {ESA_PTME3AMBA, "PTME3AMBA", "ESA CCSDS PTME3AMBA TM Encoder"},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor ASTRIUM devices */
+static ambapp_device_name ASTRIUM_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor OPENCHIP devices */
+static ambapp_device_name OPENCHIP_devices[] =
+{
+  {OPENCHIP_APBGPIO, "APBGPIO", "APB General Purpose IO"},
+  {OPENCHIP_APBI2C, "APBI2C", "APB I2C Interface"},
+  {OPENCHIP_APBSPI, "APBSPI", "APB SPI Interface"},
+  {OPENCHIP_APBCHARLCD, "APBCHARLCD", "APB Character LCD"},
+  {OPENCHIP_APBPWM, "APBPWM", "APB PWM"},
+  {OPENCHIP_APBPS2, "APBPS2", "APB PS/2 Interface"},
+  {OPENCHIP_APBMMCSD, "APBMMCSD", "APB MMC/SD Card Interface"},
+  {OPENCHIP_APBNAND, "APBNAND", "APB NAND(SmartMedia) Interface"},
+  {OPENCHIP_APBLPC, "APBLPC", "APB LPC Interface"},
+  {OPENCHIP_APBCF, "APBCF", "APB CompactFlash (IDE)"},
+  {OPENCHIP_APBSYSACE, "APBSYSACE", "APB SystemACE Interface"},
+  {OPENCHIP_APB1WIRE, "APB1WIRE", "APB 1-Wire Interface"},
+  {OPENCHIP_APBJTAG, "APBJTAG", "APB JTAG TAP Master"},
+  {OPENCHIP_APBSUI, "APBSUI", "APB Simple User Interface"},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor OPENCORES devices */
+static ambapp_device_name OPENCORES_devices[] =
+{
+	{OPENCORES_PCIBR, "PCIBR", "PCI Bridge"},
+	{OPENCORES_ETHMAC, "ETHMAC", "Ethernet MAC"},
 	{0, NULL}
 };
 
-typedef struct {
-	unsigned int vendor_id;
-	char *name;
-	ambapp_device_name *devices;
-} ambapp_vendor_devnames;
-
-static ambapp_vendor_devnames vendors[] = {
-	{VENDOR_GAISLER, "VENDOR_GAISLER", gaisler_devices},
-	{VENDOR_ESA, "VENDOR_ESA", esa_devices},
-	{VENDOR_OPENCORES, "VENDOR_OPENCORES", opencores_devices},
-	{0, NULL, 0}
+
+/** Vendor CONTRIB devices */
+static ambapp_device_name CONTRIB_devices[] =
+{
+  {CONTRIB_CORE1, "CORE1", "Contributed core 1"},
+  {CONTRIB_CORE2, "CORE2", "Contributed core 2"},
+  {0, NULL, NULL}
 };
 
-static char *ambapp_get_devname(ambapp_device_name * devs, int id)
+
+/** Vendor EONIC devices */
+static ambapp_device_name EONIC_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor RADIONOR devices */
+static ambapp_device_name RADIONOR_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor GLEICHMANN devices */
+static ambapp_device_name GLEICHMANN_devices[] =
+{
+  {GLEICHMANN_CUSTOM, "CUSTOM", "Custom device"},
+  {GLEICHMANN_GEOLCD01, "GEOLCD01", "GEOLCD01 graphics system"},
+  {GLEICHMANN_DAC, "DAC", "Sigma delta DAC"},
+  {GLEICHMANN_HPI, "HPI", "AHB-to-HPI bridge"},
+  {GLEICHMANN_SPI, "SPI", "SPI master"},
+  {GLEICHMANN_HIFC, "HIFC", "Human interface controller"},
+  {GLEICHMANN_ADCDAC, "ADCDAC", "Sigma delta ADC/DAC"},
+  {GLEICHMANN_SPIOC, "SPIOC", ""},
+  {GLEICHMANN_AC97, "AC97", ""},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor MENTA devices */
+static ambapp_device_name MENTA_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor SUN devices */
+static ambapp_device_name SUN_devices[] =
+{
+  {SUN_T1, "T1", "Niagara T1 SPARC V9 Processor"},
+  {SUN_S1, "S1", "Niagara S1 SPARC V9 Processor"},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor MOVIDIA devices */
+static ambapp_device_name MOVIDIA_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor ORBITA devices */
+static ambapp_device_name ORBITA_devices[] =
+{
+  {ORBITA_1553B, "1553B", "MIL-STD-1553B Controller"},
+  {ORBITA_429, "429", "429 Interface"},
+  {ORBITA_SPI, "SPI", "SPI Interface"},
+  {ORBITA_I2C, "I2C", "I2C Interface"},
+  {ORBITA_SMARTCARD, "SMARTCARD", "Smart Card Reader"},
+  {ORBITA_SDCARD, "SDCARD", "SD Card Reader"},
+  {ORBITA_UART16550, "UART16550", "16550 UART"},
+  {ORBITA_CRYPTO, "CRYPTO", "Crypto Engine"},
+  {ORBITA_SYSIF, "SYSIF", "System Interface"},
+  {ORBITA_PIO, "PIO", "Programmable IO module"},
+  {ORBITA_RTC, "RTC", "Real-Time Clock"},
+  {ORBITA_COLORLCD, "COLORLCD", "Color LCD Controller"},
+  {ORBITA_PCI, "PCI", "PCI Module"},
+  {ORBITA_DSP, "DSP", "DPS Co-Processor"},
+  {ORBITA_USBHOST, "USBHOST", "USB Host"},
+  {ORBITA_USBDEV, "USBDEV", "USB Device"},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor SYNOPSYS devices */
+static ambapp_device_name SYNOPSYS_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor NASA devices */
+static ambapp_device_name NASA_devices[] =
+{
+  {NASA_EP32, "EP32", "EP32 Forth processor"},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor CAL devices */
+static ambapp_device_name CAL_devices[] =
+{
+  {CAL_DDRCTRL, "DDRCTRL", ""},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor EMBEDDIT devices */
+static ambapp_device_name EMBEDDIT_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor CETON devices */
+static ambapp_device_name CETON_devices[] =
+{
+  {0, NULL, NULL}
+};
+
+
+/** Vendor ACTEL devices */
+static ambapp_device_name ACTEL_devices[] =
+{
+  {ACTEL_COREMP7, "COREMP7", "CoreMP7 Processor"},
+  {0, NULL, NULL}
+};
+
+
+/** Vendor APPLECORE devices */
+static ambapp_device_name APPLECORE_devices[] =
+{
+  {APPLECORE_UTLEON3, "UTLEON3", "AppleCore uT-LEON3 Processor"},
+  {APPLECORE_UTLEON3DSU, "UTLEON3DSU", "AppleCore uT-LEON3 DSU"},
+  {0, NULL, NULL}
+};
+
+
+/** Vendors and their devices */
+static ambapp_vendor_devnames vendors[] = 
+{
+  {VENDOR_GAISLER, "GAISLER", "Gaisler Research", GAISLER_devices},
+  {VENDOR_PENDER, "PENDER", "", PENDER_devices},
+  {VENDOR_ESA, "ESA", "European Space Agency", ESA_devices},
+  {VENDOR_ASTRIUM, "ASTRIUM", "", ASTRIUM_devices},
+  {VENDOR_OPENCHIP, "OPENCHIP", "OpenChip", OPENCHIP_devices},
+  {VENDOR_OPENCORES, "OPENCORES", "OpenCores", OPENCORES_devices},
+  {VENDOR_CONTRIB, "CONTRIB", "Various contributions", CONTRIB_devices},
+  {VENDOR_EONIC, "EONIC", "Eonic BV", EONIC_devices},
+  {VENDOR_RADIONOR, "RADIONOR", "Radionor Communications", RADIONOR_devices},
+  {VENDOR_GLEICHMANN, "GLEICHMANN", "Gleichmann Electronics", GLEICHMANN_devices},
+  {VENDOR_MENTA, "MENTA", "Menta", MENTA_devices},
+  {VENDOR_SUN, "SUN", "Sun Microsystems", SUN_devices},
+  {VENDOR_MOVIDIA, "MOVIDIA", "", MOVIDIA_devices},
+  {VENDOR_ORBITA, "ORBITA", "Orbita", ORBITA_devices},
+  {VENDOR_SYNOPSYS, "SYNOPSYS", "Synopsys Inc.", SYNOPSYS_devices},
+  {VENDOR_NASA, "NASA", "NASA", NASA_devices},
+  {VENDOR_CAL, "CAL", "", CAL_devices},
+  {VENDOR_EMBEDDIT, "EMBEDDIT", "Embedd.it", EMBEDDIT_devices},
+  {VENDOR_CETON, "CETON", "Ceton Corporation", CETON_devices},
+  {VENDOR_ACTEL, "ACTEL", "Actel Corporation", ACTEL_devices},
+  {VENDOR_APPLECORE, "APPLECORE", "AppleCore", APPLECORE_devices},
+  {0, NULL, NULL, NULL}
+};
+
+static ambapp_device_name *ambapp_get_dev(ambapp_device_name * devs, int id)
 {
 	if (!devs)
 		return NULL;
 
 	while (devs->device_id > 0) {
 		if (devs->device_id == id)
-			return devs->name;
+			return devs;
 		devs++;
 	}
 	return NULL;

@@ -125,10 +413,31 @@ static char *ambapp_get_devname(ambapp_device_name * devs, int id)
 char *ambapp_device_id2str(int vendor, int id)
 {
 	ambapp_vendor_devnames *ven = &vendors[0];
+	ambapp_device_name *dev;
+
+	while (ven->vendor_id > 0) {
+		if (ven->vendor_id == vendor) {
+			dev = ambapp_get_dev(ven->devices, id);
+			if ( !dev )
+				return NULL;
+			return dev->name;
+		}
+		ven++;
+	}
+	return NULL;
+}
+
+char *ambapp_device_id2desc(int vendor, int id)
+{
+	ambapp_vendor_devnames *ven = &vendors[0];
+	ambapp_device_name *dev;
 
 	while (ven->vendor_id > 0) {
 		if (ven->vendor_id == vendor) {
-			return ambapp_get_devname(ven->devices, id);
+			dev = ambapp_get_dev(ven->devices, id);
+			if ( !dev )
+				return NULL;
+			return dev->desc;
 		}
 		ven++;
 	}

@@ -150,101 +459,107 @@ char *ambapp_vendor_id2str(int vendor)
 
 static char *unknown = "unknown";
 
+char *ambapp_type_names[4] =
+{
+	/* 0 */ "UNUSED",
+	/* 1 */ "apb",
+	/* 2 */ "ahbmem",
+	/* 3 */ "ahbio"
+};
+
 /* Print one APB device */
-void ambapp_print_apb(apbctrl_pp_dev * apb, ambapp_ahbdev * apbmst, int index)
+void ambapp_print_apb(ambapp_apbdev *dev, int index)
 {
 	char *dev_str, *ven_str;
-	int irq, ver, vendor, deviceid;
-	unsigned int address, apbmst_base, mask;
-
-	vendor = amba_vendor(apb->conf);
-	deviceid = amba_device(apb->conf);
-	irq = amba_irq(apb->conf);
-	ver = amba_ver(apb->conf);
-	apbmst_base = apbmst->address[0] & LEON3_IO_AREA;
-	address = (apbmst_base | (((apb->bar & 0xfff00000) >> 12))) &
-	    (((apb->bar & 0x0000fff0) << 4) | 0xfff00000);
-
-	mask = amba_membar_mask(apb->bar) << 8;
-	mask = ((~mask) & 0x000fffff) + 1;
+	unsigned int freq;
 
-	ven_str = ambapp_vendor_id2str(vendor);
+	ven_str = ambapp_vendor_id2str(dev->vendor);
 	if (!ven_str) {
 		ven_str = unknown;
 		dev_str = unknown;
 	} else {
-		dev_str = ambapp_device_id2str(vendor, deviceid);
+		dev_str = ambapp_device_id2str(dev->vendor, dev->device);
 		if (!dev_str)
 			dev_str = unknown;
 	}
+	
+	/* Get Frequency of Core */
+	freq = ambapp_bus_freq(&ambapp_plb, dev->ahb_bus_index);
 
-	printf("0x%02x:0x%02x:0x%02x: %s  %s\n"
+	printf("0x%02x:0x%02x:0x%02x: %s  %s  (%dkHz)\n"
 	       "   apb: 0x%08x - 0x%08x\n"
 	       "   irq: %-2d (ver: %-2d)\n",
-	       index, vendor, deviceid, ven_str, dev_str, address,
-	       address + mask, irq, ver);
+	       index, dev->vendor, dev->device, ven_str, dev_str, freq / 1000,
+	       dev->address, dev->address + (dev->mask-1),
+	       dev->irq, dev->ver);
 }
 
-void ambapp_print_ahb(ahbctrl_pp_dev * ahb, int index)
+void ambapp_print_ahb(ambapp_ahbdev *dev, int index)
 {
-	char *dev_str, *ven_str;
-	int irq, ver, vendor, deviceid;
-	unsigned int addr, mask;
-	int j;
-
-	vendor = amba_vendor(ahb->conf);
-	deviceid = amba_device(ahb->conf);
-	irq = amba_irq(ahb->conf);
-	ver = amba_ver(ahb->conf);
+	char *dev_str, *ven_str, *type_str;
+	int i;
+	unsigned int freq;
 
-	ven_str = ambapp_vendor_id2str(vendor);
+	ven_str = ambapp_vendor_id2str(dev->vendor);
 	if (!ven_str) {
 		ven_str = unknown;
 		dev_str = unknown;
 	} else {
-		dev_str = ambapp_device_id2str(vendor, deviceid);
+		dev_str = ambapp_device_id2str(dev->vendor, dev->device);
 		if (!dev_str)
 			dev_str = unknown;
 	}
 
-	printf("0x%02x:0x%02x:0x%02x: %s  %s\n",
-	       index, vendor, deviceid, ven_str, dev_str);
+	/* Get Frequency of Core */
+	freq = ambapp_bus_freq(&ambapp_plb, dev->ahb_bus_index);
 
-	for (j = 0; j < 4; j++) {
-		addr = amba_membar_start(ahb->bars[j]);
-		if (amba_membar_type(ahb->bars[j]) == 0)
+	printf("0x%02x:0x%02x:0x%02x: %s  %s  (%dkHz)\n",
+	       index, dev->vendor, dev->device, ven_str, dev_str, freq / 1000);
+
+	for (i = 0; i < 4; i++) {
+		if ( dev->type[i] == 0 )
 			continue;
-		if (amba_membar_type(ahb->bars[j]) == AMBA_TYPE_AHBIO)
-			addr = AMBA_TYPE_AHBIO_ADDR(addr);
-		mask = amba_membar_mask(ahb->bars[j]) << 20;
-		printf("   mem: 0x%08x - 0x%08x\n", addr, addr + ((~mask) + 1));
+		type_str = ambapp_type_names[dev->type[i]];
+		printf("   %-7s: 0x%08x - 0x%08x\n", type_str, dev->address[i], 	
+			dev->address[i] + (dev->mask[i]-1));
 	}
 
-	printf("   irq: %-2d (ver: %d)\n", irq, ver);
+	printf("   irq: %-2d (ver: %d)\n", dev->irq, dev->ver);
 }
 
 int do_ambapp_print(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
+	int index;
+	ambapp_apbdev apbdev;
+	ambapp_ahbdev ahbdev;
 
 	/* Print AHB Masters */
-	puts("--------- AHB Masters ---------\n");
-	ambapp_apb_print = 0;
-	ambapp_ahb_print = 1;
-	ambapp_ahbmst_count(99, 99);	/* Get vendor&device 99 = nonexistent... */
+	puts("\n--------- AHB Masters ---------\n");
+	index = 0;
+	while ( ambapp_ahbmst_find(&ambapp_plb, 0, 0, index, &ahbdev) == 1 ) {
+		/* Found a AHB Master Device */
+		ambapp_print_ahb(&ahbdev, index);
+		index++;
+	}
 
 	/* Print AHB Slaves */
-	puts("--------- AHB Slaves  ---------\n");
-	ambapp_ahbslv_count(99, 99);	/* Get vendor&device 99 = nonexistent... */
+	puts("\n--------- AHB Slaves  ---------\n");
+	index = 0;
+	while ( ambapp_ahbslv_find(&ambapp_plb, 0, 0, index, &ahbdev) == 1 ) {
+		/* Found a AHB Slave Device */
+		ambapp_print_ahb(&ahbdev, index);
+		index++;
+	}
 
 	/* Print APB Slaves */
-	puts("--------- APB Slaves  ---------\n");
-	ambapp_apb_print = 1;
-	ambapp_ahb_print = 0;
-	ambapp_apb_count(99, 99);	/* Get vendor&device 99 = nonexistent... */
-
-	/* Reset, no futher printing */
-	ambapp_apb_print = 0;
-	ambapp_ahb_print = 0;
+	puts("\n--------- APB Slaves  ---------\n");
+	index = 0;
+	while ( ambapp_apb_find(&ambapp_plb, 0, 0, index, &apbdev) == 1 ) {
+		/* Found a APB Slave Device */
+		ambapp_print_apb(&apbdev, index);
+		index++;
+	}
+
 	puts("\n");
 	return 0;
 }

@@ -256,16 +571,19 @@ int ambapp_init_reloc(void)
 
 	while (vend->vendor_id && vend->name) {
 		vend->name = (char *)((unsigned int)vend->name + gd->reloc_off);
+		vend->desc = (char *)((unsigned int)vend->desc + gd->reloc_off);
 		vend->devices =
 		    (ambapp_device_name *) ((unsigned int)vend->devices +
-					    gd->reloc_off);;
+					    gd->reloc_off);
 		dev = vend->devices;
 		vend++;
 		if (!dev)
 			continue;
 		while (dev->device_id && dev->name) {
 			dev->name =
-			    (char *)((unsigned int)dev->name + gd->reloc_off);;
+			    (char *)((unsigned int)dev->name + gd->reloc_off);
+			dev->desc =
+			    (char *)((unsigned int)dev->desc + gd->reloc_off);
 			dev++;
 		}
 	}

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index 4b2fcb8..15c380e 100644
@@ -30,6 +30,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* Select which UART that will become u-boot console */
+#ifndef CONFIG_SYS_GRLIB_APBUART_INDEX
+#define CONFIG_SYS_GRLIB_APBUART_INDEX 0
+#endif
+
 /* Force cache miss each time a serial controller reg is read */
 #define CACHE_BYPASS 1
 

@@ -48,7 +53,8 @@ int serial_init(void)
 	unsigned int tmp;
 
 	/* find UART */
-	if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_APBUART, &apbdev) == 1) {
+	if (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_APBUART,
+		CONFIG_SYS_GRLIB_APBUART_INDEX, &apbdev) == 1) {
 
 		leon3_apbuart = (ambapp_dev_apbuart *) apbdev.address;
 

index 8f99e1d..01310e2 100644
@@ -708,11 +708,11 @@ void handle_usb_interrupt(void)
  */
 int usb_lowlevel_init(void)
 {
-	unsigned char temp;
 	ambapp_ahbdev ahbdev;
 
 	/* Find GRUSB core using AMBA Plug&Play information */
-	if (ambapp_ahbslv_first(VENDOR_GAISLER, GAISLER_UHCI, &ahbdev) != 1) {
+	if (ambapp_ahbslv_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_UHCI,
+		CONFIG_SYS_GRLIB_GRUSB_INDEX, &ahbdev) != 1 ) {
 		printf("USB UHCI: Failed to find GRUSB controller\n");
 		return -1;
 	}

index 383b25c..5ac0379 100644
@@ -42,6 +42,13 @@
 #define GRETH_PHY_TIMEOUT_MS 3000
 #endif
 
+/* Let board select which GRETH to use as network interface, set
+ * this to zero if only one GRETH is available.
+ */
+#ifndef CONFIG_SYS_GRLIB_GRETH_INDEX
+#define CONFIG_SYS_GRLIB_GRETH_INDEX 0
+#endif
+
 /* ByPass Cache when reading regs */
 #define GRETH_REGLOAD(addr)		SPARC_NOCACHE_READ(addr)
 /* Write-through cache ==> no bypassing needed on writes */

@@ -605,8 +612,12 @@ int greth_initialize(bd_t * bis)
 #ifdef DEBUG
 	printf("Scanning for GRETH\n");
 #endif
-	/* Find Device & IRQ via AMBA Plug&Play information */
-	if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) {
+	/* Find Device & IRQ via AMBA Plug&Play information,
+	 * CONFIG_SYS_GRLIB_GRETH_INDEX select which GRETH if multiple
+	 * GRETHs in system.
+	 */
+	if (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_ETHMAC,
+			CONFIG_SYS_GRLIB_GRETH_INDEX, &apbdev) != 1) {
 		return -1;	/* GRETH not found */
 	}
 

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index d188439..b9d45dd 100644
@@ -340,33 +340,36 @@
 /* AMBA Plug & Play info display on startup */
 /*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
 
-#define CONFIG_SYS_GRLIB_SDRAM    0
+/* No SDRAM Configuration */
+#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
 
 /* See, GRLIB Docs (grip.pdf) on how to set up
  * These the memory controller registers.
  */
-#define CONFIG_SYS_GRLIB_MEMCFG1   (0x10f800ff | (1<<11))
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1   (0x10f800ff | (1<<11))
 #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
-#define CONFIG_SYS_GRLIB_MEMCFG2   0x82206000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2   0x82206000
 #else
-#define CONFIG_SYS_GRLIB_MEMCFG2   0x82205260
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2   0x82205260
 #endif
-#define CONFIG_SYS_GRLIB_MEMCFG3   0x0809a000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3   0x0809a000
 
-#define CONFIG_SYS_GRLIB_FT_MEMCFG1   (0x10f800ff | (1<<11))
+/* GRLIB FT-MCTRL configuration */
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1   (0x10f800ff | (1<<11))
 #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
-#define CONFIG_SYS_GRLIB_FT_MEMCFG2   0x82206000
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2   0x82206000
 #else
-#define CONFIG_SYS_GRLIB_FT_MEMCFG2   0x82205260
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2   0x82205260
 #endif
-#define CONFIG_SYS_GRLIB_FT_MEMCFG3   0x0809a000
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3   0x0809a000
 
 /* no DDR controller */
-#define CONFIG_SYS_GRLIB_DDR_CFG   0x00000000
+#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
 
 /* no DDR2 Controller */
-#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
-#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
+#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
 
 /* Calculate scaler register value from default baudrate */
 #define CONFIG_SYS_GRLIB_APBUART_SCALER \

index 3a568ff..6edb92c 100644
@@ -326,23 +326,29 @@
 /* AMBA Plug & Play info display on startup */
 /*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
 
-#define CONFIG_SYS_GRLIB_SDRAM    0
+/* No SDRAM Configuration */
+#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
 
 /* See, GRLIB Docs (grip.pdf) on how to set up
  * These the memory controller registers.
  */
-#define CONFIG_SYS_GRLIB_MEMCFG1  (0x10f800ff | (1<<11))
-#define CONFIG_SYS_GRLIB_MEMCFG2  0x00000000
-#define CONFIG_SYS_GRLIB_MEMCFG3  0x00000000
-
-#define CONFIG_SYS_GRLIB_FT_MEMCFG1  (0x10f800ff | (1<<11))
-#define CONFIG_SYS_GRLIB_FT_MEMCFG2  0x00000000
-#define CONFIG_SYS_GRLIB_FT_MEMCFG3  0x00000000
-
-#define CONFIG_SYS_GRLIB_DDR_CFG  0xa900830a
-
-#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
-#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1  (0x10f800ff | (1<<11))
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2  0x00000000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3  0x00000000
+
+/* GRLIB FT-MCTRL configuration */
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1  (0x10f800ff | (1<<11))
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2  0x00000000
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3  0x00000000
+
+/* DDR controller */
+#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
+#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL  0xa900830a
+
+/* no DDR2 Controller */
+#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
 
 /* Calculate scaler register value from default baudrate */
 #define CONFIG_SYS_GRLIB_APBUART_SCALER \

index 4dd9a0f..1f9dd4a 100644
@@ -288,25 +288,28 @@
 /* AMBA Plug & Play info display on startup */
 /*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
 
-#define CONFIG_SYS_GRLIB_SDRAM    0
+/* No SDRAM Configuration */
+#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
 
 /* See, GRLIB Docs (grip.pdf) on how to set up
  * These the memory controller registers.
  */
-#define CONFIG_SYS_GRLIB_MEMCFG1   (0x000000ff | (1<<11))
-#define CONFIG_SYS_GRLIB_MEMCFG2   0x82206000
-#define CONFIG_SYS_GRLIB_MEMCFG3   0x00136000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1   (0x000000ff | (1<<11))
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2   0x82206000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3   0x00136000
 
-#define CONFIG_SYS_GRLIB_FT_MEMCFG1   (0x000000ff | (1<<11))
-#define CONFIG_SYS_GRLIB_FT_MEMCFG2   0x82206000
-#define CONFIG_SYS_GRLIB_FT_MEMCFG3   0x00136000
+/* GRLIB FT-MCTRL configuration */
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1   (0x000000ff | (1<<11))
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2   0x82206000
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3   0x00136000
 
 /* no DDR controller */
-#define CONFIG_SYS_GRLIB_DDR_CFG   0x00000000
+#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
 
 /* no DDR2 Controller */
-#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
-#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
+#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
 
 /* Calculate scaler register value from default baudrate */
 #define CONFIG_SYS_GRLIB_APBUART_SCALER \

index c3f1a31..f815672 100644
@@ -307,27 +307,32 @@
 /* AMBA Plug & Play info display on startup */
 /*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
 
-#define CONFIG_SYS_GRLIB_SDRAM     0
-#define CONFIG_SYS_GRLIB_MEMCFG1   (0x000000ff | (1<<11))
+/* No SDRAM Configuration */
+#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
+
+/* LEON2 MCTRL configuration */
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1   (0x000000ff | (1<<11))
 #if CONFIG_GRSIM
 /* GRSIM configuration */
-#define CONFIG_SYS_GRLIB_MEMCFG2   0x82206000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2   0x82206000
 #else
 /* TSIM configuration */
-#define CONFIG_SYS_GRLIB_MEMCFG2   0x00001820
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2   0x00001820
 #endif
-#define CONFIG_SYS_GRLIB_MEMCFG3   0x00136000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3   0x00136000
 
-#define CONFIG_SYS_GRLIB_FT_MEMCFG1   (0x000000ff | (1<<11))
-#define CONFIG_SYS_GRLIB_FT_MEMCFG2   0x82206000
-#define CONFIG_SYS_GRLIB_FT_MEMCFG3   0x00136000
+/* GRLIB FT-MCTRL configuration */
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1   (0x000000ff | (1<<11))
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2   0x82206000
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3   0x00136000
 
 /* no DDR controller */
-#define CONFIG_SYS_GRLIB_DDR_CFG   0x00000000
+#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
 
 /* no DDR2 Controller */
-#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
-#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
+#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
 
 #define CONFIG_SYS_GRLIB_APBUART_SCALER \
  ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)

index 046cfb8..e2e1181 100644
@@ -28,6 +28,8 @@
 #include <asm/asi.h>
 #include <asm/leon.h>
 #include <ambapp.h>
+#include <grlib/irqmp.h>
+#include <grlib/gptimer.h>
 
 #include <config.h>
 

@@ -41,11 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /* reset CPU (jump to 0, without reset) */
 void start(void);
 
-/* find & initialize the memory controller */
-int init_memory_ctrl(void);
-
 ambapp_dev_irqmp *irqmp = NULL;
-ambapp_dev_mctrl memctrl;
 ambapp_dev_gptimer *gptimer = NULL;
 unsigned int gptimer_irq = 0;
 int leon3_snooping_avail = 0;

@@ -164,8 +162,8 @@ int timer_interrupt_init_cpu(void)
 	gptimer->e[0].val = 0;
 	gptimer->e[0].rld = 999;	/* (((1000000 / 100) - 1)) */
 	gptimer->e[0].ctrl =
-	    (LEON3_GPTIMER_EN |
-	     LEON3_GPTIMER_RL | LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN);
+	    (GPTIMER_CTRL_EN | GPTIMER_CTRL_RS |
+	     GPTIMER_CTRL_LD | GPTIMER_CTRL_IE);
 
 	return gptimer_irq;
 }

index ac6aca5..d927de1 100644
@@ -39,6 +39,8 @@
 
 #include <asm/leon.h>
 #include <ambapp.h>
+#include <grlib/irqmp.h>
+#include <grlib/gptimer.h>
 
 /* 15 normal irqs and a non maskable interrupt */
 #define NR_IRQS 15

@@ -141,9 +143,8 @@ int interrupt_init_cpu(void)
 /* Handle Timer 0 IRQ */
 void timer_interrupt_cpu(void *arg)
 {
-	gptimer->e[0].ctrl = (LEON3_GPTIMER_EN |
-			      LEON3_GPTIMER_RL |
-			      LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN);
+	gptimer->e[0].ctrl = (GPTIMER_CTRL_EN | GPTIMER_CTRL_RS |
+			      GPTIMER_CTRL_LD | GPTIMER_CTRL_IE);
 	/* nothing to do here */
 	return;
 }

index 0b4738e..02086ce 100644
@@ -54,7 +54,6 @@ extern struct grlib_mctrl_handler grlib_mctrl_handlers[];
 #define MH_STRUCT_SIZE		(4*4)
 #define MH_TYPE			0x00
 #define MH_INDEX		0x01
-#define MH_UNUSED		0x02
 #define MH_VENDOR_DEVICE	0x04
 #define MH_FUNC			0x08
 #define MH_PRIV			0x0c

index 18d2fb2..86376bb 100644
@@ -32,6 +32,9 @@
 #include <asm/irq.h>
 #include <asm/leon.h>
 #include <ambapp.h>
+#include <grlib/apbuart.h>
+#include <grlib/irqmp.h>
+#include <grlib/gptimer.h>
 
 #include <config.h>
 /*

@@ -757,14 +760,14 @@ static int PROM_TEXT leon_nbputchar(int c)
 
 	/* Wait for last character to go. */
 	while (!(SPARC_BYPASS_READ(&uart->status)
-		 & LEON_REG_UART_STATUS_THE)) ;
+		 & APBUART_STATUS_THE)) ;
 
 	/* Send data */
 	SPARC_BYPASS_WRITE(&uart->data, c);
 
 	/* Wait for data to be sent */
 	while (!(SPARC_BYPASS_READ(&uart->status)
-		 & LEON_REG_UART_STATUS_TSE)) ;
+		 & APBUART_STATUS_TSE)) ;
 
 	return 0;
 }

index 15c380e..8964310 100644
@@ -27,6 +27,7 @@
 #include <asm/processor.h>
 #include <asm/leon.h>
 #include <ambapp.h>
+#include <grlib/apbuart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -69,9 +70,9 @@ int serial_init(void)
 		/* Let bit 11 be unchanged (debug bit for GRMON) */
 		tmp = READ_WORD(leon3_apbuart->ctrl);
 
-		leon3_apbuart->ctrl = ((tmp & LEON_REG_UART_CTRL_DBG) |
-				       LEON_REG_UART_CTRL_RE |
-				       LEON_REG_UART_CTRL_TE);
+		leon3_apbuart->ctrl = ((tmp & APBUART_CTRL_DBG) |
+				       APBUART_CTRL_RE |
+				       APBUART_CTRL_TE);
 
 		return 0;
 	}

@@ -92,14 +93,14 @@ void serial_putc_raw(const char c)
 		return;
 
 	/* Wait for last character to go. */
-	while (!(READ_WORD(leon3_apbuart->status) & LEON_REG_UART_STATUS_THE)) ;
+	while (!(READ_WORD(leon3_apbuart->status) & APBUART_STATUS_THE)) ;
 
 	/* Send data */
 	leon3_apbuart->data = c;
 
 #ifdef LEON_DEBUG
 	/* Wait for data to be sent */
-	while (!(READ_WORD(leon3_apbuart->status) & LEON_REG_UART_STATUS_TSE)) ;
+	while (!(READ_WORD(leon3_apbuart->status) & APBUART_STATUS_TSE)) ;
 #endif
 }
 

@@ -116,7 +117,7 @@ int serial_getc(void)
 		return 0;
 
 	/* Wait for a character to arrive. */
-	while (!(READ_WORD(leon3_apbuart->status) & LEON_REG_UART_STATUS_DR)) ;
+	while (!(READ_WORD(leon3_apbuart->status) & APBUART_STATUS_DR)) ;
 
 	/* read data */
 	return READ_WORD(leon3_apbuart->data);

@@ -125,8 +126,7 @@ int serial_getc(void)
 int serial_tstc(void)
 {
 	if (leon3_apbuart)
-		return (READ_WORD(leon3_apbuart->status) &
-			LEON_REG_UART_STATUS_DR);
+		return (READ_WORD(leon3_apbuart->status) & APBUART_STATUS_DR);
 	return 0;
 }
 

index 5ac0379..582bc81 100644
@@ -35,7 +35,7 @@
 
 /* #define DEBUG */
 
-#include "greth.h"
+#include <grlib/greth.h>
 
 /* Default to 3s timeout on autonegotiation */
 #ifndef GRETH_PHY_TIMEOUT_MS

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new file mode 100644
index 0000000..1cf45ee
@@ -0,0 +1,39 @@
+/* GRLIB IRQMP (IRQ Multi-processor controller) definitions
+ *
+ * (C) Copyright 2010
+ * Daniel Hellstrom, Aeroflex Gaisler, [email protected]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __GRLIB_IRQMP_H__
+#define __GRLIB_IRQMP_H__
+
+typedef struct {
+	volatile unsigned int ilevel;
+	volatile unsigned int ipend;
+	volatile unsigned int iforce;
+	volatile unsigned int iclear;
+	volatile unsigned int mstatus;
+	volatile unsigned int notused[11];
+	volatile unsigned int cpu_mask[16];
+	volatile unsigned int cpu_force[16];
+} ambapp_dev_irqmp;
+
+#endif

index 8964310..1f17ede 100644
@@ -47,11 +47,18 @@ DECLARE_GLOBAL_DATA_PTR;
 #endif
 
 ambapp_dev_apbuart *leon3_apbuart = NULL;
+unsigned int apbuart_freq = CONFIG_SYS_CLK_FREQ;
+
+unsigned int apbuart_calc_scaler(unsigned int apbuart_freq, unsigned int baud)
+{
+	return ((((apbuart_freq*10)/(baud*8))-5)/10);
+}
 
 int serial_init(void)
 {
 	ambapp_apbdev apbdev;
 	unsigned int tmp;
+	unsigned int freq;
 
 	/* find UART */
 	if (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_APBUART,

@@ -65,7 +72,13 @@ int serial_init(void)
 		 *
 		 * Receiver & transmitter enable
 		 */
+#ifdef CONFIG_SYS_GRLIB_APBUART_SCALER
 		leon3_apbuart->scaler = CONFIG_SYS_GRLIB_APBUART_SCALER;
+#else
+		/* APBUART Frequency is equal to bus frequency */
+		freq = ambapp_bus_freq(&ambapp_plb, apbdev.ahb_bus_index);
+		leon3_apbuart->scaler = apbuart_calc_scaler(freq, CONFIG_BAUDRATE);
+#endif
 
 		/* Let bit 11 be unchanged (debug bit for GRMON) */
 		tmp = READ_WORD(leon3_apbuart->ctrl);

@@ -136,9 +149,7 @@ void serial_setbrg(void)
 	/* update baud rate settings, read it from gd->baudrate */
 	unsigned int scaler;
 	if (leon3_apbuart && (gd->baudrate > 0)) {
-		scaler =
-		    (((CONFIG_SYS_CLK_FREQ * 10) / (gd->baudrate * 8)) -
-		     5) / 10;
+		scaler = apbuart_calc_scaler(apbuart_freq, gd->baudrate);
 		leon3_apbuart->scaler = scaler;
 	}
 	return;

index c5538c0..ce78169 100644
@@ -46,4 +46,7 @@ extern int intLock(void);
 /* Sets the PIL to oldLevel */
 extern void intUnlock(int oldLevel);
 
+/* Return non-zero if interrupts are currently enabled */
+extern int interrupt_is_enabled(void);
+
 #endif

index 4c73b82..4d53e8c 100644
@@ -63,6 +63,13 @@ int disable_interrupts(void)
 	return intLock();
 }
 
+int interrupt_is_enabled(void)
+{
+	if ( get_pil() == 15 )
+		return 0;
+	return 1;
+}
+
 int interrupt_init(void)
 {
 	int ret;

index e2e1181..d2f47e1 100644
@@ -142,14 +142,40 @@ int cpu_init_r(void)
 	return (0);
 }
 
+/* Busy wait a number of ms */
+void cpu_wait_ms_busy(unsigned long ms)
+{
+	unsigned int ms_delay;
+	volatile unsigned int tmp;
+
+	/* ~10-20 cycles per decrement */
+	ms_delay = leon_cpu_freq / (1000 * 10);
+	do {
+		/* Wait ~1ms */
+		tmp = ms_delay;
+		while ( tmp-- > 0 )
+			;
+	} while ( --ms > 0 );
+}
+
 /* Uses Timer 0 to get accurate
  * pauses. Max 2 raised to 32 ticks
  *
  */
 void cpu_wait_ticks(unsigned long ticks)
 {
-	unsigned long start = get_timer(0);
-	while (get_timer(start) < ticks) ;
+	unsigned long start;
+
+	if ( interrupt_is_enabled() ) {
+		start = get_timer(0);
+		while (get_timer(start) < ticks) ;
+	} else {
+		/* Interrupts disabled, this means that we cannot 
+		 * use get_timer(), it relies on IRQ. Instead the
+		 * CPU frequency is used.
+		 */
+		cpu_wait_ms_busy( ticks2usec(ticks) / 1000 );
+	}
 }
 
 /* initiate and setup timer0 interrupt to 1MHz

index 976f311..5cc9513 100644
@@ -29,15 +29,55 @@
 
 #include <asm/io.h>
 #include <asm/processor.h>
+#include <ambapp.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 extern void _reset_reloc(void);
 
+int leon_cpu_cnt = 1;
+int leon_ver = 3;
+unsigned int leon_cpu_freq = CONFIG_SYS_CLK_FREQ;
+
+int cpu_freq(void)
+{
+	ambapp_ahbdev dev;
+
+	if ( leon_ver == 3 ) {
+		ambapp_ahbmst_find(&ambapp_plb, VENDOR_GAISLER,
+			GAISLER_LEON3, 0, &dev);
+	} else {
+		ambapp_ahbmst_find(&ambapp_plb, VENDOR_GAISLER,
+			GAISLER_LEON4, 0, &dev);
+	}
+
+	leon_cpu_freq = ambapp_bus_freq(&ambapp_plb, dev.ahb_bus_index);
+}
+
 int checkcpu(void)
 {
+	int cnt;
+	char str[4];
+
 	/* check LEON version here */
-	printf("CPU: LEON3\n");
+	cnt = ambapp_ahbmst_count(&ambapp_plb, VENDOR_GAISLER, GAISLER_LEON3);
+	if ( cnt <= 0 ) {
+		cnt = ambapp_ahbmst_count(&ambapp_plb, VENDOR_GAISLER, GAISLER_LEON4);
+		if ( cnt > 0 )
+			leon_ver = 4;
+	}
+
+	cpu_freq();
+
+	str[0] = '\0';
+	if ( cnt > 1 ) {
+		leon_cpu_cnt = cnt;
+		str[0] = '0' + cnt;
+		str[1] = 'x';
+		str[2] = '\0';
+	}
+	printf("CPU: %sLEON%d @ %dMHz\n", str, leon_ver, leon_cpu_freq / 1000000);
+
 	return 0;
 }
 

index b90d35b..60396c4 100644
@@ -33,4 +33,17 @@
  * ctrl, memory controllers etc.
  */
 
+
+#ifndef __ASSEMBLER__
+/* The frequency of the CPU */
+extern unsigned int leon_cpu_freq;
+
+/* Number of LEON processors in system */
+extern int leon_cpu_cnt;
+
+/* Ver/subversion of CPU */
+extern int leon_ver;
+
+#endif /* __ASSEMBLER__ */
+
 #endif

index c62cf57..f517325 100644
@@ -35,10 +35,6 @@ extern image_header_t header;
 extern void srmmu_init_cpu(unsigned int entry);
 extern void prepare_bootargs(char *bootargs);
 
-#ifdef CONFIG_USB_UHCI
-extern int usb_lowlevel_stop(void);
-#endif
-
 /* sparc kernel argument (the ROM vector) */
 struct linux_romvec *kernel_arg_promvec;
 

@@ -125,10 +121,6 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t * images)
 	       linux_hdr->linuxver_minor, linux_hdr->linuxver_revision);
 #endif
 
-#ifdef CONFIG_USB_UHCI
-	usb_lowlevel_stop();
-#endif
-
 	/* set basic boot params in kernel header now that it has been
 	 * extracted and is writeable.
 	 */

index 11eea60..d829af0 100644
@@ -65,6 +65,7 @@ extern void timer_interrupt_init(void);
 extern void malloc_bin_reloc(void);
 extern int do_ambapp_print(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
 extern int prom_init(void);
+extern void cpu_late_init(void);
 
 #if defined(CONFIG__CMD_DOC)
 void doc_init(void);

@@ -353,6 +354,10 @@ void board_init_f(ulong bootflag)
 	/* relocate environment function pointers etc. */
 	env_relocate();
 
+#if defined(CONFIG_CPU_LATE_INIT)
+	cpu_late_init();
+#endif
+
 #if defined(CONFIG_BOARD_LATE_INIT)
 	board_late_init();
 #endif

index d2f47e1..39c4bb8 100644
@@ -43,6 +43,9 @@ DECLARE_GLOBAL_DATA_PTR;
 /* reset CPU (jump to 0, without reset) */
 void start(void);
 
+/* Initialize GRETH EDCL on startup */
+extern void greth_edcl_init(void);
+
 ambapp_dev_irqmp *irqmp = NULL;
 ambapp_dev_gptimer *gptimer = NULL;
 unsigned int gptimer_irq = 0;

@@ -142,6 +145,17 @@ int cpu_init_r(void)
 	return (0);
 }
 
+/* Late CPU initialization
+ *
+ * At this point environment variables is available.
+ */
+void cpu_late_init(void)
+{
+#ifdef CONFIG_SYS_GRETH_EDCL_IP
+	greth_edcl_init();
+#endif
+}
+
 /* Busy wait a number of ms */
 void cpu_wait_ms_busy(unsigned long ms)
 {

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index d829af0..3362f39 100644
@@ -97,6 +97,16 @@ static int init_baudrate(void)
 	return (0);
 }
 
+#if defined(CONFIG_HARD_SPI)
+static int init_func_spi (void)
+{
+        puts ("SPI:   ");
+        spi_init ();
+        puts ("ready\n");
+        return (0);
+}
+#endif
+
 /***********************************************************************/
 
 /*

@@ -304,6 +314,10 @@ void board_init_f(ulong bootflag)
 			CONFIG_SYS_MALLOC_END - CONFIG_SYS_MALLOC_BASE);
 	malloc_bin_reloc();
 
+#if defined(CONFIG_HARD_SPI)
+	init_func_spi();
+#endif
+
 #if !defined(CONFIG_SYS_NO_FLASH)
 	puts("FLASH: ");
 

index 86376bb..6cd2281 100644
@@ -1059,6 +1059,22 @@ void srmmu_init_cpu(unsigned int entry)
 	    ((CONFIG_SYS_SDRAM_BASE + 0x6000000) >> 4) | ACC_SU_ALL | PTE;
 	psrmmu_tables->pgd_table[0xf7] =
 	    ((CONFIG_SYS_SDRAM_BASE + 0x7000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xf8] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0x8000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xf9] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0x9000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xfa] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0xa000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xfb] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0xb000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xfc] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0xc000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xfd] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0xd000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xfe] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0xe000000) >> 4) | ACC_SU_ALL | PTE;
+	psrmmu_tables->pgd_table[0xff] =
+	    ((CONFIG_SYS_SDRAM_BASE + 0xf000000) >> 4) | ACC_SU_ALL | PTE;	
 
 	/* convert rom vec pointer to virtual address */
 	kernel_arg_promvec = (struct linux_romvec *)

index 94ddac3..f795857 100644
@@ -170,11 +170,11 @@ void __arch_lmb_reserve(struct lmb *lmb)
 void arch_lmb_reserve(struct lmb *lmb) __attribute__((weak, alias("__arch_lmb_reserve")));
 
 /* Allow for arch specific config before we boot */
-void __arch_preboot_os(void)
+void __arch_preboot_os(int os)
 {
 	/* please define platform specific arch_preboot_os() */
 }
-void arch_preboot_os(void) __attribute__((weak, alias("__arch_preboot_os")));
+void arch_preboot_os(int os) __attribute__((weak, alias("__arch_preboot_os")));
 
 #if defined(__ARM__)
   #define IH_INITRD_ARCH IH_ARCH_ARM

@@ -571,7 +571,7 @@ int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			break;
 		case BOOTM_STATE_OS_GO:
 			disable_interrupts();
-			arch_preboot_os();
+			arch_preboot_os(images.os.os);
 			boot_fn(BOOTM_STATE_OS_GO, argc, argv, &images);
 			break;
 	}

@@ -704,7 +704,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}
 
-	arch_preboot_os();
+	arch_preboot_os(images.os.os);
 
 	boot_fn(0, argc, argv, &images);
 

index 0041a60..100f8f4 100644
@@ -382,7 +382,7 @@ int cpu_init_r(void)
 
 extern void setup_ivors(void);
 
-void arch_preboot_os(void)
+void arch_preboot_os(int os)
 {
 	u32 msr;
 

index 5cc9513..13d3dd7 100644
@@ -83,8 +83,14 @@ int checkcpu(void)
 
 /* ------------------------------------------------------------------------- */
 
-void cpu_reset(void)
+int cpu_reset(int nr)
 {
+	if ( nr > 0 ) {
+		puts(" CPU[N] RESET NOT SUPPORTED BY ARCHITECTURE (N>0), "
+		     "SYSTEM RESET IS POSSIBLE.");
+		return -1;
+	}
+
 	/* Interrupts off */
 	disable_interrupts();
 

@@ -94,7 +100,7 @@ void cpu_reset(void)
 
 int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
-	cpu_reset();
+	cpu_reset(0);
 
 	return 1;
 

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index 6cd2281..2a4fc2d 100644
@@ -31,6 +31,7 @@
 #include <asm/processor.h>
 #include <asm/irq.h>
 #include <asm/leon.h>
+#include <asm/boot_mp.h>
 #include <ambapp.h>
 #include <grlib/apbuart.h>
 #include <grlib/irqmp.h>

@@ -931,21 +932,9 @@ void leon_prom_init(struct leon_prom_info *pspi)
 	/* Set the pointer to the Console UART in romvec */
 	pspi->reloc_funcs.leon3_apbuart = leon3_apbuart;
 
-	{
-		int j = 1;
-#ifdef CONFIG_SMP
-		ambapp_dev_irqmp *b;
-		b = (ambapp_dev_irqmp *) leon3_getapbbase(VENDOR_GAISLER,
-							  GAISLER_IRQMP);
-		if (b) {
-			j = 1 + ((LEON3_BYPASS_LOAD_PA(&(b->mpstatus))
-				  >> LEON3_IRQMPSTATUS_CPUNR) & 0xf);
-		}
-#endif
 #undef nodes
-		pspi->nodes[2 + j].level = -1;
-		pspi->nodes[2 + j].properties = __va(spi.root_properties + 3);
-	}
+	pspi->nodes[2 + leon_cpu_cnt].level = -1;
+	pspi->nodes[2 + leon_cpu_cnt].properties = __va(spi.root_properties + 3);
 
 	/* Set Ethernet MAC address from environment */
 	if ((addr_str = getenv("ethaddr")) != NULL) {

@@ -1024,7 +1013,7 @@ void prepare_bootargs(char *bootargs)
 	}
 }
 
-void srmmu_init_cpu(unsigned int entry)
+void srmmu_init(unsigned int entry)
 {
 	sparc_srmmu_setup *psrmmu_tables = (void *)
 	    ((((unsigned int)&srmmu_tables) & PROM_SIZE_MASK) +

@@ -1079,6 +1068,19 @@ void srmmu_init_cpu(unsigned int entry)
 	/* convert rom vec pointer to virtual address */
 	kernel_arg_promvec = (struct linux_romvec *)
 	    (((unsigned int)kernel_arg_promvec & 0x0fffffff) | 0xf0000000);
+}
+
+#ifdef CONFIG_MP
+/* This function must be located in the MP or PROM part of the application because
+ * it will be called from CPU1, CPU2 ...  after CPU0 has made it into the kernel 
+ * and started the other CPUs
+ */
+void MP_TEXT boot_mp_linux_cpu_preinit(int cpu)
+#else
+void boot_mp_linux_cpu_preinit(int cpu)
+#endif
+{
+	sparc_srmmu_setup *psrmmu_tables = (void *)CONFIG_SYS_PROM_OFFSET;
 
 	/* Set Context pointer to point to context table
 	 * 256 contexts supported.

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index b9d45dd..a6d669d 100644
@@ -264,8 +264,16 @@
 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
+#ifdef CONFIG_MP
+#define CONFIG_SYS_MP_SIZE		512
+#define CONFIG_SYS_MP_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_MP_SIZE)
+#else
+#define CONFIG_SYS_MP_SIZE		0
+#define CONFIG_SYS_MP_OFFSET		CONFIG_SYS_GBL_DATA_OFFSET
+#endif
+
+#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_MP_SIZE-CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_MP_OFFSET-CONFIG_SYS_PROM_SIZE)
 
 #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
 #define CONFIG_SYS_STACK_SIZE		(0x10000-32)

index 6edb92c..10afca2 100644
@@ -232,8 +232,16 @@
 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_SDRAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
+#ifdef CONFIG_MP
+#define CONFIG_SYS_MP_SIZE		512
+#define CONFIG_SYS_MP_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_MP_SIZE)
+#else
+#define CONFIG_SYS_MP_SIZE		0
+#define CONFIG_SYS_MP_OFFSET		CONFIG_SYS_GBL_DATA_OFFSET
+#endif
+
+#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_MP_SIZE-CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_MP_OFFSET-CONFIG_SYS_PROM_SIZE)
 
 #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
 #define CONFIG_SYS_STACK_SIZE		(0x10000-32)

index 1f9dd4a..b57640a 100644
@@ -54,6 +54,8 @@
 #define CONFIG_DOS_PARTITION
 #define CONFIG_MAC_PARTITION
 #define CONFIG_ISO_PARTITION
+#define CONFIG_MP
+#define CONFIG_MP_MAX_CPUS 4
 
 /*
  * Supported commands

@@ -209,8 +211,16 @@
 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
+#ifdef CONFIG_MP
+#define CONFIG_SYS_MP_SIZE		512
+#define CONFIG_SYS_MP_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_MP_SIZE)
+#else
+#define CONFIG_SYS_MP_SIZE		0
+#define CONFIG_SYS_MP_OFFSET		CONFIG_SYS_GBL_DATA_OFFSET
+#endif
+
+#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_MP_SIZE-CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_MP_OFFSET-CONFIG_SYS_PROM_SIZE)
 
 #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
 #define CONFIG_SYS_STACK_SIZE		(0x10000-32)

index f815672..9e177e6 100644
@@ -234,8 +234,16 @@
 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
+#ifdef CONFIG_MP
+#define CONFIG_SYS_MP_SIZE		512
+#define CONFIG_SYS_MP_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_MP_SIZE)
+#else
+#define CONFIG_SYS_MP_SIZE		0
+#define CONFIG_SYS_MP_OFFSET		CONFIG_SYS_GBL_DATA_OFFSET
+#endif
+
+#define CONFIG_SYS_PROM_SIZE		(8192-CONFIG_SYS_MP_SIZE-CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_MP_OFFSET-CONFIG_SYS_PROM_SIZE)
 
 #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
 #define CONFIG_SYS_STACK_SIZE		(0x10000-32)

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