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Oprofile: Loongson: add misc cleanups

PATCH In review Wu Zhangjin 2 participants 11 messages May 6, 2010 – May 11, 2010 MIPS

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#0 lore raw

cover Oprofile: Loongson: add misc cleanups

From: Wu Zhangjin <[email protected]>

This patchset add some cleanups for the Loongson specific oprofile support.

Wu Zhangjin (5):
Oprofile: Loongson: add an unified macro for setting events
Oprofile: Loongson: Remove unneeded Parentheses
Oprofile: Loongson: Remove unneeded variable from
loongson2_cpu_setup()
Oprofile: Loongson: Cleanup of the macros
Oprofile: Loongson: Cleanup the comments

 arch/mips/oprofile/op_model_loongson2.c |   57 ++++++++++---------------------
 1 files changed, 18 insertions(+), 39 deletions(-)
#1 lore raw

PATCH 1/5 Oprofile: Loongson: add an unified macro for setting events

From: Wu Zhangjin <[email protected]>

This patch adds an unified macro for counter0 and counter1 to set the events part in the control register. this macro is needed by Perf, we prepare it here at first.

---
 arch/mips/oprofile/op_model_loongson2.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/mips/oprofile/op_model_loongson2.c +4 -4
index 01f91a3..afa0d7c 100644
@@ -24,8 +24,8 @@
  */
 #define LOONGSON2_CPU_TYPE	"mips/loongson2"
 
-#define LOONGSON2_COUNTER1_EVENT(event)	((event & 0x0f) << 5)
-#define LOONGSON2_COUNTER2_EVENT(event)	((event & 0x0f) << 9)
+#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
+	(((event) & 0x0f) << ((idx) ? 9 : 5))
 
 #define LOONGSON2_PERFCNT_EXL			(1UL	<<  0)
 #define LOONGSON2_PERFCNT_KERNEL		(1UL    <<  1)
@@ -66,12 +66,12 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
 	/* Compute the performance counter ctrl word.  */
 	/* For now count kernel and user mode */
 	if (cfg[0].enabled) {
-		ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event);
+		ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
 		reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
 	}
 
 	if (cfg[1].enabled) {
-		ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event);
+		ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event);
 		reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
 	}
 
Signature · 1 line
1.7.0
#2 lore raw

Re: [PATCH 1/5] Oprofile: Loongson: add an unified macro for setting events

Thanks, queued for 2.6.35.

Ralf

#3 lore raw

PATCH 2/5 Oprofile: Loongson: Remove unneeded Parentheses

In reply to Wu Zhangjin

From: Wu Zhangjin <[email protected]>

---
 arch/mips/oprofile/op_model_loongson2.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/mips/oprofile/op_model_loongson2.c +1 -1
index afa0d7c..e2696d9 100644
@@ -72,7 +72,7 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
 
 	if (cfg[1].enabled) {
 		ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event);
-		reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
+		reg.reset_counter2 = 0x80000000ULL - cfg[1].count;
 	}
 
 	if (cfg[0].enabled || cfg[1].enabled) {
Signature · 1 line
1.7.0
#4 lore raw

Re: [PATCH 2/5] Oprofile: Loongson: Remove unneeded Parentheses

Thanks, queued for 2.6.35.

Ralf

#5 lore raw

PATCH 3/5 Oprofile: Loongson: Remove unneeded variable from loongson2_cpu_setup()

In reply to Wu Zhangjin

From: Wu Zhangjin <[email protected]>

---
 arch/mips/oprofile/op_model_loongson2.c |    5 +----
 1 files changed, 1 insertions(+), 4 deletions(-)
arch/mips/oprofile/op_model_loongson2.c +1 -4
index e2696d9..a03894e 100644
@@ -94,10 +94,7 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
 
 static void loongson2_cpu_setup(void *args)
 {
-	uint64_t perfcount;
-
-	perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1;
-	write_c0_perfcnt(perfcount);
+	write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
 }
 
 static void loongson2_cpu_start(void *args)
Signature · 1 line
1.7.0
#6 lore raw

Re: [PATCH 3/5] Oprofile: Loongson: Remove unneeded variable from loongson2_cpu_setup()

Thanks, queued for 2.6.35.

Ralf

#7 lore raw

PATCH 4/5 Oprofile: Loongson: Cleanup of the macros

In reply to Wu Zhangjin

From: Wu Zhangjin <[email protected]>

The _EXL, _KERNEL ... bits are in the performance control register, so, use _PERFCTRL prefix instead of _PERFCNT. BTW: to make the macro readable, use _ENABLE instead of _INT_EN to describe the interrupt enable bit.

---
 arch/mips/oprofile/op_model_loongson2.c |   22 +++++++++++-----------
 1 files changed, 11 insertions(+), 11 deletions(-)
arch/mips/oprofile/op_model_loongson2.c +11 -11
index a03894e..23f7e13 100644
@@ -24,16 +24,16 @@
  */
 #define LOONGSON2_CPU_TYPE	"mips/loongson2"
 
+#define LOONGSON2_PERFCNT_OVERFLOW		(1ULL   << 31)
+
+#define LOONGSON2_PERFCTRL_EXL			(1UL	<<  0)
+#define LOONGSON2_PERFCTRL_KERNEL		(1UL    <<  1)
+#define LOONGSON2_PERFCTRL_SUPERVISOR		(1UL    <<  2)
+#define LOONGSON2_PERFCTRL_USER			(1UL    <<  3)
+#define LOONGSON2_PERFCTRL_ENABLE		(1UL    <<  4)
 #define LOONGSON2_PERFCTRL_EVENT(idx, event) \
 	(((event) & 0x0f) << ((idx) ? 9 : 5))
 
-#define LOONGSON2_PERFCNT_EXL			(1UL	<<  0)
-#define LOONGSON2_PERFCNT_KERNEL		(1UL    <<  1)
-#define LOONGSON2_PERFCNT_SUPERVISOR	(1UL    <<  2)
-#define LOONGSON2_PERFCNT_USER			(1UL    <<  3)
-#define LOONGSON2_PERFCNT_INT_EN		(1UL    <<  4)
-#define LOONGSON2_PERFCNT_OVERFLOW		(1ULL   << 31)
-
 /* Loongson2 performance counter register */
 #define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
 #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
@@ -76,11 +76,11 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
 	}
 
 	if (cfg[0].enabled || cfg[1].enabled) {
-		ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN;
+		ctrl |= LOONGSON2_PERFCTRL_EXL | LOONGSON2_PERFCTRL_ENABLE;
 		if (cfg[0].kernel || cfg[1].kernel)
-			ctrl |= LOONGSON2_PERFCNT_KERNEL;
+			ctrl |= LOONGSON2_PERFCTRL_KERNEL;
 		if (cfg[0].user || cfg[1].user)
-			ctrl |= LOONGSON2_PERFCNT_USER;
+			ctrl |= LOONGSON2_PERFCTRL_USER;
 	}
 
 	reg.ctrl = ctrl;
@@ -125,7 +125,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
 	 */
 
 	/* Check whether the irq belongs to me */
-	enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN;
+	enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
 	if (!enabled)
 		return IRQ_NONE;
 	enabled = reg.cnt1_enabled | reg.cnt2_enabled;
Signature · 1 line
1.7.0
#8 lore raw

Re: [PATCH 4/5] Oprofile: Loongson: Cleanup of the macros

Thanks, queued for 2.6.35.

Ralf

#9 lore raw

PATCH 5/5 Oprofile: Loongson: Cleanup the comments

In reply to Wu Zhangjin

From: Wu Zhangjin <[email protected]>

This patch removes some out-of-date comments and unneeded blank lines.

---
 arch/mips/oprofile/op_model_loongson2.c |   25 +++++--------------------
 1 files changed, 5 insertions(+), 20 deletions(-)
arch/mips/oprofile/op_model_loongson2.c +5 -20
index 23f7e13..60d3ea6 100644
@@ -8,7 +8,6 @@
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
- *
  */
 #include <linux/init.h>
 #include <linux/oprofile.h>
@@ -17,11 +16,6 @@
 #include <loongson.h>			/* LOONGSON2_PERFCNT_IRQ */
 #include "op_impl.h"
 
-/*
- * a patch should be sent to oprofile with the loongson-specific support.
- * otherwise, the oprofile tool will not recognize this and complain about
- * "cpu_type 'unset' is not valid".
- */
 #define LOONGSON2_CPU_TYPE	"mips/loongson2"
 
 #define LOONGSON2_PERFCNT_OVERFLOW		(1ULL   << 31)
@@ -34,7 +28,6 @@
 #define LOONGSON2_PERFCTRL_EVENT(idx, event) \
 	(((event) & 0x0f) << ((idx) ? 9 : 5))
 
-/* Loongson2 performance counter register */
 #define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
 #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
 #define read_c0_perfcnt() __read_64bit_c0_register($25, 0)
@@ -49,7 +42,6 @@ static struct loongson2_register_config {
 
 static char *oprofid = "LoongsonPerf";
 static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
-/* Compute all of the registers in preparation for enabling profiling.  */
 
 static void reset_counters(void *arg)
 {
@@ -63,8 +55,11 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
 
 	reg.reset_counter1 = 0;
 	reg.reset_counter2 = 0;
-	/* Compute the performance counter ctrl word.  */
-	/* For now count kernel and user mode */
+
+	/*
+	 * Compute the performance counter ctrl word.
+	 * For now, count kernel and user mode.
+	 */
 	if (cfg[0].enabled) {
 		ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
 		reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
@@ -87,11 +82,8 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
 
 	reg.cnt1_enabled = cfg[0].enabled;
 	reg.cnt2_enabled = cfg[1].enabled;
-
 }
 
-/* Program all of the registers in preparation for enabling profiling.  */
-
 static void loongson2_cpu_setup(void *args)
 {
 	write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
@@ -117,13 +109,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
 	struct pt_regs *regs = get_irq_regs();
 	int enabled;
 
-	/*
-	 * LOONGSON2 defines two 32-bit performance counters.
-	 * To avoid a race updating the registers we need to stop the counters
-	 * while we're messing with
-	 * them ...
-	 */
-
 	/* Check whether the irq belongs to me */
 	enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
 	if (!enabled)
Signature · 1 line
1.7.0
#10 lore raw

Re: [PATCH 5/5] Oprofile: Loongson: Cleanup the comments

Thanks, queued for 2.6.35.

Ralf