ARM: S5PV210: Add support SDMMC Write Protection on SMDKV210

PATCH Superseded Kukjin Kim 4 participants 13 messages Jun 15, 2010 – Jul 3, 2010

Subsystems (6)

Arm (32-bit) Arm sub-architectures Arm Samsung Exynos MMC, SD and SDIO +2 more subsystems

lore

Share & tools

lore

Kukjin Kim

author

2010-06-15 11:27 UTC #0 lore raw

This patch adds support SDMMC write protection pin on SMDKV210.

Note: Depends on following patch set

[PATCH 1/2] ARM: SAMSUNG: Add device definition for HSMMC3 [PATCH 2/2 RE-SEND] ARM: S5PV210: Add support HSMMC on Samsung SMDKV210

And this patch set includes the following patches:

[PATCH 1/3] ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection [PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210 [PATCH 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT for Samsung SoC

Kukjin Kim

author

2010-06-15 11:27 UTC #1 lore raw

PATCH 1/3 ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

From: Lee Hyuk <[email protected]>

This patch adds the members of platdata which are cfg_wp and get_ro. The cfg_wp is the function for setting the specific GPIO for WP pin and get_ro is the function for getting data from the assigned GPIO.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 arch/arm/plat-samsung/dev-hsmmc.c          |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc1.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc2.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc3.c         |    4 ++++
 arch/arm/plat-samsung/include/plat/sdhci.h |    6 ++++++
 5 files changed, 22 insertions(+), 0 deletions(-)

arch/arm/plat-samsung/dev-hsmmc.c +4 -0

index 4c05b39..f2bae6f 100644
@@ -65,4 +65,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/dev-hsmmc1.c +4 -0

index e49bc4c..b326e0d 100644
@@ -65,4 +65,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/dev-hsmmc2.c +4 -0

index 824580b..3474ef2 100644
@@ -66,4 +66,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/dev-hsmmc3.c +4 -0

index 05d5ea4..1da8ea7 100644
@@ -69,4 +69,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/include/plat/sdhci.h +6 -0

index 1314ffa..da198d8 100644
@@ -29,6 +29,8 @@ struct mmc_ios;
  *            is necessary the controllers and/or GPIO blocks require the
  *	      changing of driver-strength and other controls dependant on
  *	      the card and speed of operation.
+ * @cfg_wp: Configure the GPIO in order to allocate WP pin.
+ * @get_ro: Call back function for getting data from the allocated GPIO.
  *
  * Initialisation data specific to either the machine or the platform
  * for the device driver to use or call-back when configuring gpio or

@@ -45,6 +47,8 @@ struct s3c_sdhci_platdata {
 			    void __iomem *regbase,
 			    struct mmc_ios *ios,
 			    struct mmc_card *card);
+	void	(*cfg_wp)(int dev_id);
+	int	(*get_ro)(struct mmc_host *mmc);
 };
 
 /**

@@ -234,6 +238,8 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 					   struct mmc_ios *ios,
 					   struct mmc_card *card);
 
+extern void s3c_sdhci_set_platdata(void);
+
 #ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s5pv210_default_sdhci0(void)
 {

Signature · 1 line

1.6.2.5

Ben Dooks

maintainer

2010-06-15 12:02 UTC #2 lore raw

PATCH 1/3 ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

Quoted 5 lines · Kukjin Kim

From: Lee Hyuk <[email protected]>
This patch adds the members of platdata which are cfg_wp and get_ro. The cfg_wp is the function for setting the specific GPIO for WP pin and get_ro is the function for getting data from the assigned GPIO.

Why not just pass gpio numbers, and have the sdhci-s3c driver claim them if they are valid?

Quoted 67 lines

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 arch/arm/plat-samsung/dev-hsmmc.c          |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc1.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc2.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc3.c         |    4 ++++
 arch/arm/plat-samsung/include/plat/sdhci.h |    6 ++++++
 5 files changed, 22 insertions(+), 0 deletions(-)

arch/arm/plat-samsung/dev-hsmmc.c +4 -0

index 4c05b39..f2bae6f 100644
@@ -65,4 +65,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/dev-hsmmc1.c +4 -0

index e49bc4c..b326e0d 100644
@@ -65,4 +65,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/dev-hsmmc2.c +4 -0

index 824580b..3474ef2 100644
@@ -66,4 +66,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/dev-hsmmc3.c +4 -0

index 05d5ea4..1da8ea7 100644
@@ -69,4 +69,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

arch/arm/plat-samsung/include/plat/sdhci.h +0 -0

index 1314ffa..da198d8 100644

arch/arm/plat-samsung/include/plat/sdhci.h struct mmc_ios; · line 33

Quoted 5 lines

arch/arm/plat-samsung/include/plat/sdhci.h +2 -0

@@ -29,6 +29,8 @@ struct mmc_ios;
  *            is necessary the controllers and/or GPIO blocks require the
  *	      changing of driver-strength and other controls dependant on
  *	      the card and speed of operation.
+ * @cfg_wp: Configure the GPIO in order to allocate WP pin.
+ * @get_ro: Call back function for getting data from the allocated GPIO.

if you just used gpio calls and passed a gpio number here, you'd not need cfg_wp.

Quoted 29 lines

arch/arm/plat-samsung/include/plat/sdhci.h +4 -0

  *
  * Initialisation data specific to either the machine or the platform
  * for the device driver to use or call-back when configuring gpio or

@@ -45,6 +47,8 @@ struct s3c_sdhci_platdata {
 			    void __iomem *regbase,
 			    struct mmc_ios *ios,
 			    struct mmc_card *card);
+	void	(*cfg_wp)(int dev_id);
+	int	(*get_ro)(struct mmc_host *mmc);
 };
 
 /**

@@ -234,6 +238,8 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 					   struct mmc_ios *ios,
 					   struct mmc_card *card);
 
+extern void s3c_sdhci_set_platdata(void);
+
 #ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s5pv210_default_sdhci0(void)
 {

Signature · 7 lines

1.6.2.5


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Signature · 5 lines

-- 
Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.

Kukjin Kim

author

2010-07-03 01:15 UTC #3 lore raw

PATCH 1/3 ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

Quoted 11 lines · Ben Dooks

Quoted 5 lines · Kukjin Kim
From: Lee Hyuk <[email protected]>
This patch adds the members of platdata which are cfg_wp and get_ro. The cfg_wp is the function for setting the specific GPIO for WP pin and get_ro is the function for getting data from the assigned GPIO.
Why not just pass gpio numbers, and have the sdhci-s3c driver claim them if they are valid?

Ok..fixed it as your comments.

Quoted 11 lines

Review

Quoted 11 lines

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 arch/arm/plat-samsung/dev-hsmmc.c          |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc1.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc2.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc3.c         |    4 ++++
 arch/arm/plat-samsung/include/plat/sdhci.h |    6 ++++++
 5 files changed, 22 insertions(+), 0 deletions(-)

(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

Quoted 6 lines

hsmmc.c
arch/arm/plat-samsung/dev-hsmmc.c void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata
Quoted 4 lines
index 4c05b39..f2bae6f 100644
arch/arm/plat-samsung/dev-hsmmc.c +0 -0
@@ -65,4 +65,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata
*pd)

Quoted 9 lines

Review

Quoted 9 lines

arch/arm/plat-samsung/dev-hsmmc.c +4 -0

 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

Quoted 6 lines

hsmmc1.c
arch/arm/plat-samsung/dev-hsmmc1.c void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata
Quoted 4 lines
index e49bc4c..b326e0d 100644
arch/arm/plat-samsung/dev-hsmmc1.c +0 -0
@@ -65,4 +65,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata
*pd)

Quoted 9 lines

Review

Quoted 9 lines

arch/arm/plat-samsung/dev-hsmmc1.c +4 -0

 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

Quoted 6 lines

hsmmc2.c
arch/arm/plat-samsung/dev-hsmmc2.c void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata
Quoted 4 lines
index 824580b..3474ef2 100644
arch/arm/plat-samsung/dev-hsmmc2.c +0 -0
@@ -66,4 +66,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata
*pd)

Quoted 9 lines

Review

Quoted 9 lines

arch/arm/plat-samsung/dev-hsmmc2.c +4 -0

 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }

(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

Quoted 16 lines

hsmmc3.c
arch/arm/plat-samsung/dev-hsmmc3.c void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata
Quoted 4 lines
index 05d5ea4..1da8ea7 100644
arch/arm/plat-samsung/dev-hsmmc3.c +0 -0
@@ -69,4 +69,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata
*pd)
arch/arm/plat-
Quoted 9 lines
arch/arm/plat-samsung/dev-hsmmc3.c +4 -0
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }
arch/arm/plat- renamed from arch/arm/plat-samsung/include/plat/sdhci.h +0 -0
samsung/include/plat/sdhci.h

Quoted 5 lines

arch/arm/plat-samsung/include/plat/sdhci.h struct mmc_ios; · line 29
Quoted 5 lines
index 1314ffa..da198d8 100644
arch/arm/plat-samsung/include/plat/sdhci.h +0 -0
@@ -29,6 +29,8 @@ struct mmc_ios;
  *            is necessary the controllers and/or GPIO blocks require

the

Quoted 4 lines

arch/arm/plat-samsung/include/plat/sdhci.h struct mmc_ios;
Quoted 4 lines
arch/arm/plat-samsung/include/plat/sdhci.h +2 -0
  *	      changing of driver-strength and other controls dependant on
  *	      the card and speed of operation.
+ * @cfg_wp: Configure the GPIO in order to allocate WP pin.
+ * @get_ro: Call back function for getting data from the allocated

GPIO.

Quoted 4 lines

if you just used gpio calls and passed a gpio number here, you'd not need cfg_wp.

OK.

Quoted 14 lines

arch/arm/plat-samsung/include/plat/sdhci.h extern void s5pv210_setup_sdhci_cfg_card(struct

Quoted 13 lines

arch/arm/plat-samsung/include/plat/sdhci.h +2 -0

  *
  * Initialisation data specific to either the machine or the platform
  * for the device driver to use or call-back when configuring gpio or

@@ -45,6 +47,8 @@ struct s3c_sdhci_platdata {
 			    void __iomem *regbase,
 			    struct mmc_ios *ios,
 			    struct mmc_card *card);
+	void	(*cfg_wp)(int dev_id);
+	int	(*get_ro)(struct mmc_host *mmc);
 };
 
 /**

@@ -234,6 +238,8 @@ extern void s5pv210_setup_sdhci_cfg_card(struct

platform_device *dev,

Quoted 8 lines

arch/arm/plat-samsung/include/plat/sdhci.h extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 245
Quoted 8 lines
arch/arm/plat-samsung/include/plat/sdhci.h +2 -0
 					   struct mmc_ios *ios,
 					   struct mmc_card *card);
 
+extern void s3c_sdhci_set_platdata(void);
+
 #ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s5pv210_default_sdhci0(void)
 {

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

Kukjin Kim

author

2010-06-15 11:27 UTC #4 lore raw

PATCH 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

In reply to Kukjin Kim

From: Lee Hyuk <[email protected]>

S5PV210 HSMMC host controller doesn't have the Write Protection pin which should be connnected with SDMMC card WP pin. So allocated a GPIO in order to get the data from SDMMC card WP pin with EXT_INT and implement get_ro and cfg_wp function.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
 arch/arm/mach-s5pv210/setup-sdhci.c   |   72 +++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+), 0 deletions(-)

arch/arm/mach-s5pv210/mach-smdkv210.c +2 -0

index b08f376..18cdb8c 100644
@@ -27,6 +27,7 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
 static void __init smdkv210_machine_init(void)
 {
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci_set_platdata();
 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
 }

arch/arm/mach-s5pv210/setup-sdhci.c +72 -0

88 lines not on this page · raw message

Signature · 1 line

1.6.2.5

Kyungmin Park

2010-06-15 11:52 UTC #5 lore raw

PATCH 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

Quoted 59 lines · Kukjin Kim

From: Lee Hyuk <[email protected]>
S5PV210 HSMMC host controller doesn't have the Write Protection pin which should be connnected with SDMMC card WP pin. So allocated a GPIO in order to get the data from SDMMC card WP pin with EXT_INT and implement get_ro and cfg_wp function.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
?arch/arm/mach-s5pv210/mach-smdkv210.c | ? ?2 + ?arch/arm/mach-s5pv210/setup-sdhci.c ? | ? 72 +++++++++++++++++++++++++++++++++ ?2 files changed, 74 insertions(+), 0 deletions(-)
arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
index b08f376..18cdb8c 100644
@@ -27,6 +27,7 @@
?#include <plat/cpu.h>
?#include <plat/adc.h>
?#include <plat/ts.h>
+#include <plat/sdhci.h>
?/* Following are default values for UCON, ULCON and UFCON UART registers */ ?#define S5PV210_UCON_DEFAULT ? (S3C2410_UCON_TXILEVEL | ? ? ? ?\
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
 ?static void __init smdkv210_machine_init(void)
 ?{
 ? ? ? ?s3c24xx_ts_set_platdata(&s3c_ts_platform);
+ ? ? ? s3c_sdhci_set_platdata();
 ? ? ? ?platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
 ?}
 
arch/arm/mach-s5pv210/setup-sdhci.c +0 -0
index 51815ec..b553b36 100644
@@ -15,13 +15,17 @@
?#include <linux/interrupt.h>
?#include <linux/platform_device.h>
?#include <linux/io.h>
+#include <linux/gpio.h>
?#include <linux/mmc/card.h>
?#include <linux/mmc/host.h>
+#include <plat/gpio-cfg.h>
?#include <plat/regs-sdhci.h>
?#include <plat/sdhci.h>
arch/arm/mach-s5pv210/setup-sdhci.c +2 -0
+#include <mach/map.h>
+
?/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
?char *s5pv210_hsmmc_clksrcs[4] = {
arch/arm/mach-s5pv210/setup-sdhci.c +0 -0
@@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 ? ? ? ?writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 ? ? ? ?writel(ctrl3, r + S3C_SDHCI_CONTROL3);

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 76

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +9 -0

 ?}
+
+static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
+{
+ ? ? ? int gpio_dat;
+
+ ? ? ? if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
+ ? ? ? ? ? ? ? (mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {
+ ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
+ ? ? ? ? ? ? ? return !!(gpio_dat & 0x80);

It's GPIO values, and it's smdk specific values. So it should go smdk board files instead of platform common one.

Quoted 15 lines

arch/arm/mach-s5pv210/setup-sdhci.c +15 -0

+ ? ? ? } else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
+ ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
+ ? ? ? ? ? ? ? return !!(gpio_dat & 0x2);
+ ? ? ? } else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
+ ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
+ ? ? ? ? ? ? ? return !!(gpio_dat & 0x1);
+ ? ? ? } else
+ ? ? ? ? ? ? ? return 0;
+}
+
+static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
+{
+ ? ? ? switch (dev_id) {
+ ? ? ? case 0:
+ ? ? ? case 1:

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 101

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +10 -0

+ ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
+ ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+ ? ? ? ? ? ? ? break;
+ ? ? ? case 2:
+ ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
+ ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
+ ? ? ? ? ? ? ? break;
+ ? ? ? case 3:
+ ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
+ ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);

Ditto. board specific configurations. should go smdk board file.

Quoted 24 lines

arch/arm/mach-s5pv210/setup-sdhci.c +24 -0

+ ? ? ? ? ? ? ? break;
+ ? ? ? default:
+ ? ? ? ? ? ? ? break;
+ ? ? ? }
+}
+
+static struct s3c_sdhci_platdata hsmmc0_platdata = {
+ ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
+ ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc1_platdata = {
+ ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
+ ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc2_platdata = {
+ ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
+ ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc3_platdata = {
+ ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
+ ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 135

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +10 -0

+};
+
+void s3c_sdhci_set_platdata(void)
+{
+ ? ? ? s3c_sdhci0_set_platdata(&hsmmc0_platdata);
+ ? ? ? s3c_sdhci1_set_platdata(&hsmmc1_platdata);
+ ? ? ? s3c_sdhci2_set_platdata(&hsmmc2_platdata);
+ ? ? ? s3c_sdhci3_set_platdata(&hsmmc3_platdata);
+}
+EXPORT_SYMBOL(s3c_sdhci_set_platdata);

I think all added lines should go smdk totally.

Thank you,
Kyungmin Park

Quoted 8 lines

--
1.6.2.5
--
To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html

Kukjin Kim

author

2010-07-03 01:07 UTC #6 lore raw

PATCH 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

Quoted 5 lines · Kyungmin Park

Quoted 3 lines · Kukjin Kim
From: Lee Hyuk <[email protected]>
S5PV210 HSMMC host controller doesn't have the Write Protection pin

which

Quoted 1 line

Quoted 1 line
should be connnected with SDMMC card WP pin. So allocated a GPIO in

order

Quoted 2 lines

to
Quoted 1 line
get the data from SDMMC card WP pin with EXT_INT and implement get_ro

and

Quoted 21 lines

Quoted 7 lines
cfg_wp function.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
arch/arm/mach-s5pv210/mach-smdkv210.c | 2 +
arch/arm/mach-s5pv210/setup-sdhci.c | 72
+++++++++++++++++++++++++++++++++
arch/arm/mach-
Quoted 3 lines
 2 files changed, 74 insertions(+), 0 deletions(-)
arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
s5pv210/mach-smdkv210.c
Quoted 9 lines
index b08f376..18cdb8c 100644
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
@@ -27,6 +27,7 @@
  #include <plat/cpu.h>
  #include <plat/adc.h>
  #include <plat/ts.h>
+#include <plat/sdhci.h>
 

Quoted 1 line

arch/arm/mach-s5pv210/mach-smdkv210.c line 32
Quoted 1 line
arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
  /* Following are default values for UCON, ULCON and UFCON UART

registers */

Quoted 35 lines

arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 106
Quoted 7 lines
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
  #define S5PV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
  static void __init smdkv210_machine_init(void)
  {
        s3c24xx_ts_set_platdata(&s3c_ts_platform);
+       s3c_sdhci_set_platdata();
        platform_add_devices(smdkv210_devices,
ARRAY_SIZE(smdkv210_devices));
arch/arm/mach-
Quoted 3 lines
arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
  }
 
arch/arm/mach- renamed from arch/arm/mach-s5pv210/setup-sdhci.c +0 -0
s5pv210/setup-sdhci.c
arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct
Quoted 22 lines
index 51815ec..b553b36 100644
arch/arm/mach-s5pv210/setup-sdhci.c +4 -0
@@ -15,13 +15,17 @@
  #include <linux/interrupt.h>
  #include <linux/platform_device.h>
  #include <linux/io.h>
+#include <linux/gpio.h>
 
  #include <linux/mmc/card.h>
  #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
  #include <plat/regs-sdhci.h>
  #include <plat/sdhci.h>
 
+#include <mach/map.h>
+
  /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
  char *s5pv210_hsmmc_clksrcs[4] = {
@@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct
platform_device *dev,

Quoted 9 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,

Quoted 9 lines

arch/arm/mach-s5pv210/setup-sdhci.c +6 -0

        writel(ctrl2, r + S3C_SDHCI_CONTROL2);
        writel(ctrl3, r + S3C_SDHCI_CONTROL3);
  }
+
+static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
+{
+       int gpio_dat;
+
+       if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL)

Quoted 8 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct · line 74
Quoted 1 line
arch/arm/mach-s5pv210/setup-sdhci.c +1 -0
+               (mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp !=
NULL)) {
arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 76
Quoted 2 lines
arch/arm/mach-s5pv210/setup-sdhci.c +2 -0
+               gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
+               return !!(gpio_dat & 0x80);
It's GPIO values, and it's smdk specific values. So it should go smdk board files instead of platform common one.

Yes, you're right..moved.

Quoted 21 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct · line 77
Quoted 1 line
arch/arm/mach-s5pv210/setup-sdhci.c +1 -0
+       } else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp !=
NULL) {
arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
Quoted 3 lines
arch/arm/mach-s5pv210/setup-sdhci.c +3 -0
+               gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
+               return !!(gpio_dat & 0x2);
+       } else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp !=
NULL) {
Quoted 15 lines
arch/arm/mach-s5pv210/setup-sdhci.c +15 -0
+               gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
+               return !!(gpio_dat & 0x1);
+       } else
+               return 0;
+}
+
+static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
+{
+       switch (dev_id) {
+       case 0:
+       case 1:
+               s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
+               s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+               break;
+       case 2:

Quoted 9 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 101
Quoted 6 lines
arch/arm/mach-s5pv210/setup-sdhci.c +6 -0
+               s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
+               s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
+               break;
+       case 3:
+               s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
+               s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
Ditto. board specific configurations. should go smdk board file.

Moved.

Quoted 28 lines

arch/arm/mach-s5pv210/setup-sdhci.c +28 -0

+               break;
+       default:
+               break;
+       }
+}
+
+static struct s3c_sdhci_platdata hsmmc0_platdata = {
+       .cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+       .get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc1_platdata = {
+       .cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+       .get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc2_platdata = {
+       .cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+       .get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc3_platdata = {
+       .cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+       .get_ro         = s5pv210_sdhci_get_ro,
+};
+
+void s3c_sdhci_set_platdata(void)
+{

Quoted 9 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 135
Quoted 6 lines
arch/arm/mach-s5pv210/setup-sdhci.c +6 -0
+       s3c_sdhci0_set_platdata(&hsmmc0_platdata);
+       s3c_sdhci1_set_platdata(&hsmmc1_platdata);
+       s3c_sdhci2_set_platdata(&hsmmc2_platdata);
+       s3c_sdhci3_set_platdata(&hsmmc3_platdata);
+}
+EXPORT_SYMBOL(s3c_sdhci_set_platdata);
I think all added lines should go smdk totally.

Fixed in v2 patches as your comments.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

Maurus Cuelenaere

2010-06-15 11:53 UTC #7 lore raw

PATCH 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

In reply to Kukjin Kim

Op 15-06-10 13:27, Kukjin Kim schreef:

Quoted 27 lines

From: Lee Hyuk <[email protected]>
S5PV210 HSMMC host controller doesn't have the Write Protection pin which should be connnected with SDMMC card WP pin. So allocated a GPIO in order to get the data from SDMMC card WP pin with EXT_INT and implement get_ro and cfg_wp function.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
 arch/arm/mach-s5pv210/setup-sdhci.c   |   72 +++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+), 0 deletions(-)
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
index b08f376..18cdb8c 100644
@@ -27,6 +27,7 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 106

Quoted 5 lines

arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0

@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
 static void __init smdkv210_machine_init(void)
 {
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci_set_platdata();

Wouldn't it be better to name this s5pv210_sdhci_set_platdata() ? Also, see below.

Quoted 88 lines

arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0

 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
 }

arch/arm/mach-s5pv210/setup-sdhci.c +62 -0

index 51815ec..b553b36 100644
@@ -15,13 +15,17 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <linux/mmc/card.h>
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/regs-sdhci.h>
 #include <plat/sdhci.h>
 
+#include <mach/map.h>
+
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
 char *s5pv210_hsmmc_clksrcs[4] = {

@@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
+
+static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
+{
+	int gpio_dat;
+
+	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
+		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
+		return !!(gpio_dat & 0x80);
+	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
+		return !!(gpio_dat & 0x2);
+	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
+		return !!(gpio_dat & 0x1);
+	} else
+		return 0;
+}
+
+static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
+{
+	switch (dev_id) {
+	case 0:
+	case 1:
+		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+		break;
+	case 2:
+		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
+		break;
+	case 3:
+		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
+		break;
+	default:
+		break;
+	}
+}
+
+static struct s3c_sdhci_platdata hsmmc0_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc1_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc2_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc3_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 135

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +10 -0

+};
+
+void s3c_sdhci_set_platdata(void)
+{
+	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
+	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
+	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
+	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
+}
+EXPORT_SYMBOL(s3c_sdhci_set_platdata);

Why do you export this function? I don't see this being used anywhere except in mach-s5pv210.

Signature · 1 line

Maurus Cuelenaere

Kukjin Kim

author

2010-07-03 01:11 UTC #8 lore raw

PATCH 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

Quoted 31 lines · Maurus Cuelenaere

Op 15-06-10 13:27, Kukjin Kim schreef:
Quoted 4 lines
From: Lee Hyuk <[email protected]>
S5PV210 HSMMC host controller doesn't have the Write Protection pin which should be connnected with SDMMC card WP pin. So allocated a GPIO in order
to
Quoted 8 lines
get the data from SDMMC card WP pin with EXT_INT and implement get_ro and cfg_wp function.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
 arch/arm/mach-s5pv210/setup-sdhci.c   |   72
+++++++++++++++++++++++++++++++++
arch/arm/mach-
Quoted 3 lines
 2 files changed, 74 insertions(+), 0 deletions(-)
arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
s5pv210/mach-smdkv210.c
arch/arm/mach-s5pv210/mach-smdkv210.c line 32
Quoted 10 lines
index b08f376..18cdb8c 100644
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
@@ -27,6 +27,7 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers
*/

Quoted 11 lines

arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 106
Quoted 7 lines
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
 static void __init smdkv210_machine_init(void)
 {
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci_set_platdata();
 
Wouldn't it be better to name this s5pv210_sdhci_set_platdata() ? Also, see below.

Ok..so used s3c_sdhciX_set_platdata() instead of using above.

Quoted 99 lines

arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 107

Quoted 1 line

arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
 	platform_add_devices(smdkv210_devices,

ARRAY_SIZE(smdkv210_devices));

arch/arm/mach-

Quoted 3 lines

arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
 }
arch/arm/mach- renamed from arch/arm/mach-s5pv210/setup-sdhci.c +0 -0

s5pv210/setup-sdhci.c

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct

Quoted 22 lines

index 51815ec..b553b36 100644

arch/arm/mach-s5pv210/setup-sdhci.c +4 -0

@@ -15,13 +15,17 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <linux/mmc/card.h>
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/regs-sdhci.h>
 #include <plat/sdhci.h>
 
+#include <mach/map.h>
+
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
 char *s5pv210_hsmmc_clksrcs[4] = {

@@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct

platform_device *dev,

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +7 -0

 	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
+
+static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
+{
+	int gpio_dat;
+
+	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
+		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp !=

NULL)) {

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,

Quoted 3 lines

arch/arm/mach-s5pv210/setup-sdhci.c +3 -0

+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
+		return !!(gpio_dat & 0x80);
+	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp !=

NULL) {

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,

Quoted 3 lines

arch/arm/mach-s5pv210/setup-sdhci.c +3 -0

+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
+		return !!(gpio_dat & 0x2);
+	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp !=

NULL) {

Quoted 51 lines

arch/arm/mach-s5pv210/setup-sdhci.c +51 -0

+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
+		return !!(gpio_dat & 0x1);
+	} else
+		return 0;
+}
+
+static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
+{
+	switch (dev_id) {
+	case 0:
+	case 1:
+		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+		break;
+	case 2:
+		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
+		break;
+	case 3:
+		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
+		break;
+	default:
+		break;
+	}
+}
+
+static struct s3c_sdhci_platdata hsmmc0_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc1_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc2_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc3_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+void s3c_sdhci_set_platdata(void)
+{
+	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
+	s3c_sdhci1_set_platdata(&hsmmc1_platdata);

Quoted 9 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 135
Quoted 5 lines
arch/arm/mach-s5pv210/setup-sdhci.c +4 -0
+	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
+	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
+}
+EXPORT_SYMBOL(s3c_sdhci_set_platdata);
Why do you export this function? I don't see this being used anywhere except in mach-s5pv210.

You're right..so machine specific functions moved in the machine file. And removed unnecessary above function. EXPORT_SYMBOL also.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

Ben Dooks

maintainer

2010-06-15 11:59 UTC #9 lore raw

PATCH 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

In reply to Kukjin Kim

Quoted 27 lines · Kukjin Kim

From: Lee Hyuk <[email protected]>
S5PV210 HSMMC host controller doesn't have the Write Protection pin which should be connnected with SDMMC card WP pin. So allocated a GPIO in order to get the data from SDMMC card WP pin with EXT_INT and implement get_ro and cfg_wp function.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
 arch/arm/mach-s5pv210/setup-sdhci.c   |   72 +++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+), 0 deletions(-)
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
index b08f376..18cdb8c 100644
@@ -27,6 +27,7 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 105

Quoted 4 lines

arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0

@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
 static void __init smdkv210_machine_init(void)
 {
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci_set_platdata();

hmm, did you really want to call it this? also, no argument specified.

Quoted 36 lines

arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0

 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
 }

arch/arm/mach-s5pv210/setup-sdhci.c +11 -0

index 51815ec..b553b36 100644
@@ -15,13 +15,17 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <linux/mmc/card.h>
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/regs-sdhci.h>
 #include <plat/sdhci.h>
 
+#include <mach/map.h>
+
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
 char *s5pv210_hsmmc_clksrcs[4] = {

@@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
+
+static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
+{
+	int gpio_dat;
+
+	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
+		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 84

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +10 -0

+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
+		return !!(gpio_dat & 0x80);
+	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
+		return !!(gpio_dat & 0x2);
+	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
+		return !!(gpio_dat & 0x1);
+	} else
+		return 0;

Why not use the gpio layer? really, this sort of thing is what it is there for.

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +10 -0

+}
+
+static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
+{
+	switch (dev_id) {
+	case 0:
+	case 1:
+		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+		break;

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 104

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +10 -0

+	case 2:
+		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
+		break;
+	case 3:
+		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
+		break;
+	default:
+		break;

again, if you'd use the gpio layer, at-lesat the cfgpin() wouldn't have been necessary.

Quoted 21 lines

arch/arm/mach-s5pv210/setup-sdhci.c +21 -0

+	}
+}
+
+static struct s3c_sdhci_platdata hsmmc0_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc1_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc2_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc3_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 135

Quoted 10 lines

arch/arm/mach-s5pv210/setup-sdhci.c +10 -0

+};
+
+void s3c_sdhci_set_platdata(void)
+{
+	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
+	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
+	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
+	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
+}
+EXPORT_SYMBOL(s3c_sdhci_set_platdata);

There is _NO NEED_ to export these, they really should not be used outside of the machine initialisation.

Signature · 4 lines

Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.

Kukjin Kim

author

2010-07-03 01:14 UTC #10 lore raw

PATCH 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

Quoted 5 lines · Ben Dooks

Quoted 3 lines · Kukjin Kim
From: Lee Hyuk <[email protected]>
S5PV210 HSMMC host controller doesn't have the Write Protection pin

which

Quoted 1 line

Quoted 1 line
should be connnected with SDMMC card WP pin. So allocated a GPIO in

order

Quoted 2 lines

to
Quoted 1 line
get the data from SDMMC card WP pin with EXT_INT and implement get_ro

and

Quoted 21 lines

Quoted 7 lines
cfg_wp function.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
 arch/arm/mach-s5pv210/setup-sdhci.c   |   72
+++++++++++++++++++++++++++++++++
arch/arm/mach-
Quoted 3 lines
 2 files changed, 74 insertions(+), 0 deletions(-)
arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
s5pv210/mach-smdkv210.c
Quoted 9 lines
index b08f376..18cdb8c 100644
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
@@ -27,6 +27,7 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/sdhci.h>
 

Quoted 1 line

arch/arm/mach-s5pv210/mach-smdkv210.c line 32
Quoted 1 line
arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
 /* Following are default values for UCON, ULCON and UFCON UART

registers

Quoted 10 lines

*/
arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 105
Quoted 6 lines
arch/arm/mach-s5pv210/mach-smdkv210.c +1 -0
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
 static void __init smdkv210_machine_init(void)
 {
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci_set_platdata();
hmm, did you really want to call it this? also, no argument specified.

No..fixed it.

Quoted 48 lines

arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 106
Quoted 1 line
arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
 	platform_add_devices(smdkv210_devices,
ARRAY_SIZE(smdkv210_devices));
arch/arm/mach-
Quoted 3 lines
arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0
 }
 
arch/arm/mach- renamed from arch/arm/mach-s5pv210/setup-sdhci.c +0 -0
s5pv210/setup-sdhci.c
arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct
Quoted 22 lines
index 51815ec..b553b36 100644
arch/arm/mach-s5pv210/setup-sdhci.c +4 -0
@@ -15,13 +15,17 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <linux/mmc/card.h>
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/regs-sdhci.h>
 #include <plat/sdhci.h>
 
+#include <mach/map.h>
+
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
 char *s5pv210_hsmmc_clksrcs[4] = {
@@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct
platform_device *dev,
arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
Quoted 10 lines
arch/arm/mach-s5pv210/setup-sdhci.c +7 -0
 	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
+
+static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
+{
+	int gpio_dat;
+
+	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
+		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp !=
NULL)) {
arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
Quoted 3 lines
arch/arm/mach-s5pv210/setup-sdhci.c +3 -0
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
+		return !!(gpio_dat & 0x80);
+	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp !=
NULL) {
arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
Quoted 3 lines
arch/arm/mach-s5pv210/setup-sdhci.c +3 -0
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
+		return !!(gpio_dat & 0x2);
+	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp !=
NULL) {

Quoted 8 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 84
Quoted 4 lines
arch/arm/mach-s5pv210/setup-sdhci.c +4 -0
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
+		return !!(gpio_dat & 0x1);
+	} else
+		return 0;
Why not use the gpio layer? really, this sort of thing is what it is there for.

Ok..used it.

Quoted 15 lines

arch/arm/mach-s5pv210/setup-sdhci.c +15 -0

+}
+
+static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
+{
+	switch (dev_id) {
+	case 0:
+	case 1:
+		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+		break;
+	case 2:
+		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
+		break;
+	case 3:

Quoted 9 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 104
Quoted 5 lines
arch/arm/mach-s5pv210/setup-sdhci.c +5 -0
+		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
+		break;
+	default:
+		break;
again, if you'd use the gpio layer, at-lesat the cfgpin() wouldn't have been necessary.

OK.

Quoted 26 lines

arch/arm/mach-s5pv210/setup-sdhci.c +26 -0

+	}
+}
+
+static struct s3c_sdhci_platdata hsmmc0_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc1_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc2_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc3_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+void s3c_sdhci_set_platdata(void)
+{
+	s3c_sdhci0_set_platdata(&hsmmc0_platdata);

Quoted 8 lines

arch/arm/mach-s5pv210/setup-sdhci.c void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, · line 135
Quoted 5 lines
arch/arm/mach-s5pv210/setup-sdhci.c +5 -0
+	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
+	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
+	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
+}
+EXPORT_SYMBOL(s3c_sdhci_set_platdata);
There is _NO NEED_ to export these, they really should not be used outside of the machine initialisation.

Yeah, you're right.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

Kukjin Kim

author

2010-06-15 11:27 UTC #11 lore raw

PATCH 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT for Samsung SoC

In reply to Kukjin Kim

From: Lee Hyuk <[email protected]>

S5PV210 HSMMC host controller doesn't have the WP pin which should be connnected with SDMMC card WP pin. So if there are the cfg_wp and get_ro in pdata, configure the WP pin and replace get_ro function in sdhci with get_ro function in pdata.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 drivers/mmc/host/sdhci-s3c.c |   12 ++++++++++++
 drivers/mmc/host/sdhci.c     |    3 +++
 drivers/mmc/host/sdhci.h     |    3 +++
 3 files changed, 18 insertions(+), 0 deletions(-)

drivers/mmc/host/sdhci-s3c.c +12 -0

index af21792..857cbed 100644
@@ -311,6 +311,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	if (pdata->cfg_gpio)
 		pdata->cfg_gpio(pdev, pdata->max_width);
 
+	if (pdata->get_ro)
+		sdhci_s3c_ops.get_ro = pdata->get_ro;
+
 	host->hw_name = "samsung-hsmmc";
 	host->ops = &sdhci_s3c_ops;
 	host->quirks = 0;

@@ -335,6 +338,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
 			 SDHCI_QUIRK_32BIT_DMA_SIZE);
 
+	/* Controller's WP pin donsn't connected with SD card. So we allocate
+	 * a GPIO for getting WP data form SD card  and use that data as
+	 * the return value of the get_ro function */
+	host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
+
+	/* to configure gpio pin as a card write protection signal */
+	if (pdata->cfg_wp)
+		pdata->cfg_wp(pdev->id);
+
 	ret = sdhci_add_host(host);
 	if (ret) {
 		dev_err(dev, "sdhci_add_host() failed\n");

drivers/mmc/host/sdhci.c +3 -0

index c6d1bd8..2f8dfbc 100644
@@ -1192,6 +1192,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
 
 	host = mmc_priv(mmc);
 
+	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
+		return host->ops->get_ro(mmc);
+
 	spin_lock_irqsave(&host->lock, flags);
 
 	if (host->flags & SDHCI_DEVICE_DEAD)

drivers/mmc/host/sdhci.h +3 -0

index c846813..f479e22 100644
@@ -240,6 +240,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN		(1<<25)
 /* Controller cannot support End Attribute in NOP ADMA descriptor */
 #define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC		(1<<26)
+/* Controller has no write-protect pin connected with SD card */
+#define SDHCI_QUIRK_NO_WP_BIT                          (1<<27)
 
 	int			irq;		/* Device IRQ */
 	void __iomem *		ioaddr;		/* Mapped address */

@@ -312,6 +314,7 @@ struct sdhci_ops {
 	unsigned int	(*get_max_clock)(struct sdhci_host *host);
 	unsigned int	(*get_min_clock)(struct sdhci_host *host);
 	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
+	int		(*get_ro)(struct mmc_host *mmc);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS

Signature · 1 line

1.6.2.5

Ben Dooks

maintainer

2010-06-15 12:04 UTC #12 lore raw

PATCH 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT for Samsung SoC

Quoted 30 lines · Kukjin Kim

From: Lee Hyuk <[email protected]>
S5PV210 HSMMC host controller doesn't have the WP pin which should be connnected with SDMMC card WP pin. So if there are the cfg_wp and get_ro in pdata, configure the WP pin and replace get_ro function in sdhci with get_ro function in pdata.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   12 ++++++++++++
 drivers/mmc/host/sdhci.c     |    3 +++
 drivers/mmc/host/sdhci.h     |    3 +++
 3 files changed, 18 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +3 -0
index af21792..857cbed 100644
@@ -311,6 +311,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	if (pdata->cfg_gpio)
 		pdata->cfg_gpio(pdev, pdata->max_width);
 
+	if (pdata->get_ro)
+		sdhci_s3c_ops.get_ro = pdata->get_ro;
+
 	host->hw_name = "samsung-hsmmc";
 	host->ops = &sdhci_s3c_ops;
 	host->quirks = 0;

drivers/mmc/host/sdhci-s3c.c static int __devinit sdhci_s3c_probe(struct platform_device *pdev) · line 344

Quoted 7 lines

drivers/mmc/host/sdhci-s3c.c +4 -0

@@ -335,6 +338,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
 			 SDHCI_QUIRK_32BIT_DMA_SIZE);
 
+	/* Controller's WP pin donsn't connected with SD card. So we allocate
+	 * a GPIO for getting WP data form SD card  and use that data as
+	 * the return value of the get_ro function */
+	host->quirks |= SDHCI_QUIRK_NO_WP_BIT;

I really think this should be a custom-wp quirk, not a we-don-have-wp quirk.

Quoted 51 lines

drivers/mmc/host/sdhci-s3c.c +5 -0

+
+	/* to configure gpio pin as a card write protection signal */
+	if (pdata->cfg_wp)
+		pdata->cfg_wp(pdev->id);
+
 	ret = sdhci_add_host(host);
 	if (ret) {
 		dev_err(dev, "sdhci_add_host() failed\n");

drivers/mmc/host/sdhci.c +3 -0

index c6d1bd8..2f8dfbc 100644
@@ -1192,6 +1192,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
 
 	host = mmc_priv(mmc);
 
+	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
+		return host->ops->get_ro(mmc);
+
 	spin_lock_irqsave(&host->lock, flags);
 
 	if (host->flags & SDHCI_DEVICE_DEAD)

drivers/mmc/host/sdhci.h +3 -0

index c846813..f479e22 100644
@@ -240,6 +240,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN		(1<<25)
 /* Controller cannot support End Attribute in NOP ADMA descriptor */
 #define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC		(1<<26)
+/* Controller has no write-protect pin connected with SD card */
+#define SDHCI_QUIRK_NO_WP_BIT                          (1<<27)
 
 	int			irq;		/* Device IRQ */
 	void __iomem *		ioaddr;		/* Mapped address */

@@ -312,6 +314,7 @@ struct sdhci_ops {
 	unsigned int	(*get_max_clock)(struct sdhci_host *host);
 	unsigned int	(*get_min_clock)(struct sdhci_host *host);
 	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
+	int		(*get_ro)(struct mmc_host *mmc);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS

Signature · 7 lines

1.6.2.5


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Signature · 5 lines

-- 
Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.