Refine iomux files for i.MX51

PATCH New Jason Wang 3 participants 8 messages Jun 12, 2010 – Jun 17, 2010

Subsystems (3)

Arm (32-bit) Arm sub-architectures Arm i.MX and Layerscape

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Jason Wang

author

2010-06-12 14:22 UTC #0 lore raw

cover Refine iomux files for i.MX51

Through the discussion, I divide my patches to 3 parts.
part1: mx51 iomux related part, the first patch in this part is from
Amit, other patches are based off this patch and they are some fix or adding definitions for imx51_3ds board.
part2: mxc common cpld debugboard patches. In this part, include a
reverting mx31_3ds patch. I have made built and bootup test for mx31_3ds platform.
part3: adding mx51_3ds platform patches.

Because part3 depends on part1 and part2, while part1 and part2 are independent mutually, i will send part1 and part2 first, if these two parts are passed review, then i will send part3.

part1:
[PATCH 1/4] mxc: Fix pad names for imx51
[PATCH 2/4] mx51/iomux: Fix mux mode and input path for two pads [PATCH 3/4] mx51/iomux: add UART and GPIO pad definitions for imx51_3ds board [PATCH 4/4] mxc/iomux: add GPIO bank offset for iomux v3 platforms

part2:
[PATCH 1/2] mxc: add common debug board for 3-stack platforms [PATCH 2/2] mx31_3ds: revert cpld debug board relate code

Jason Wang

author

2010-06-12 14:22 UTC #1 lore raw

PATCH 1/4 mxc: Fix pad names for imx51

From: Amit Kucheria <[email protected]>

The pads capable of being used as GPIOs had their pad-name and mode-name switched. Also fix the following:

- Whitespace fixes
- Replace IOMUX_CONFIG_ALTn with 'n'

Signed-off-by Amit Kucheria <[email protected]>

---
 arch/arm/mach-mx5/board-mx51_babbage.c      |    2 +-
 arch/arm/plat-mxc/include/mach/iomux-mx51.h |  533 +++++++++++++--------------
 2 files changed, 252 insertions(+), 283 deletions(-)

arch/arm/mach-mx5/board-mx51_babbage.c +1 -1

index ed885f9..4f96d9c 100644
@@ -78,7 +78,7 @@ static struct pad_desc mx51babbage_pads[] = {
 	MX51_PAD_USBH1_DATA7__USBH1_DATA7,
 
 	/* USB HUB reset line*/
-	MX51_PAD_GPIO_1_7__GPIO1_7,
+	MX51_PAD_GPIO_1_7__GPIO_1_7,
 };
 
 /* Serial ports */

arch/arm/plat-mxc/include/mach/iomux-mx51.h +251 ~~-282~~

544 lines not on this page · raw message

Signature · 1 line

1.5.6.5

Jason Wang

author

2010-06-12 14:22 UTC #2 lore raw

PATCH 2/4 mx51/iomux: Fix mux mode and input path for two pads

For pad EIM_D27 to work in UART3_RTS mode, the input path should be 3 instead of 0; for pad USBH1_STP to work in GPIO_1_27 mode, the mux value should be 2 instead of 8.

Signed-off-by Jason Wang <[email protected]>

---
 arch/arm/plat-mxc/include/mach/iomux-mx51.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

arch/arm/plat-mxc/include/mach/iomux-mx51.h +2 -2

index e8648bc..7433369 100644
@@ -78,7 +78,7 @@ typedef enum iomux_config {
 #define MX51_PAD_EIM_D24__UART3_CTS             IOMUX_PAD(0x410, 0x07c, 3, 0x0,   0, MX51_UART3_PAD_CTRL)
 #define MX51_PAD_EIM_D25__UART3_RXD             IOMUX_PAD(0x414, 0x080, 3, 0x9f4, 0, MX51_UART3_PAD_CTRL)
 #define MX51_PAD_EIM_D26__UART3_TXD             IOMUX_PAD(0x418, 0x084, 3, 0x0,   0, MX51_UART3_PAD_CTRL)
-#define MX51_PAD_EIM_D27__UART3_RTS             IOMUX_PAD(0x41c, 0x088, 3, 0x9f0, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D27__UART3_RTS             IOMUX_PAD(0x41c, 0x088, 3, 0x9f0, 3, MX51_UART3_PAD_CTRL)
 #define MX51_PAD_EIM_D28__EIM_D28               IOMUX_PAD(0x420, 0x08c, 0, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_D29__EIM_D29               IOMUX_PAD(0x424, 0x090, 0, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_D30__EIM_D30               IOMUX_PAD(0x428, 0x094, 0, 0x0,   0, NO_PAD_CTRL)

@@ -207,7 +207,7 @@ typedef enum iomux_config {
 #define MX51_PAD_USBH1_CLK__USBH1_CLK           IOMUX_PAD(0x678, 0x278, 0, 0x0,   0, MX51_USBH1_PAD_CTRL)
 #define MX51_PAD_USBH1_DIR__USBH1_DIR           IOMUX_PAD(0x67C, 0x27C, 0, 0x0,   0, MX51_USBH1_PAD_CTRL)
 #define MX51_PAD_USBH1_STP__USBH1_STP           IOMUX_PAD(0x680, 0x280, 0, 0x0,   0, MX51_USBH1_PAD_CTRL)
-#define MX51_PAD_USBH1_STP__GPIO_1_27           IOMUX_PAD(0x680, 0x280, IOMUX_CONFIG_GPIO, 0x0,   0, MX51_USBH1_PAD_CTRL)
+#define MX51_PAD_USBH1_STP__GPIO_1_27           IOMUX_PAD(0x680, 0x280, 2, 0x0,   0, MX51_USBH1_PAD_CTRL)
 #define MX51_PAD_USBH1_NXT__USBH1_NXT           IOMUX_PAD(0x684, 0x284, 0, 0x0,   0, MX51_USBH1_PAD_CTRL)
 #define MX51_PAD_USBH1_DATA0__USBH1_DATA0       IOMUX_PAD(0x688, 0x288, 0, 0x0,   0, MX51_USBH1_PAD_CTRL)
 #define MX51_PAD_USBH1_DATA1__USBH1_DATA1       IOMUX_PAD(0x68C, 0x28C, 0, 0x0,   0, MX51_USBH1_PAD_CTRL)

Signature · 1 line

1.5.6.5

Jason Wang

author

2010-06-12 14:22 UTC #3 lore raw

PATCH 3/4 mx51/iomux: add UART and GPIO pad definitions for imx51_3ds board

Add UART2 CTS/RTS and UART3 RXD/TXD pad definitons for imx51_3ds board, add GPIO_1_6 definiton because this pin is used as a CPLD parent irq request pin on imx51_3ds board.

Signed-off-by Jason Wang <[email protected]>

---
 arch/arm/plat-mxc/include/mach/iomux-mx51.h |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

arch/arm/plat-mxc/include/mach/iomux-mx51.h +5 -1

index 7433369..2fc6559 100644
@@ -77,7 +77,9 @@ typedef enum iomux_config {
 #define MX51_PAD_EIM_D23__GPIO_2_7              IOMUX_PAD(0x40c, 0x078, 1, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_D24__UART3_CTS             IOMUX_PAD(0x410, 0x07c, 3, 0x0,   0, MX51_UART3_PAD_CTRL)
 #define MX51_PAD_EIM_D25__UART3_RXD             IOMUX_PAD(0x414, 0x080, 3, 0x9f4, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D25__UART2_CTS		IOMUX_PAD(0x414, 0x080, 4, 0x0,   0, MX51_UART2_PAD_CTRL)
 #define MX51_PAD_EIM_D26__UART3_TXD             IOMUX_PAD(0x418, 0x084, 3, 0x0,   0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D26__UART2_RTS		IOMUX_PAD(0x418, 0x084, 4, 0x9e8, 3, MX51_UART2_PAD_CTRL)
 #define MX51_PAD_EIM_D27__UART3_RTS             IOMUX_PAD(0x41c, 0x088, 3, 0x9f0, 3, MX51_UART3_PAD_CTRL)
 #define MX51_PAD_EIM_D28__EIM_D28               IOMUX_PAD(0x420, 0x08c, 0, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_D29__EIM_D29               IOMUX_PAD(0x424, 0x090, 0, 0x0,   0, NO_PAD_CTRL)

@@ -191,7 +193,9 @@ typedef enum iomux_config {
 #define MX51_PAD_UART1_CTS__UART1_CTS           IOMUX_PAD(0x624, 0x234, 0, 0x0,   0, MX51_UART1_PAD_CTRL)
 #define MX51_PAD_UART2_RXD__UART2_RXD           IOMUX_PAD(0x628, 0x238, 0, 0x9ec, 2, MX51_UART2_PAD_CTRL)
 #define MX51_PAD_UART2_TXD__UART2_TXD           IOMUX_PAD(0x62C, 0x23C, 0, 0x0,   0, MX51_UART2_PAD_CTRL)
+#define MX51_PAD_UART3_RXD__UART3_RXD		IOMUX_PAD(0x630, 0x240, 1, 0x9f4, 4, MX51_UART3_PAD_CTRL)
 #define MX51_PAD_UART3_RXD__GPIO_1_22           IOMUX_PAD(0x630, 0x240, 3, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_UART3_TXD__UART3_TXD		IOMUX_PAD(0x634, 0x244, 1, 0x0,   0, MX51_UART3_PAD_CTRL)
 #define MX51_PAD_UART3_TXD__GPIO_1_23           IOMUX_PAD(0x634, 0x244, 3, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_OWIRE_LINE__GPIO_1_24          IOMUX_PAD(0x638, 0x248, 3, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_KEY_ROW0__KEY_ROW0             IOMUX_PAD(0x63C, 0x24C, 0, 0x0,   0, NO_PAD_CTRL)

@@ -295,7 +299,7 @@ typedef enum iomux_config {
 #define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ	IOMUX_PAD(0x7FC, 0x3D4, 0, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_GPIO_1_4__GPIO_1_4		IOMUX_PAD(0x804, 0x3D8, 0, 0x0,   0, NO_PAD_CTRL)
 #define MX51_PAD_GPIO_1_5__GPIO_1_5		IOMUX_PAD(0x808, 0x3DC, 0, 0x0,   0, NO_PAD_CTRL)
-#define MX51_PAD_GPIO_1_6__GPIO_1_6		IOMUX_PAD(0x80C, 0x3E0, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_6__GPIO_1_6		IOMUX_PAD(0x80C, 0x3E0, 0, 0x0,   0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_GPIO_1_7__GPIO_1_7		IOMUX_PAD(0x810, 0x3E4, 0, 0x0,   0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_GPIO_1_8__GPIO_1_8		IOMUX_PAD(0x814, 0x3E8, 0, 0x0,   1, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_GPIO_1_9__GPIO_1_9		IOMUX_PAD(0x818, 0x3EC, 0, 0x0,   0, NO_PAD_CTRL)

Signature · 1 line

1.5.6.5

Jason Wang

author

2010-06-12 14:22 UTC #4 lore raw

PATCH 4/4 mxc/iomux: add GPIO bank offset for iomux v3 platforms

These GPIO bank offsets are useful when define a gpio number. E.G. when GPIO PORTC pin 6 is used for irq request pin of external expanding device, we can define it like:
#define EXP_PARENT_IRQ_PIN (GPIO_PORTC + 6)

Signed-off-by Jason Wang <[email protected]>

---
 arch/arm/plat-mxc/include/mach/iomux-v3.h |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

arch/arm/plat-mxc/include/mach/iomux-v3.h +15 -0

index f2f73d3..0880a4a 100644
@@ -89,6 +89,21 @@ struct pad_desc {
 #define PAD_CTL_SRE_FAST		(1 << 0)
 #define PAD_CTL_SRE_SLOW		(0 << 0)
 
+
+#define MX51_NUM_GPIO_PORT	4
+
+#define GPIO_PIN_MASK 0x1f
+
+#define GPIO_PORT_SHIFT 5
+#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
+
+#define GPIO_PORTA	(0 << GPIO_PORT_SHIFT)
+#define GPIO_PORTB	(1 << GPIO_PORT_SHIFT)
+#define GPIO_PORTC	(2 << GPIO_PORT_SHIFT)
+#define GPIO_PORTD	(3 << GPIO_PORT_SHIFT)
+#define GPIO_PORTE	(4 << GPIO_PORT_SHIFT)
+#define GPIO_PORTF	(5 << GPIO_PORT_SHIFT)
+
 /*
  * setups a single pad in the iomuxer
  */

Signature · 1 line

1.5.6.5

Sascha Hauer

maintainer

2010-06-16 06:47 UTC #5 lore raw

cover Refine iomux files for i.MX51

In reply to Jason Wang

Quoted 4 lines · Jason Wang

Through the discussion, I divide my patches to 3 parts.
part1: mx51 iomux related part, the first patch in this part is from
Amit, other patches are based off this patch and they are some fix or adding definitions for imx51_3ds board.

This is ok now. Can you please rebase onto
git://git.pengutronix.de/git/imx/linux-2.6.git imx-for-2.6.36

The first patch conflicts with another of your patches:

e5ceef78 mx5: Add i2c to Freescale MX51 Babbage HW

Signature · 4 lines

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Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Amit Kucheria

2010-06-16 11:08 UTC #6 lore raw

cover Refine iomux files for i.MX51

Quoted 6 lines · Sascha Hauer

Quoted 4 lines · Jason Wang
Through the discussion, I divide my patches to 3 parts.
part1: mx51 iomux related part, the first patch in this part is from
Amit, other patches are based off this patch and they are some fix or adding definitions for imx51_3ds board.

Quoted 7 lines

This is ok now. Can you please rebase onto
git://git.pengutronix.de/git/imx/linux-2.6.git imx-for-2.6.36
The first patch conflicts with another of your patches:
e5ceef78 mx5: Add i2c to Freescale MX51 Babbage HW

Please find rebased patch below.

It is only compile-tested (broken board getting updated)

Cheers,
Amit

Signature · 3 lines

----------------------------------------------------------------------
Amit Kucheria, Kernel Engineer || amit.kucheria at canonical.com
----------------------------------------------------------------------

jason

author

2010-06-17 13:34 UTC #7 lore raw

cover Refine iomux files for i.MX51

In reply to Sascha Hauer

Quoted 8 lines · Sascha Hauer

Quoted 5 lines · Jason Wang
Through the discussion, I divide my patches to 3 parts.
part1: mx51 iomux related part, the first patch in this part is from
Amit, other patches are based off this patch and they are some fix or adding definitions for imx51_3ds board.

Quoted 9 lines

This is ok now. Can you please rebase onto
git://git.pengutronix.de/git/imx/linux-2.6.git imx-for-2.6.36
The first patch conflicts with another of your patches:
e5ceef78 mx5: Add i2c to Freescale MX51 Babbage HW

OK, i will use Amit's new patch and test it based on your repository.

Thanks,
Jason.