Building omap3_sdp3430 fails with older compilers

U-Boot New Wolfgang Denk 4 participants 7 messages Jun 18, 2010 Arm (32-bit)

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Wolfgang Denk

author

2010-06-18 09:25 UTC #0 lore raw

The changes introduced by this commit:

	commit 7a2aa8b68120f333ed2edc33475ca195810d6cb1
	Author: Tom Rix <[email protected]>
	Date:   Thu Sep 10 15:27:57 2009 -0400

	    OMAP3 Move cache routine to cache.S

added, among other things, a number of "push" and "pop" instructions to arch/arm/cpu/arm_cortexa8/omap3/cache.S; older tool chains (like GCC 4.0.0 as included for example with ELDK 4.1) barf on these:

-> eldk-switch -r 4.1 arm
Setup for arm-linux (using ELDK 4.1)
-> ./MAKEALL omap3_sdp3430
Configuring for omap3_sdp3430 board...
cache.S: Assembler messages:
cache.S:133: Error: bad instruction push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction pop {r1,r2,r3,pc}' make[1]: *** [cache.o] Error 1
make: *** [arch/arm/cpu/arm_cortexa8/omap3/libomap3.a] Error 2

Is there a way to write this code without suing these insns?

Thanks in advance.

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
God may be subtle, but He isn't plain mean.         - Albert Einstein

Grazvydas Ignotas

2010-06-18 11:59 UTC #1 lore raw

Quoted 24 lines · Wolfgang Denk

The changes introduced by this commit:
? ? ? ?commit 7a2aa8b68120f333ed2edc33475ca195810d6cb1 ? ? ? ?Author: Tom Rix <[email protected]> ? ? ? ?Date: ? Thu Sep 10 15:27:57 2009 -0400
? ? ? ? ? ?OMAP3 Move cache routine to cache.S
added, among other things, a number of "push" and "pop" instructions to arch/arm/cpu/arm_cortexa8/omap3/cache.S; older tool chains (like GCC 4.0.0 as included for example with ELDK 4.1) barf on these:
-> eldk-switch -r 4.1 arm
Setup for arm-linux (using ELDK 4.1)
-> ./MAKEALL omap3_sdp3430
Configuring for omap3_sdp3430 board...
cache.S: Assembler messages:
cache.S:133: Error: bad instruction push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction pop {r1,r2,r3,pc}' make[1]: *** [cache.o] Error 1
make: *** [arch/arm/cpu/arm_cortexa8/omap3/libomap3.a] Error 2

Quoted 1 line

Is there a way to write this code without suing these insns?

Yes, this can be changed to stm/ldm.

Wolfgang Denk

author

2010-06-18 14:03 UTC #2 lore raw

PATCH 1/1 arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

In reply to Wolfgang Denk

The push / pop instructions used in this file are available only with more recent tool chains:

cache.S: Assembler messages:
cache.S:133: Error: bad instruction push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction pop {r1,r2,r3,pc}'

Change push/pop into stmfd/ldmfd instructions to support older versions of binutils as well.

I verified that the modified source code generates exactly the same binary code.

Signed-off-by Wolfgang Denk <[email protected]>

Cc Sandeep Paulraj <[email protected]>

Cc Tom Rix <[email protected]>

---
 arch/arm/cpu/arm_cortexa8/omap3/cache.S |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

arch/arm/cpu/arm_cortexa8/omap3/cache.S +4 -4

index 0f63815..4b65ac5 100644
@@ -130,7 +130,7 @@ finished_inval:
 
 
 l2_cache_enable:
-	push	{r0, r1, r2, lr}
+	stmfd	r13!, {r0, r1, r2, lr}
 	@ ES2 onwards we can disable/enable L2 ourselves
 	bl	get_cpu_rev
 	cmp	r0, #CPU_3XX_ES20

@@ -157,11 +157,11 @@ l2_cache_enable_EARLIER_THAN_ES2:
 	mov	ip, r3
 	str	r3, [sp, #4]
 l2_cache_enable_END:
-	pop	{r1, r2, r3, pc}
+	ldmfd	r13!, {r1, r2, r3, pc}
 
 
 l2_cache_disable:
-	push	{r0, r1, r2, lr}
+	stmfd	r13!, {r0, r1, r2, lr}
 	@ ES2 onwards we can disable/enable L2 ourselves
 	bl	get_cpu_rev
 	cmp	r0, #CPU_3XX_ES20

@@ -188,4 +188,4 @@ l2_cache_disable_EARLIER_THAN_ES2:
 	mov	ip, r3
 	str	r3, [sp, #4]
 l2_cache_disable_END:
-	pop	{r1, r2, r3, pc}
+	ldmfd	r13!, {r1, r2, r3, pc}

Signature · 1 line

1.7.0.1

Paulraj

2010-06-18 14:12 UTC #3 lore raw

PATCH 1/1 arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

Quoted 14 lines

Subject: [PATCH] arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools
The push / pop instructions used in this file are available only with more recent tool chains:
cache.S: Assembler messages:
cache.S:133: Error: bad instruction push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction pop {r1,r2,r3,pc}'

Quoted 5 lines

Change push/pop into stmfd/ldmfd instructions to support older versions of binutils as well.
I verified that the modified source code generates exactly the same binary code.

Wolfgang, Thanks for taking acre of this.

I do run MAKEALL but the toolchain I use is the latest from Codesourcery

Quoted 44 lines

Signed-off-by Wolfgang Denk <[email protected]>

Cc Sandeep Paulraj <[email protected]>

Cc Tom Rix <[email protected]>

---
 arch/arm/cpu/arm_cortexa8/omap3/cache.S |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

arch/arm/cpu/arm_cortexa8/omap3/cache.S +4 -5

index 0f63815..4b65ac5 100644
@@ -130,7 +130,7 @@ finished_inval:
 
 
 l2_cache_enable:
-	push	{r0, r1, r2, lr}
+	stmfd	r13!, {r0, r1, r2, lr}
 	@ ES2 onwards we can disable/enable L2 ourselves
 	bl	get_cpu_rev
 	cmp	r0, #CPU_3XX_ES20

@@ -157,11 +157,11 @@ l2_cache_enable_EARLIER_THAN_ES2:
 	mov	ip, r3
 	str	r3, [sp, #4]
 l2_cache_enable_END:
-	pop	{r1, r2, r3, pc}
+	ldmfd	r13!, {r1, r2, r3, pc}
 
 
 l2_cache_disable:
-	push	{r0, r1, r2, lr}
+	stmfd	r13!, {r0, r1, r2, lr}
 	@ ES2 onwards we can disable/enable L2 ourselves
 	bl	get_cpu_rev
 	cmp	r0, #CPU_3XX_ES20

@@ -188,4 +188,4 @@ l2_cache_disable_EARLIER_THAN_ES2:
 	mov	ip, r3
 	str	r3, [sp, #4]
 l2_cache_disable_END:
-	pop	{r1, r2, r3, pc}
+	ldmfd	r13!, {r1, r2, r3, pc}
--

1.7.0.1

Wolfgang Denk

author

2010-06-18 14:24 UTC #4 lore raw

PATCH 1/1 arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

Dear Sandeep,

Quoted 8 lines · In message <[email protected]> you…

Quoted 4 lines
I verified that the modified source code generates exactly the same binary code.
Wolfgang, Thanks for taking acre of this.
I do run MAKEALL but the toolchain I use is the latest from Codesourcery

ELDK 4.1 (based on GCC 4.0.0 and binutils 2.16.1) is old enough that push / pop will not work. If you really want to test this case you could use this (as I did).

But the, I think it's sufficient that the binary code is identical with recent tool chains.

Thanks!

Best regards,

Wolfgang Denk

Signature · 6 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Very ugly or very beautiful women should be flattered on their
understanding, and mediocre ones on their beauty.
                                       -- Philip Earl of Chesterfield

Albin Tonnerre

2010-06-18 14:57 UTC #5 lore raw

PATCH 1/1 arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

In reply to Wolfgang Denk

Hi Wolfgang,

Quoted 14 lines · Wolfgang Denk

arch/arm/cpu/arm_cortexa8/omap3/cache.S +0 -0
index 0f63815..4b65ac5 100644
@@ -130,7 +130,7 @@ finished_inval:
 
 
?l2_cache_enable:
- ? ? ? push ? ?{r0, r1, r2, lr}
+ ? ? ? stmfd ? r13!, {r0, r1, r2, lr}
? ? ? ?@ ES2 onwards we can disable/enable L2 ourselves ? ? ? ?bl ? ? ?get_cpu_rev
? ? ? ?cmp ? ? r0, #CPU_3XX_ES20
arch/arm/cpu/arm_cortexa8/omap3/cache.S +0 -0
@@ -157,11 +157,11 @@ l2_cache_enable_EARLIER_THAN_ES2:

Quoted 5 lines

? ? ? ?mov ? ? ip, r3
? ? ? ?str ? ? r3, [sp, #4]
?l2_cache_enable_END:
- ? ? ? pop ? ? {r1, r2, r3, pc}
+ ? ? ? ldmfd ? r13!, {r1, r2, r3, pc}

For clarity's sake, it might be worth using sp instead of r13

Cheers,
Albin

Wolfgang Denk

author

2010-06-18 15:13 UTC #6 lore raw

PATCH 1/1 arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

Dear Albin Tonnerre,

Quoted 6 lines · In message <[email protected]> you…

arch/arm/cpu/arm_cortexa8/omap3/cache.S finished_inval:
Quoted 5 lines
l2_cache_enable:
arch/arm/cpu/arm_cortexa8/omap3/cache.S +1 -1
-          push      {r0, r1, r2, lr}
+          stmfd    r13!, {r0, r1, r2, lr}
           @ ES2 onwards we can disable/enable L2 ourselv=
es

Quoted 10 lines

arch/arm/cpu/arm_cortexa8/omap3/cache.S l2_cache_enable_EARLIER_THAN_ES2: · line 160
Quoted 8 lines
           bl         get_cpu_rev
           cmp       r0, #CPU_3XX_ES20
arch/arm/cpu/arm_cortexa8/omap3/cache.S +1 -1
@@ -157,11 +157,11 @@ l2_cache_enable_EARLIER_THAN_ES2:
           mov       ip, r3
           str       r3, [sp, #4]
  l2_cache_enable_END:
-          pop       {r1, r2, r3, pc}
+          ldmfd    r13!, {r1, r2, r3, pc}
For clarity's sake, it might be worth using sp instead of r13

Agreed, but for the sake of consisitency (all other similar places in this file use r13 as well) I decided to stick with the existing convention.

Maybe we should submit an additional cleanp-patch that changes r13 into sp when used like this? (or always?)

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
An armed society is a polite society.