Allow PHY addresses on kirkwood egiga to be non continuous.
PATCH v2 1/1 Allow PHY addresses on kirkwood egiga to be non continuous.
Changing its configuration from PHY_BASE_ADR single value to use CONFIG_PHY_BASE_ADDRS as an array with adresses.
Updated in version 2:
Merged board updates to single patch.
--- board/keymile/km_arm/km_arm.c | 3 ++- drivers/net/kirkwood_egiga.c | 3 ++- drivers/net/kirkwood_egiga.h | 8 ++++---- include/configs/guruplug.h | 2 +- include/configs/km_arm.h | 2 +- include/configs/openrd_base.h | 2 +- include/configs/rd6281a.h | 2 +- include/configs/sheevaplug.h | 2 +- 8 files changed, 13 insertions(+), 11 deletions(-)
board/keymile/km_arm/km_arm.c +2 -1
@@ -244,12 +244,13 @@ int dram_init(void)void reset_phy (void ) {char *name ="egiga0" ; +u8 port_addr[] =CONFIG_PHY_ADDRS ;if (miiphy_set_current_dev (name))return ;/* reset the phy */ -miiphy_reset (name,CONFIG_PHY_BASE_ADR ); +miiphy_reset (name, port_addr[0 ]); }#if defined(CONFIG_HUSH_INIT_VAR )
drivers/net/kirkwood_egiga.c +2 -1
@@ -629,6 +629,7 @@ int kirkwood_egiga_initialize(bd_t * bis)int devnum;char *s;u8 used_ports[MAX_KWGBE_DEVS ] =CONFIG_KIRKWOOD_EGIGA_PORTS ; +u8 port_addr[MAX_KWGBE_DEVS ] =PHY_ADDRS ;for (devnum =0 ; devnum <MAX_KWGBE_DEVS ; devnum++) {/*skip if port is configured not to use */
@@ -712,7 +713,7 @@ int kirkwood_egiga_initialize(bd_t * bis)miiphy_register (dev->name, smi_reg_read, smi_reg_write);/* Set phy address of the port */ miiphy_write (dev->name,KIRKWOOD_PHY_ADR_REQUEST , -KIRKWOOD_PHY_ADR_REQUEST ,PHY_BASE_ADR + devnum); +KIRKWOOD_PHY_ADR_REQUEST , port_addr[devnum]);#endif }return 0 ;
drivers/net/kirkwood_egiga.h +4 -4
@@ -30,11 +30,11 @@#define MAX_KWGBE_DEVS 2/*controller has two ports */ -/* PHY_BASE_ADR is board specific and can be configured */ -#if defined (CONFIG_PHY_BASE_ADR ) -#define PHY_BASE_ADR CONFIG_PHY_BASE_ADR +/* PHY addresses is board specific and can be configured */ +#if defined (CONFIG_PHY_ADDRS ) +#define PHY_ADDRS CONFIG_PHY_ADDRS#else -#define PHY_BASE_ADR 0x08/* default phy base addr */ +#define PHY_ADDRS {0x08,0x09}/* default phy base addr */ #endif /* Constants */
include/configs/guruplug.h +1 -1
@@ -175,7 +175,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1}/* enable both ports */ -#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_PHY_ADDRS {0,1}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv88e1121 PHY */ #endif /* CONFIG_CMD_NET */
include/configs/km_arm.h +1 -1
@@ -130,7 +130,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0}/* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_PHY_ADDRS {0,1}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
include/configs/openrd_base.h +1 -1
@@ -186,7 +186,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0}/* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0x8 +#define CONFIG_PHY_ADDRS {0x8,0x9}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ #endif /* CONFIG_CMD_NET */
include/configs/rd6281a.h +1 -1
@@ -176,7 +176,7 @@#define CONFIG_MV88E61XX_MULTICHIP_ADRMODE #define CONFIG_DIS_AUTO_NEG_SPEED_GMII /*Disable Auto speed negociation */ #define CONFIG_PHY_SPEED _1000BASET/*Force PHYspeed to 1GBPs */ -#define CONFIG_PHY_BASE_ADR 0x0A +#define CONFIG_PHY_ADDRS {0x0A,0x0B}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init switch and PHY */ #define CONFIG_MV88E61XX_SWITCH /* Enable MV88E61XX switch driver */
include/configs/sheevaplug.h +1 -1
@@ -177,7 +177,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0}/* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_PHY_ADDRS {0,1}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ #endif /* CONFIG_CMD_NET */
Signature · 1 line
1.7.0.4
PATCH v2 1/1 Allow PHY addresses on kirkwood egiga to be non continuous.
Quoted 10 lines
-----Original Message-----
From: Tor Krill [mailto:tor at excito.com]
Sent: Thursday, June 24, 2010 3:02 PM
To: u-boot at lists.denx.de
Cc: Prafulla Wadaskar; Tor Krill
Subject: [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.
Quoted 6 lines
Changing its configuration from
PHY_BASE_ADRsingle value to useCONFIG_PHY_BASE_ADDRSas an array with adresses.Updated in version 2:
Merged board updates to single patch.
These two lines should go as changelog for v2 below (after ---)
Quoted 3 lines
Signed-off-by Tor Krill <[email protected]>---
i.e. here..
Quoted 9 lines
board/keymile/km_arm/km_arm.c | 3 ++- drivers/net/kirkwood_egiga.c | 3 ++- drivers/net/kirkwood_egiga.h | 8 ++++---- include/configs/guruplug.h | 2 +- include/configs/km_arm.h | 2 +- include/configs/openrd_base.h | 2 +- include/configs/rd6281a.h | 2 +- include/configs/sheevaplug.h | 2 +- 8 files changed, 13 insertions(+), 11 deletions(-)
Hi Tom
I understood your problem.
But all of the Kirkwood boards so far have similar implementation which is standard practice. How does your board design differed in this case?
Instead of fixing it here for all other boards,
can't you simply align PHY address on your board?
I think this will be much easier.
Regards..
Prafulla . .
PATCH v2 1/1 Allow PHY addresses on kirkwood egiga to be non continuous.
Hi Prafulla,
Quoted 9 lines · Prafulla Wadaskar
Quoted 9 lines
-----Original Message-----
From: Tor Krill [mailto:tor at excito.com]
Sent: Thursday, June 24, 2010 3:02 PM
To: u-boot at lists.denx.de
Cc: Prafulla Wadaskar; Tor Krill
Subject: [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.
Quoted 8 lines
Quoted 6 lines
Changing its configuration from
PHY_BASE_ADRsingle value to useCONFIG_PHY_BASE_ADDRSas an array with adresses.Updated in version 2:
Merged board updates to single patch.
These two lines should go as changelog for v2 below (after ---)
Sorry, there seems to be no end on my mistakes :(
Quoted 15 lines
Quoted 3 lines
Signed-off-by Tor Krill <[email protected]>---
i.e. here..
Quoted 9 lines
board/keymile/km_arm/km_arm.c | 3 ++- drivers/net/kirkwood_egiga.c | 3 ++- drivers/net/kirkwood_egiga.h | 8 ++++---- include/configs/guruplug.h | 2 +- include/configs/km_arm.h | 2 +- include/configs/openrd_base.h | 2 +- include/configs/rd6281a.h | 2 +- include/configs/sheevaplug.h | 2 +- 8 files changed, 13 insertions(+), 11 deletions(-)
Quoted 8 lines
Hi Tom
I understood your problem.
But all of the Kirkwood boards so far have similar implementation which is standard practice. How does your board design differed in this case?Instead of fixing it here for all other boards,
can't you simply align PHY address on your board?
I think this will be much easier.
We use both ethernet interfaces by default in our design, with the phy addresses 0x08 and 0x18, and unfortunately we have already started the manufacturing of these units which makes it expensive and hard to reverse this design decision :(
But if we turn this around if the hardware allows this then why not let this be configurable in u-boot as well? Do this have any technical implications on the other boards?
Best Regards,
/Tor
PATCH v2 1/1 Allow PHY addresses on kirkwood egiga to be non continuous.
In reply to Tor Krillboard/keymile/km_arm/km_arm.c int dram_init(void) · line 254
Quoted 12 lines · On Thursday, June 24, 2010 05:31:47 Tor Krill wrote:
void
reset_phy(void)
{board/keymile/km_arm/km_arm.c +2
-1char *name ="egiga0" ; +u8 port_addr[] =CONFIG_PHY_ADDRS ;if (miiphy_set_current_dev (name))return ;/* reset the phy */ -miiphy_reset (name,CONFIG_PHY_BASE_ADR ); +miiphy_reset (name, port_addr[0 ]); }
hmm, this cant possibly be correct. how do you know which of the phys is to be reset ? but i guess that's just a bug in the ARM tree you cant do much about without fixing everyone.
Quoted 25 lines
drivers/net/kirkwood_egiga.c +2
-1@@ -629,6 +629,7 @@ int kirkwood_egiga_initialize(bd_t * bis)int devnum;char *s;u8 used_ports[MAX_KWGBE_DEVS ] =CONFIG_KIRKWOOD_EGIGA_PORTS ; +u8 port_addr[MAX_KWGBE_DEVS ] =PHY_ADDRS ;for (devnum =0 ; devnum <MAX_KWGBE_DEVS ; devnum++) {/*skip if port is configured not to use */ @@ -712,7 +713,7 @@ int kirkwood_egiga_initialize(bd_t * bis)miiphy_register (dev->name, smi_reg_read, smi_reg_write);/* Set phy address of the port */ miiphy_write (dev->name,KIRKWOOD_PHY_ADR_REQUEST , -KIRKWOOD_PHY_ADR_REQUEST ,PHY_BASE_ADR + devnum); +KIRKWOOD_PHY_ADR_REQUEST , port_addr[devnum]);#endif }return 0 ;drivers/net/kirkwood_egiga.h +0
-0@@ -30,11 +30,11 @@#define MAX_KWGBE_DEVS 2/*controller has two ports */
drivers/net/kirkwood_egiga.h line 38
Quoted 10 lines
drivers/net/kirkwood_egiga.h +4
-4-/* PHY_BASE_ADR is board specific and can be configured */ -#if defined (CONFIG_PHY_BASE_ADR ) -#define PHY_BASE_ADR CONFIG_PHY_BASE_ADR +/* PHY addresses is board specific and can be configured */ +#if defined (CONFIG_PHY_ADDRS ) +#define PHY_ADDRS CONFIG_PHY_ADDRS#else -#define PHY_BASE_ADR 0x08/* default phy base addr */ +#define PHY_ADDRS {0x08,0x09}/* default phy base addr */ #endif
i dont know anything about the kirkwood_egiga, but cant you have more than one instance on a board ? if so, it'd make more sense to change the phy addr define stuff into an array argument that gets passed to the driver init func. -mike
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PATCH v2 1/1 Allow PHY addresses on kirkwood egiga to be non continuous.
Hi all,
Le 24/06/2010 18:37, Mike Frysinger a ?crit :
Quoted 4 lines
i dont know anything about the
kirkwood_egiga, but cant you have more than one instance on a board ? if so, it'd make more sense to change the phy addr define stuff into an array argument that gets passed to the driver init func. -mike
More than one instance on Kirkwood is not possible as the egiga is actually part of the SoC itself.
(note however that it is used on other Marvell SoCs, notably Orion5x with only one port; I am preparing (and yes, dutifully testing, on both a Kirkwood OpenRD Client and an Orion5x ED Mini V2) a set of patches that will remove ties to kirkwood in egiga and then add orion5x support to it)
Amicalement,
Signature · 1 line
Albert.
PATCH v2 1/1 Allow PHY addresses on kirkwood egiga to be non continuous.
Quoted 8 lines · On Thursday, June 24, 2010 12:48:25 Albert ARIBAUD wrote:
Le 24/06/2010 18:37, Mike Frysinger a ?crit :
Quoted 4 lines
i dont know anything about the
kirkwood_egiga, but cant you have more than one instance on a board ? if so, it'd make more sense to change the phy addr define stuff into an array argument that gets passed to the driver init func. -mikeMore than one instance on Kirkwood is not possible as the egiga is actually part of the SoC itself.
until the SoC maker produces one with 2 on it ;)
but ok, nm me then
-mike
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PATCH v2 1/1 Allow PHY addresses on kirkwood egiga to be non continuous.
In reply to Mike FrysingerQuoted 9 lines · Mike Frysinger
Quoted 8 lines · On Thursday, June 24, 2010 05:31:47 Tor Krill wrote:
void
reset_phy(void)
{board/keymile/km_arm/km_arm.c +1
-0char *name ="egiga0" ; +u8 port_addr[] =CONFIG_PHY_ADDRS ;if (miiphy_set_current_dev (name))return ;
Quoted 8 lines
board/keymile/km_arm/km_arm.c int dram_init(void) · line 254
Quoted 4 lines
board/keymile/km_arm/km_arm.c +1
-1/* reset the phy */ -miiphy_reset (name,CONFIG_PHY_BASE_ADR ); +miiphy_reset (name, port_addr[0 ]); }hmm, this cant possibly be correct. how do you know which of the phys is to be reset ? but i guess that's just a bug in the ARM tree you cant do much about without fixing everyone.
In the original the base adress was used to adress the PHY being reset and as long as you don't enter the addresses in reverse in the array the above construction should work. (And since this is for a specific board, only using one PHY(?), it should be quite isolated.)
/Tor