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Add more boundary checking to sse3/4 parsing

PATCH Applied Andi Kleen 2 participants 2 messages Jun 26, 2010 – Jul 1, 2010

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Andi Kleen

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#0 lore raw

PATCH 1/1 Add more boundary checking to sse3/4 parsing

Add more boundary checking to sse3/4 parsing

s?sse3 uses tables with only two entries per op, but it is indexed with b1 which can contain variables upto 3. This happens when ssse3 or sse4 are used with REP* prefixes.

Add boundary checking for this case.

target-i386/translate.c +6 -0
index 1336d6f..aae0374 100644
@@ -3472,6 +3472,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
         case 0x171: /* shift xmm, im */
         case 0x172:
         case 0x173:
+            if (b1 >= 2)
+	        goto illegal_op;
             val = ldub_code(s->pc++);
             if (is_xmm) {
                 gen_op_movl_T0_im(val);
@@ -3699,6 +3701,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
             rm = modrm & 7;
             reg = ((modrm >> 3) & 7) | rex_r;
             mod = (modrm >> 6) & 3;
+            if (b1 >= 2)
+                goto illegal_op;
 
             sse_op2 = sse_op_table6[b].op[b1];
             if (!sse_op2)
@@ -3798,6 +3802,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
             rm = modrm & 7;
             reg = ((modrm >> 3) & 7) | rex_r;
             mod = (modrm >> 6) & 3;
+            if (b1 >= 2)
+                goto illegal_op;
 
             sse_op2 = sse_op_table7[b].op[b1];
             if (!sse_op2)
#1 lore raw
Quoted 9 lines · Andi Kleen

Add more boundary checking to sse3/4 parsing

s?sse3 uses tables with only two entries per op, but it is indexed with b1 which can contain variables upto 3. This happens when ssse3 or sse4 are used with REP* prefixes.

Add boundary checking for this case.

Thanks, applied.

Quoted 33 lines
target-i386/translate.c +6 -0
index 1336d6f..aae0374 100644
@@ -3472,6 +3472,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
         case 0x171: /* shift xmm, im */
         case 0x172:
         case 0x173:
+            if (b1 >= 2)
+	        goto illegal_op;
             val = ldub_code(s->pc++);
             if (is_xmm) {
                 gen_op_movl_T0_im(val);
@@ -3699,6 +3701,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
             rm = modrm & 7;
             reg = ((modrm >> 3) & 7) | rex_r;
             mod = (modrm >> 6) & 3;
+            if (b1 >= 2)
+                goto illegal_op;
 
             sse_op2 = sse_op_table6[b].op[b1];
             if (!sse_op2)
@@ -3798,6 +3802,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
             rm = modrm & 7;
             reg = ((modrm >> 3) & 7) | rex_r;
             mod = (modrm >> 6) & 3;
+            if (b1 >= 2)
+                goto illegal_op;
 
             sse_op2 = sse_op_table7[b].op[b1];
             if (!sse_op2)
Signature · 2 lines
Aurelien Jarno                          GPG: 1024D/F1BCDB73
[email protected]                 http://www.aurel32.net