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x86: Align skb w/ start of cacheline on newer core 2/Xeon Arch

PATCH Applied Jeff Kirsher 5 participants 7 messages Jun 30, 2010 – Jul 1, 2010

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#0 lore raw

PATCH v2 1/1 x86: Align skb w/ start of cacheline on newer core 2/Xeon Arch

From: Alexander Duyck <[email protected]>

x86 architectures can handle unaligned accesses in hardware, and it has been shown that unaligned DMA accesses can be expensive on Nehalem architectures. As such we should overwrite NET_IP_ALIGN to resolve this issue.

---

 arch/x86/include/asm/system.h |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)
arch/x86/include/asm/system.h +9 -0
index b8fe48e..b4293fc 100644
@@ -457,4 +457,13 @@ static inline void rdtsc_barrier(void)
 	alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
 }
 
+#ifdef CONFIG_MCORE2
+/*
+ * We handle most unaligned accesses in hardware.  On the other hand
+ * unaligned DMA can be quite expensive on some Nehalem processors.
+ *
+ * Based on this we disable the IP header alignment in network drivers.
+ */
+#define NET_IP_ALIGN	0
+#endif
 #endif /* _ASM_X86_SYSTEM_H */
maintainer
#1 lore raw

From: Jeff Kirsher <[email protected]>
Date: Tue, 29 Jun 2010 21:38:00 -0700

Quoted 7 lines

From: Alexander Duyck <[email protected]>

x86 architectures can handle unaligned accesses in hardware, and it has been shown that unaligned DMA accesses can be expensive on Nehalem architectures. As such we should overwrite NET_IP_ALIGN to resolve this issue.

Quoted 6 lines

Can I get an x86'er ACK on this? I can merge it in via net-next-2.6 which is probably most convenient for people who want to see the networking performance effects of this change.

reviewer Acked-by
#2 lore raw
Quoted 17 lines · David Miller

From: Jeff Kirsher <[email protected]>
Date: Tue, 29 Jun 2010 21:38:00 -0700

Quoted 7 lines

From: Alexander Duyck <[email protected]>

x86 architectures can handle unaligned accesses in hardware, and it has been shown that unaligned DMA accesses can be expensive on Nehalem architectures. As such we should overwrite NET_IP_ALIGN to resolve this issue.

Quoted 6 lines
Quoted 3 lines

Can I get an x86'er ACK on this? I can merge it in via net-next-2.6 which is probably most convenient for people who want to see the networking performance effects of this change.

-hpa

maintainer Applied
#3 lore raw

From: "H. Peter Anvin" <[email protected]>
Date: Wed, 30 Jun 2010 14:32:33 -0700

Quoted 18 lines · David Miller
Quoted 17 lines

From: Jeff Kirsher <[email protected]>
Date: Tue, 29 Jun 2010 21:38:00 -0700

Quoted 13 lines

From: Alexander Duyck <[email protected]>

x86 architectures can handle unaligned accesses in hardware, and it has been shown that unaligned DMA accesses can be expensive on Nehalem architectures. As such we should overwrite NET_IP_ALIGN to resolve this issue.

Quoted 5 lines
Quoted 3 lines

Can I get an x86'er ACK on this? I can merge it in via net-next-2.6 which is probably most convenient for people who want to see the networking performance effects of this change.

Applied, thanks everyone.

#4 lore raw
In reply to Jeff Kirsher

Jeff Kirsher <[email protected]> writes:

Sorry for the late comment.

arch/x86/include/asm/system.h static inline void rdtsc_barrier(void) · line 469

Quoted 11 lines
arch/x86/include/asm/system.h +9 -0
+#ifdef CONFIG_MCORE2
+/*
+ * We handle most unaligned accesses in hardware.  On the other hand
+ * unaligned DMA can be quite expensive on some Nehalem processors.
+ *
+ * Based on this we disable the IP header alignment in network drivers.
+ */
+#define NET_IP_ALIGN	0
+#endif
 #endif /* _ASM_X86_SYSTEM_H */

The ifdef should be imho dropped and the option be made unconditional for all x86. I am not aware of any x86 core where unalignment is really slow. This would increase the chance of it actually working on many configurations which do not necessarily optimize for Core2.

-Andi

Signature · 1 line
[email protected] -- Speaking for myself only.
#5 lore raw
Quoted 22 lines · Andi Kleen

Jeff Kirsher <[email protected]> writes:

Sorry for the late comment.

arch/x86/include/asm/system.h static inline void rdtsc_barrier(void) · line 469

Quoted 11 lines
arch/x86/include/asm/system.h +9 -0
+#ifdef CONFIG_MCORE2
+/*
+ * We handle most unaligned accesses in hardware.  On the other hand
+ * unaligned DMA can be quite expensive on some Nehalem processors.
+ *
+ * Based on this we disable the IP header alignment in network drivers.
+ */
+#define NET_IP_ALIGN	0
+#endif
 #endif /* _ASM_X86_SYSTEM_H */

The ifdef should be imho dropped and the option be made unconditional for all x86. I am not aware of any x86 core where unalignment is really slow. This would increase the chance of it actually working on many configurations which do not necessarily optimize for Core2.

Quoted 1 line

-Andi

Seems to make sense to me. I will see about generating a patch that drops the check for CONFIG_MCORE2.

Thanks,

Alex

#6 lore raw
Quoted 23 lines · Alexander Duyck
Quoted 22 lines · Andi Kleen

Jeff Kirsher <[email protected]> writes:

Sorry for the late comment.

arch/x86/include/asm/system.h static inline void rdtsc_barrier(void) · line 469

Quoted 11 lines
arch/x86/include/asm/system.h +9 -0
+#ifdef CONFIG_MCORE2
+/*
+ * We handle most unaligned accesses in hardware.  On the other hand
+ * unaligned DMA can be quite expensive on some Nehalem processors.
+ *
+ * Based on this we disable the IP header alignment in network drivers.
+ */
+#define NET_IP_ALIGN	0
+#endif
 #endif /* _ASM_X86_SYSTEM_H */

The ifdef should be imho dropped and the option be made unconditional for all x86. I am not aware of any x86 core where unalignment is really slow. This would increase the chance of it actually working on many configurations which do not necessarily optimize for Core2.

Quoted 5 lines
Quoted 1 line

-Andi

Seems to make sense to me. I will see about generating a patch that drops the check for CONFIG_MCORE2.

Just drop the #ifdef ... #endif.

-hpa