clocksource: sh_cmt: Rate calculation fix
Subsystems (2)
PATCH 1/1 clocksource: sh_cmt: Rate calculation fix
From: Magnus Damm <[email protected]>
Fix the rate calculation in the CMT driver.
Without this fix the clocksource runs way
too fast and we get a divide-by-zero error.
Signed-off-by Magnus Damm <[email protected]>
---
drivers/clocksource/sh_cmt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clocksource/sh_cmt.c +1 -1
@@ -445,7 +445,7 @@ static int sh_cmt_register_clocksource(s/* clk_get_rate() needs an enabled clock */ clk_enable (p->clk); - p->rate =clk_get_rate (p->clk) / (p->width =16 ) ?512 :8 ; + p->rate =clk_get_rate (p->clk) / ((p->width =16 ) ?512 :8 );clk_disable (p->clk);/* TODO: calculate good shift from rate and counter bit width */
Paul Mundt
AppliedQuoted 7 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Fix the rate calculation in the CMT driver.
Without this fix the clocksource runs way
too fast and we get a divide-by-zero error.Signed-off-by Magnus Damm <[email protected]>
Quoted 8 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Fix a one-off error in the CMT driver V2. The match register should be programmed with the period minus one.
Many thanks to Eiraku-san for tracking down this issue.
Signed-off-by Magnus Damm <[email protected]>
Applied, thanks.