e1000e: correct MAC-PHY interconnect register offset for 82579
Subsystems (2)
PATCH 1/1 e1000e: correct MAC-PHY interconnect register offset for 82579
From: Bruce Allan <[email protected]>
The MAC-PHY interconnect register set on ICH/PCH parts is accessed through a peephole mechanism by writing an offset to a CSR register. The offset for the interconnect's half-duplex control register (which is used in a jumbo frame workaround for 82579) is incorrect.
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drivers/net/e1000e/hw.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/net/e1000e/hw.h +1 -1
@@ -313,7 +313,7 @@ enum e1e_registers {#define E1000_KMRNCTRLSTA_DIAG_NELPBK 0x1000/* Nearend Loopback mode */ #define E1000_KMRNCTRLSTA_K1_CONFIG 0x7#define E1000_KMRNCTRLSTA_K1_ENABLE 0x0002 -#define E1000_KMRNCTRLSTA_HD_CTRL 0x0002 +#define E1000_KMRNCTRLSTA_HD_CTRL 0x10/* Kumeran HD Control */ #define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10#define IFE_PHY_SPECIAL_CONTROL 0x11/* 100BaseTx PHY Special Control */
From: Jeff Kirsher <[email protected]>
Date: Tue, 03 Aug 2010 14:48:35 -0700
Quoted 10 lines
From: Bruce Allan <[email protected]>
The MAC-PHY interconnect register set on ICH/PCH parts is accessed through a peephole mechanism by writing an offset to a CSR register. The offset for the interconnect's half-duplex control register (which is used in a jumbo frame workaround for 82579) is incorrect.
Signed-off-by Bruce Allan <[email protected]>Tested-by Jeff Pieper <[email protected]>Signed-off-by Jeff Kirsher <[email protected]>
Applied.