ARMV7: Add support for Versatile Express CortexA9x4

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor. This system includes a motherboard(Versatile Express), daughterboard(Coretile), and an SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions.

The 2nd patch fixes a bug in the "set baudrate xxx" functionality.

Version 2 - Removed unneeded multi-core low_level setup code.

Matt Waddel (2):
ARMV7: Versatile Express Coretile CortexA9x4 support
ARMV7: Fixed baudrate setting in pl01x driver

 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   68 ++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 ++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   50 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  231 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   26 +++
 board/armltd/vexpress/u-boot.lds           |   50 ++++++
 boards.cfg                                 |    1 +
 drivers/serial/serial_pl01x.c              |    5 +-
 include/configs/ca9x4_ct_vxp.h             |  181 ++++++++++++++++++++++
 12 files changed, 721 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor. This system includes a motherboard(Versatile Express), daughterboard(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.

---
 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   68 ++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 ++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   50 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  231 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   26 +++
 board/armltd/vexpress/u-boot.lds           |   50 ++++++
 boards.cfg                                 |    1 +
 include/configs/ca9x4_ct_vxp.h             |  181 ++++++++++++++++++++++
 11 files changed, 717 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

index 4b91b0f..31ff42f 100644
@@ -800,6 +800,10 @@ Hugo Villeneuve <[email protected]>
 
 	SFFSDR		ARM926EJS
 
+Matt Waddel <[email protected]>
+
+	vexpress	ARM ARMV7 (quad core)
+
 Prafulla Wadaskar <[email protected]>
 
 	mv88f6281gtw_ge	ARM926EJS (Kirkwood SoC)

index 2133559..88b1843 100755
@@ -663,6 +663,7 @@ LIST_ARMV7="		\
 	omap4_sdp4430		\
 	s5p_goni		\
 	smdkc100		\
+	ca9x4_ct_vxp		\
 "
 
 #########################################################################

new file mode 100644
index 0000000..b9f4d61
@@ -0,0 +1,26 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# image loaded at 0x06000000
+# Linux-Kernel is expected to be at 0x60008000
+#
+TEXT_BASE = 0x06000000
+
+LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds
+

index b82f530..e19bafa 100644
@@ -254,6 +254,7 @@ imx27lite	arm	arm926ejs	imx27lite	logicpd		mx27
 magnesium	arm	arm926ejs	imx27lite	logicpd		mx27
 omap5912osk	arm	arm926ejs	-		ti		omap
 edminiv2	arm	arm926ejs	-		LaCie		orion5x
+ca9x4_ct_vxp	arm	armv7		vexpress	armltd
 omap3_overo	arm	armv7		overo		-		omap3
 omap3_pandora	arm	armv7		pandora		-		omap3
 omap3_zoom1	arm	armv7		zoom1		logicpd		omap3

1.7.0.4

Dear matt.waddel at linaro.org,

...

...

....

	while (1)
		;

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
They're usually so busy thinking about what  happens  next  that  the
only  time they ever find out what is happening now is when they come
to look back on it.                 - Terry Pratchett, _Wyrd Sisters_

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor. This system includes a motherboard(Versatile Express), daughterboard(Coretile), and an SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions.

The 2nd patch fixes a bug in the "set baudrate xxx" functionality.

---

Version 2 - Removed unneeded multi-core low_level setup code.

Version 3 -
Patch 1)
1) Fixups from Wolfgang's code review:
- Remove CamelCase variable definitions, keep lists sorted, tab indents only, remove trailing empty lines, remove unneeded configuration options, use I/O accessors, added while(1) loop in reset command
2) Simplified board_init declarations
3) Added CONFIG_INITRD_TAG declaration
4) Removed unneeded assembly directives from Makefile
Patch 2)
1) Replaced IO_WRITE and IO_READ calls in serial_pl01x.c with calls to readl() and writel(). Fixed commenting and CamelCase problems.

Matt Waddel (2):
ARMV7: Versatile Express Coretile CortexA9x4 support
ARMV7: Fixed baudrate setting in pl01x driver

 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   70 +++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 +++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   49 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  221 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   24 +++
 board/armltd/vexpress/u-boot.lds           |   50 +++++++
 boards.cfg                                 |    1 +
 drivers/serial/serial_pl01x.c              |   93 +++++-------
 include/configs/ca9x4_ct_vxp.h             |  172 +++++++++++++++++++++
 12 files changed, 735 insertions(+), 55 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor. This system includes a motherboard(Versatile Express), daughterboard(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.

---
 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   70 +++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 +++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   49 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  221 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   24 +++
 board/armltd/vexpress/u-boot.lds           |   50 +++++++
 boards.cfg                                 |    1 +
 include/configs/ca9x4_ct_vxp.h             |  172 +++++++++++++++++++++
 11 files changed, 697 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

index 4b91b0f..465cf83 100644
@@ -800,6 +800,10 @@ Hugo Villeneuve <[email protected]>
 
 	SFFSDR		ARM926EJS
 
+Matt Waddel <[email protected]>
+
+	ca9x4_ct_vxp	ARM ARMV7 (Quad Core)
+
 Prafulla Wadaskar <[email protected]>
 
 	mv88f6281gtw_ge	ARM926EJS (Kirkwood SoC)

index b34ae33..72d2050 100755
@@ -651,6 +651,7 @@ LIST_ARM11="			\
 #########################################################################
 LIST_ARMV7="		\
 	am3517_evm		\
+	ca9x4_ct_vxp		\
 	devkit8000		\
 	mx51evk			\
 	omap3_beagle		\

new file mode 100644
index 0000000..75ec3fe
@@ -0,0 +1,24 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# image loaded at 0x06000000
+# Linux-Kernel is expected to be at 0x60008000
+#
+TEXT_BASE = 0x06000000
+LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds

index 69c6897..8017c39 100644
@@ -254,6 +254,7 @@ imx27lite	arm	arm926ejs	imx27lite	logicpd		mx27
 magnesium	arm	arm926ejs	imx27lite	logicpd		mx27
 omap5912osk	arm	arm926ejs	-		ti		omap
 edminiv2	arm	arm926ejs	-		LaCie		orion5x
+ca9x4_ct_vxp	arm	armv7		vexpress	armltd
 omap3_overo	arm	armv7		overo		-		omap3
 omap3_pandora	arm	armv7		pandora		-		omap3
 omap3_zoom1	arm	armv7		zoom1		logicpd		omap3

1.7.1

Dear matt.waddel at linaro.org,

Applied to u-boot-arm, thanks.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Nobody goes to that restaurant anymore. It's too crowded.

From: Matt Waddel <[email protected]>

The pl01x serial driver was lacking the code to switch baudrates from the command line. Fixed by simply saving the new baudrate and calling serial_init() again. Also fixed CamelCase variables, I/O accessors and comment style.

---
 drivers/serial/serial_pl01x.c |   93 +++++++++++++++++------------------------
 1 files changed, 38 insertions(+), 55 deletions(-)

index c645cef..c0ae947 100644
@@ -29,25 +29,23 @@
 
 #include <common.h>
 #include <watchdog.h>
-
+#include <asm/io.h>
 #include "serial_pl01x.h"
 
-#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
-#define IO_READ(addr) (*(volatile unsigned int *)(addr))
-
 /*
  * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
  * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
  * Versatile PB has four UARTs.
  */
 #define CONSOLE_PORT CONFIG_CONS_INDEX
-#define baudRate CONFIG_BAUDRATE
 static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
 
 static void pl01x_putc (int portnum, char c);
 static int pl01x_getc (int portnum);
 static int pl01x_tstc (int portnum);
+unsigned int baudrate = CONFIG_BAUDRATE;
+DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_PL010_SERIAL
 

@@ -55,16 +53,11 @@ int serial_init (void)
 {
 	unsigned int divisor;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL010_CR);
 
-	/*
-	 ** Set baud rate
-	 **
-	 */
-	switch (baudRate) {
+	/* Set baud rate */
+	switch (baudrate) {
 	case 9600:
 		divisor = UART_PL010_BAUD_9600;
 		break;

@@ -89,20 +82,15 @@ int serial_init (void)
 		divisor = UART_PL010_BAUD_38400;
 	}
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
-		  ((divisor & 0xf00) >> 8));
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
+	writel(((divisor & 0xf00) >> 8), port[CONSOLE_PORT] + UART_PL010_LCRM);
+	writel((divisor & 0xff), port[CONSOLE_PORT] + UART_PL010_LCRL);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
-		  (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL010_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
+	/* Finally, enable the UART */
+	writel((UART_PL010_CR_UARTEN), port[CONSOLE_PORT] + UART_PL010_CR);
 
 	return 0;
 }

@@ -118,38 +106,31 @@ int serial_init (void)
 	unsigned int remainder;
 	unsigned int fraction;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL011_CR);
 
 	/*
-	 ** Set baud rate
-	 **
-	 ** IBRD = UART_CLK / (16 * BAUD_RATE)
-	 ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
+	 * Set baud rate
+	 *
+	 * IBRD = UART_CLK / (16 * BAUD_RATE)
+	 * FBRD = RND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
 	 */
-	temp = 16 * baudRate;
+	temp = 16 * baudrate;
 	divider = CONFIG_PL011_CLOCK / temp;
 	remainder = CONFIG_PL011_CLOCK % temp;
-	temp = (8 * remainder) / baudRate;
+	temp = (8 * remainder) / baudrate;
 	fraction = (temp >> 1) + (temp & 1);
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
+	writel(divider, port[CONSOLE_PORT] + UART_PL011_IBRD);
+	writel(fraction, port[CONSOLE_PORT] + UART_PL011_FBRD);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
-		  (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL011_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
-		  (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
-		   UART_PL011_CR_RXE));
+	/* Finally, enable the UART */
+	writel((UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE),
+		port[CONSOLE_PORT] + UART_PL011_CR);
 
 	return 0;
 }

@@ -183,16 +164,18 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
+	baudrate = gd->baudrate;
+	serial_init();
 }
 
 static void pl01x_putc (int portnum, char c)
 {
 	/* Wait until there is space in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
 		WATCHDOG_RESET();
 
 	/* Send the character */
-	IO_WRITE (port[portnum] + UART_PL01x_DR, c);
+	writel(c, port[portnum] + UART_PL01x_DR);
 }
 
 static int pl01x_getc (int portnum)

@@ -200,15 +183,15 @@ static int pl01x_getc (int portnum)
 	unsigned int data;
 
 	/* Wait until there is data in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
 		WATCHDOG_RESET();
 
-	data = IO_READ (port[portnum] + UART_PL01x_DR);
+	data = readl(port[portnum] + UART_PL01x_DR);
 
 	/* Check for an error flag */
 	if (data & 0xFFFFFF00) {
 		/* Clear the error */
-		IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
+		writel(0xFFFFFFFF, port[portnum] + UART_PL01x_ECR);
 		return -1;
 	}
 

@@ -218,6 +201,6 @@ static int pl01x_getc (int portnum)
 static int pl01x_tstc (int portnum)
 {
 	WATCHDOG_RESET();
-	return !(IO_READ (port[portnum] + UART_PL01x_FR) &
+	return !(readl(port[portnum] + UART_PL01x_FR) &
 		 UART_PL01x_FR_RXFE);
 }

1.7.1

Dear matt.waddel at linaro.org,

Applied to u-boot-arm, thanks.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The idea of male and female are universal constants.
	-- Kirk, "Metamorphosis", stardate 3219.8

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor. This system includes a motherboard(Versatile Express), daughterboard(Coretile), and an SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions.

The 2nd patch fixes a bug in the "set baudrate xxx" functionality.

---

Version 2 - Removed unneeded multi-core low_level setup code.

Version 3 -
Patch 1)
1) Fixups from Wolfgang's code review:
- Remove CamelCase variable definitions, keep lists sorted, tab indents only, remove trailing empty lines, remove unneeded configuration options, use I/O accessors, added while(1) loop in reset command
2) Simplified board_init declarations
3) Added CONFIG_INITRD_TAG declaration
4) Removed unneeded assembly directives from Makefile
Patch 2)
1) Replaced IO_WRITE and IO_READ calls in serial_pl01x.c with calls to readl() and writel(). Fixed commenting and CamelCase problems.

Version 4 -
1) Refactored to work with the "next" branch
2) Fixed a bug in the 2nd flash bank definition

Matt Waddel (2):
ARMV7: Versatile Express Coretile CortexA9x4 support
ARMV7: Fixed baudrate setting in pl01x driver

 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   70 +++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 ++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   49 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  224 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   23 +++
 board/armltd/vexpress/u-boot.lds           |   65 ++++++++
 boards.cfg                                 |    1 +
 drivers/serial/serial_pl01x.c              |   93 +++++-------
 include/configs/ca9x4_ct_vxp.h             |  178 ++++++++++++++++++++++
 12 files changed, 758 insertions(+), 55 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor. This system includes a motherboard(Versatile Express), daughterboard(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.

---
 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   70 +++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 ++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   49 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  224 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   23 +++
 board/armltd/vexpress/u-boot.lds           |   65 ++++++++
 boards.cfg                                 |    1 +
 include/configs/ca9x4_ct_vxp.h             |  178 ++++++++++++++++++++++
 11 files changed, 720 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

index 0c6ce2b..e325dde 100644
@@ -797,6 +797,10 @@ Hugo Villeneuve <[email protected]>
 
 	SFFSDR		ARM926EJS
 
+Matt Waddel <[email protected]>
+
+	ca9x4_ct_vxp	ARM ARMV7 (Quad Core)
+
 Prafulla Wadaskar <[email protected]>
 
 	mv88f6281gtw_ge	ARM926EJS (Kirkwood SoC)

index 761038e..91c67c1 100755
@@ -489,6 +489,7 @@ LIST_ARM11="			\
 #########################################################################
 LIST_ARMV7="		\
 	am3517_evm		\
+	ca9x4_ct_vxp		\
 	devkit8000		\
 	mx51evk			\
 	omap3_beagle		\

new file mode 100644
index 0000000..804709a
@@ -0,0 +1,23 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# Linux-Kernel is expected to be at 0x60008000
+#
+TEXT_BASE = 0x06000000
+LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds

index 05ddb8c..99aba9e 100644
@@ -255,6 +255,7 @@ imx27lite	arm	arm926ejs	imx27lite	logicpd		mx27
 magnesium	arm	arm926ejs	imx27lite	logicpd		mx27
 omap5912osk	arm	arm926ejs	-		ti		omap
 edminiv2	arm	arm926ejs	-		LaCie		orion5x
+ca9x4_ct_vxp	arm	armv7		vexpress	armltd
 omap3_overo	arm	armv7		overo		-		omap3
 omap3_pandora	arm	armv7		pandora		-		omap3
 omap3_zoom1	arm	armv7		zoom1		logicpd		omap3

1.7.1

From: Matt Waddel <[email protected]>

The pl01x serial driver was lacking the code to switch baudrates from the command line. Fixed by simply saving the new baudrate and calling serial_init() again. Also fixed CamelCase variables, I/O accessors and comment style.

---
 drivers/serial/serial_pl01x.c |   93 +++++++++++++++++------------------------
 1 files changed, 38 insertions(+), 55 deletions(-)

index c645cef..c0ae947 100644
@@ -29,25 +29,23 @@
 
 #include <common.h>
 #include <watchdog.h>
-
+#include <asm/io.h>
 #include "serial_pl01x.h"
 
-#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
-#define IO_READ(addr) (*(volatile unsigned int *)(addr))
-
 /*
  * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
  * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
  * Versatile PB has four UARTs.
  */
 #define CONSOLE_PORT CONFIG_CONS_INDEX
-#define baudRate CONFIG_BAUDRATE
 static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
 
 static void pl01x_putc (int portnum, char c);
 static int pl01x_getc (int portnum);
 static int pl01x_tstc (int portnum);
+unsigned int baudrate = CONFIG_BAUDRATE;
+DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_PL010_SERIAL
 

@@ -55,16 +53,11 @@ int serial_init (void)
 {
 	unsigned int divisor;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL010_CR);
 
-	/*
-	 ** Set baud rate
-	 **
-	 */
-	switch (baudRate) {
+	/* Set baud rate */
+	switch (baudrate) {
 	case 9600:
 		divisor = UART_PL010_BAUD_9600;
 		break;

@@ -89,20 +82,15 @@ int serial_init (void)
 		divisor = UART_PL010_BAUD_38400;
 	}
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
-		  ((divisor & 0xf00) >> 8));
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
+	writel(((divisor & 0xf00) >> 8), port[CONSOLE_PORT] + UART_PL010_LCRM);
+	writel((divisor & 0xff), port[CONSOLE_PORT] + UART_PL010_LCRL);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
-		  (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL010_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
+	/* Finally, enable the UART */
+	writel((UART_PL010_CR_UARTEN), port[CONSOLE_PORT] + UART_PL010_CR);
 
 	return 0;
 }

@@ -118,38 +106,31 @@ int serial_init (void)
 	unsigned int remainder;
 	unsigned int fraction;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL011_CR);
 
 	/*
-	 ** Set baud rate
-	 **
-	 ** IBRD = UART_CLK / (16 * BAUD_RATE)
-	 ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
+	 * Set baud rate
+	 *
+	 * IBRD = UART_CLK / (16 * BAUD_RATE)
+	 * FBRD = RND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
 	 */
-	temp = 16 * baudRate;
+	temp = 16 * baudrate;
 	divider = CONFIG_PL011_CLOCK / temp;
 	remainder = CONFIG_PL011_CLOCK % temp;
-	temp = (8 * remainder) / baudRate;
+	temp = (8 * remainder) / baudrate;
 	fraction = (temp >> 1) + (temp & 1);
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
+	writel(divider, port[CONSOLE_PORT] + UART_PL011_IBRD);
+	writel(fraction, port[CONSOLE_PORT] + UART_PL011_FBRD);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
-		  (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL011_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
-		  (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
-		   UART_PL011_CR_RXE));
+	/* Finally, enable the UART */
+	writel((UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE),
+		port[CONSOLE_PORT] + UART_PL011_CR);
 
 	return 0;
 }

@@ -183,16 +164,18 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
+	baudrate = gd->baudrate;
+	serial_init();
 }
 
 static void pl01x_putc (int portnum, char c)
 {
 	/* Wait until there is space in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
 		WATCHDOG_RESET();
 
 	/* Send the character */
-	IO_WRITE (port[portnum] + UART_PL01x_DR, c);
+	writel(c, port[portnum] + UART_PL01x_DR);
 }
 
 static int pl01x_getc (int portnum)

@@ -200,15 +183,15 @@ static int pl01x_getc (int portnum)
 	unsigned int data;
 
 	/* Wait until there is data in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
 		WATCHDOG_RESET();
 
-	data = IO_READ (port[portnum] + UART_PL01x_DR);
+	data = readl(port[portnum] + UART_PL01x_DR);
 
 	/* Check for an error flag */
 	if (data & 0xFFFFFF00) {
 		/* Clear the error */
-		IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
+		writel(0xFFFFFFFF, port[portnum] + UART_PL01x_ECR);
 		return -1;
 	}
 

@@ -218,6 +201,6 @@ static int pl01x_getc (int portnum)
 static int pl01x_tstc (int portnum)
 {
 	WATCHDOG_RESET();
-	return !(IO_READ (port[portnum] + UART_PL01x_FR) &
+	return !(readl(port[portnum] + UART_PL01x_FR) &
 		 UART_PL01x_FR_RXFE);
 }

1.7.1

From: Matt Waddel <[email protected]>

Matt Waddel (2):
Adds support for the ARM quad-core Cortex-A9 processor.
This system includes a motherboard(Versatile Express), daughterboard (Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.

The 2nd patch fixes a bug in the "set baudrate xxx" functionality and fixes some of the code problems like CamelCase and IO accessors.

---

Version 2 -
Removed unneeded multi-core low_level setup code.

Version 3 -
Patch 1)
1) Fixups from Wolfgang's code review:
- Remove CamelCase variable definitions, keep lists sorted, tab indents only, remove trailing empty lines, remove unneeded configuration options, use I/O accessors, added while(1) loop in reset command
2) Simplified board_init declarations
3) Added CONFIG_INITRD_TAG declaration
4) Removed unneeded assembly directives from Makefile
Patch 2)
1) Replaced IO_WRITE and IO_READ calls in serial_pl01x.c with calls to readl() and writel(). Fixed commenting and CamelCase problems.

Version 4 -
1) Refactored to work with the "next" branch
2) Fixed a bug in the 2nd flash bank definition

Version 5 -
1) Refactored to apply to the tip of git tree.
2) Improved the environment settings and added the run command option

 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   70 +++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 +++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   49 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  220 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   23 +++
 board/armltd/vexpress/u-boot.lds           |   65 ++++++++
 boards.cfg                                 |    1 +
 drivers/serial/serial_pl01x.c              |   93 +++++-------
 include/configs/ca9x4_ct_vxp.h             |  196 +++++++++++++++++++++++++
 12 files changed, 772 insertions(+), 55 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor.
This system includes a motherboard(Versatile Express), daughterboard (Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is:

     SOC -> CortexA9 quad core = ca9x4  
     daughterboard -> Coretile = ct
     motherboard -> Versatile Express = vxp

This gives ca9x4_ct_vxp.c as the board support file.

The 2nd patch fixes a bug in the "set baudrate xxx" functionality and fixes some of the code problems like CamelCase and IO accessors.

---

Version 2 -
Removed unneeded multi-core low_level setup code.

Version 3 -
Patch 1)
1) Fixups from Wolfgang's code review:
- Remove CamelCase variable definitions, keep lists sorted, tab indents only, remove trailing empty lines, remove unneeded configuration options, use I/O accessors, added while(1) loop in reset command
2) Simplified board_init declarations
3) Added CONFIG_INITRD_TAG declaration
4) Removed unneeded assembly directives from Makefile
Patch 2)
1) Replaced IO_WRITE and IO_READ calls in serial_pl01x.c with calls to readl() and writel(). Fixed commenting and CamelCase problems.

Version 4 -
1) Refactored to work with the "next" branch
2) Fixed a bug in the 2nd flash bank definition

Version 5 -
1) Refactored to apply to the tip of git tree.
2) Improved the environment settings and added the run command option

Matt Waddel (2):
ARMV7: Versatile Express Coretile CortexA9x4 support
ARMV7: Fixed baudrate setting in pl01x driver

 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   70 +++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 +++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   49 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  220 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   23 +++
 board/armltd/vexpress/u-boot.lds           |   65 ++++++++
 boards.cfg                                 |    1 +
 drivers/serial/serial_pl01x.c              |   93 +++++-------
 include/configs/ca9x4_ct_vxp.h             |  196 +++++++++++++++++++++++++
 12 files changed, 772 insertions(+), 55 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

Hi Wolfgang,

These 2 patches have been hanging around for a while and I've been pulling them along with the trunk changes. They've already been reviewed a couple of times, and there was one Tested-by a while back. I was wondering if there is anything else I need to do get them merged. I'm concerned they won't make it in before the merge window closes again.

Thanks,
Matt

From: Matt Waddel <[email protected]>

Adds support for the ARM quad-core Cortex-A9 processor

This system includes a motherboard(Versatile Express), daughterboard (Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.

---
 MAINTAINERS                                |    4 +
 MAKEALL                                    |    1 +
 arch/arm/include/asm/arch-armv7/sysctrl.h  |   70 +++++++++
 arch/arm/include/asm/arch-armv7/systimer.h |   50 +++++++
 arch/arm/include/asm/arch-armv7/wdt.h      |   55 +++++++
 board/armltd/vexpress/Makefile             |   49 ++++++
 board/armltd/vexpress/ca9x4_ct_vxp.c       |  220 ++++++++++++++++++++++++++++
 board/armltd/vexpress/config.mk            |   23 +++
 board/armltd/vexpress/u-boot.lds           |   65 ++++++++
 boards.cfg                                 |    1 +
 include/configs/ca9x4_ct_vxp.h             |  196 +++++++++++++++++++++++++
 11 files changed, 734 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
 create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
 create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
 create mode 100644 board/armltd/vexpress/Makefile
 create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
 create mode 100644 board/armltd/vexpress/config.mk
 create mode 100644 board/armltd/vexpress/u-boot.lds
 create mode 100644 include/configs/ca9x4_ct_vxp.h

index 5e3a3fa..71dcd5b 100644
@@ -802,6 +802,10 @@ Hugo Villeneuve <[email protected]>
 
 	SFFSDR		ARM926EJS
 
+Matt Waddel <[email protected]>
+
+	ca9x4_ct_vxp	ARM ARMV7 (Quad Core)
+
 Prafulla Wadaskar <[email protected]>
 
 	mv88f6281gtw_ge	ARM926EJS (Kirkwood SoC)

index 1b506d6..abceccd 100755
@@ -489,6 +489,7 @@ LIST_ARM11="			\
 #########################################################################
 LIST_ARMV7="		\
 	am3517_evm		\
+	ca9x4_ct_vxp		\
 	devkit8000		\
 	mx51evk			\
 	omap3_beagle		\

new file mode 100644
index 0000000..2d797d7
@@ -0,0 +1,23 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# Linux-Kernel is expected to be at 0x60008000
+#
+TEXT_BASE = 0x60800000
+LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds

index 9909685..c4a410d 100644
@@ -253,6 +253,7 @@ imx27lite	arm	arm926ejs	imx27lite	logicpd		mx27
 magnesium	arm	arm926ejs	imx27lite	logicpd		mx27
 omap5912osk	arm	arm926ejs	-		ti		omap
 edminiv2	arm	arm926ejs	-		LaCie		orion5x
+ca9x4_ct_vxp	arm	armv7		vexpress	armltd
 omap3_overo	arm	armv7		overo		-		omap3
 omap3_pandora	arm	armv7		pandora		-		omap3
 omap3_zoom1	arm	armv7		zoom1		logicpd		omap3

1.7.1

Dear matt.waddel at linaro.org,

Applied to u-boot-arm (dropping the V3 version).

But please: make sure to keep threading workign, and add a change log to the patches.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Veni, Vidi, VISA:
        I came, I saw, I did a little shopping.

From: Matt Waddel <[email protected]>

The pl01x serial driver was lacking the code to switch baudrates from the command line. Fixed by simply saving the new baudrate and calling serial_init() again. Also fixed CamelCase variables, I/O accessors and comment style.

---
 drivers/serial/serial_pl01x.c |   93 +++++++++++++++++------------------------
 1 files changed, 38 insertions(+), 55 deletions(-)

index c645cef..c0ae947 100644
@@ -29,25 +29,23 @@
 
 #include <common.h>
 #include <watchdog.h>
-
+#include <asm/io.h>
 #include "serial_pl01x.h"
 
-#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
-#define IO_READ(addr) (*(volatile unsigned int *)(addr))
-
 /*
  * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
  * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
  * Versatile PB has four UARTs.
  */
 #define CONSOLE_PORT CONFIG_CONS_INDEX
-#define baudRate CONFIG_BAUDRATE
 static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
 
 static void pl01x_putc (int portnum, char c);
 static int pl01x_getc (int portnum);
 static int pl01x_tstc (int portnum);
+unsigned int baudrate = CONFIG_BAUDRATE;
+DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_PL010_SERIAL
 

@@ -55,16 +53,11 @@ int serial_init (void)
 {
 	unsigned int divisor;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL010_CR);
 
-	/*
-	 ** Set baud rate
-	 **
-	 */
-	switch (baudRate) {
+	/* Set baud rate */
+	switch (baudrate) {
 	case 9600:
 		divisor = UART_PL010_BAUD_9600;
 		break;

@@ -89,20 +82,15 @@ int serial_init (void)
 		divisor = UART_PL010_BAUD_38400;
 	}
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
-		  ((divisor & 0xf00) >> 8));
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
+	writel(((divisor & 0xf00) >> 8), port[CONSOLE_PORT] + UART_PL010_LCRM);
+	writel((divisor & 0xff), port[CONSOLE_PORT] + UART_PL010_LCRL);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
-		  (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL010_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
+	/* Finally, enable the UART */
+	writel((UART_PL010_CR_UARTEN), port[CONSOLE_PORT] + UART_PL010_CR);
 
 	return 0;
 }

@@ -118,38 +106,31 @@ int serial_init (void)
 	unsigned int remainder;
 	unsigned int fraction;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL011_CR);
 
 	/*
-	 ** Set baud rate
-	 **
-	 ** IBRD = UART_CLK / (16 * BAUD_RATE)
-	 ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
+	 * Set baud rate
+	 *
+	 * IBRD = UART_CLK / (16 * BAUD_RATE)
+	 * FBRD = RND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
 	 */
-	temp = 16 * baudRate;
+	temp = 16 * baudrate;
 	divider = CONFIG_PL011_CLOCK / temp;
 	remainder = CONFIG_PL011_CLOCK % temp;
-	temp = (8 * remainder) / baudRate;
+	temp = (8 * remainder) / baudrate;
 	fraction = (temp >> 1) + (temp & 1);
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
+	writel(divider, port[CONSOLE_PORT] + UART_PL011_IBRD);
+	writel(fraction, port[CONSOLE_PORT] + UART_PL011_FBRD);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
-		  (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL011_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
-		  (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
-		   UART_PL011_CR_RXE));
+	/* Finally, enable the UART */
+	writel((UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE),
+		port[CONSOLE_PORT] + UART_PL011_CR);
 
 	return 0;
 }

@@ -183,16 +164,18 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
+	baudrate = gd->baudrate;
+	serial_init();
 }
 
 static void pl01x_putc (int portnum, char c)
 {
 	/* Wait until there is space in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
 		WATCHDOG_RESET();
 
 	/* Send the character */
-	IO_WRITE (port[portnum] + UART_PL01x_DR, c);
+	writel(c, port[portnum] + UART_PL01x_DR);
 }
 
 static int pl01x_getc (int portnum)

@@ -200,15 +183,15 @@ static int pl01x_getc (int portnum)
 	unsigned int data;
 
 	/* Wait until there is data in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
 		WATCHDOG_RESET();
 
-	data = IO_READ (port[portnum] + UART_PL01x_DR);
+	data = readl(port[portnum] + UART_PL01x_DR);
 
 	/* Check for an error flag */
 	if (data & 0xFFFFFF00) {
 		/* Clear the error */
-		IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
+		writel(0xFFFFFFFF, port[portnum] + UART_PL01x_ECR);
 		return -1;
 	}
 

@@ -218,6 +201,6 @@ static int pl01x_getc (int portnum)
 static int pl01x_tstc (int portnum)
 {
 	WATCHDOG_RESET();
-	return !(IO_READ (port[portnum] + UART_PL01x_FR) &
+	return !(readl(port[portnum] + UART_PL01x_FR) &
 		 UART_PL01x_FR_RXFE);
 }

1.7.1

Dear matt.waddel at linaro.org,

Applied to u-boot-arm (dropping the V3 patch). Thanks.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Women are more easily and more deeply terrified ...  generating  more
sheer horror than the male of the species.
	-- Spock, "Wolf in the Fold", stardate 3615.4

From: Matt Waddel <[email protected]>

The pl01x serial driver was lacking the code to switch baudrates from the command line. Fixed by simply saving the new baudrate and calling serial_init() again.

---
 drivers/serial/serial_pl01x.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

index c645cef..5cd5b9c 100644
@@ -41,13 +41,14 @@
  * Versatile PB has four UARTs.
  */
 #define CONSOLE_PORT CONFIG_CONS_INDEX
-#define baudRate CONFIG_BAUDRATE
 static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
 
 static void pl01x_putc (int portnum, char c);
 static int pl01x_getc (int portnum);
 static int pl01x_tstc (int portnum);
+unsigned int baudRate = CONFIG_BAUDRATE;
+DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_PL010_SERIAL
 

@@ -183,6 +184,8 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
+	baudRate = gd->baudrate;
+	serial_init();
 }
 
 static void pl01x_putc (int portnum, char c)

1.7.0.4

Dear matt.waddel at linaro.org,

...

We don't allow CamelCase identifiers.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
This was an  amazing  creation  using  small  squares  of  compressed
vegetable  matter on which letters were made by means of small carbon
particles from a stylus, giving an effect similar to the  traditional
word-processor  screen. It seemed amazingly portable and I never once
saw him have to change the batteries.
        - Terry Pratchett & Stephen Briggs, _The Discworld Companion_

Matt

Worked fine when tested at ARM

Regards

Peter

I have not seen any NAK's for these two patches so can it go in?

Wolfgang, I have noticed that recent activity in the arm maintainer tree has been done by you. Are you standing in for Tom?

Thanks,
John

Dear John Rigby,

These patches were sent after the merge window closed, so they are candidates for the next release at best.

And I just sent some review comments; they need respinning.

As good as I can, indeed.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Many Myths are based on truth
	-- Spock, "The Way to Eden",  stardate 5832.3