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omap fixes for upcoming 2.6.36-rc1

PATCH New Tony Lindgren 4 participants 17 messages Aug 13, 2010 – Aug 20, 2010

Subsystems (5)
Arm (32-bit) Arm sub-architectures OMAP2+ support OMAP power management support +1 more subsystems
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Tony Lindgren

author maintainer
#0 lore raw

cover omap fixes for upcoming 2.6.36-rc1

Hi all,

Here are some omap fixes for review.

Regards,

Tony

---

Kevin Hilman (1):
OMAP3: PM: ensure IO wakeups are properly disabled

Nishanth Menon (1):
omap3: id: fix 3630 rev detection

Tony Lindgren (3):
omap: Fix sev instruction usage for multi-omap
omap: Use CONFIG_SMP for test_for_ipi and test_for_ltirq
omap: Fix omap_4430sdp_defconfig for make oldconfig

stanley.miao (1):
OMAP3: Fix a cpu type check problem

 arch/arm/configs/omap_4430sdp_defconfig        |    3 +++
 arch/arm/mach-omap2/Makefile                   |    1 +
 arch/arm/mach-omap2/clock3xxx_data.c           |   14 +++++++-------
 arch/arm/mach-omap2/id.c                       |    2 +-
 arch/arm/mach-omap2/include/mach/entry-macro.S |    6 ++++--
 arch/arm/mach-omap2/omap-smp.c                 |    3 +--
 arch/arm/mach-omap2/pm34xx.c                   |    4 +++-
 arch/arm/plat-omap/include/plat/smp.h          |    7 -------
 8 files changed, 20 insertions(+), 20 deletions(-)
Signature · 1 line
Signature
author maintainer
#1 lore raw

PATCH 1/6 omap3: id: fix 3630 rev detection

From: Nishanth Menon <[email protected]>

Wrong placement of break causes all revisions of 3630 to be detected as 3630 es1.2, we need to break main loop if we have an identified chip, default falls through as in the rest of the switches in this function.

Cc Paul Walmsley <[email protected]>
Cc Sanjeev Premi <[email protected]>
Cc Kevin Hilman <[email protected]>
Cc Manjunath K <[email protected]>
Cc Anand Gadiyar <[email protected]>
Cc Felipe Balbi <[email protected]>
Signed-off-by Nishanth Menon <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/mach-omap2/id.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/id.c +1 -1
index e8256a2..9a879f9 100644
@@ -284,8 +284,8 @@ static void __init omap3_check_revision(void)
 		default:
 			omap_revision =  OMAP3630_REV_ES1_2;
 			omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
-			break;
 		}
+		break;
 	default:
 		/* Unknown default to latest silicon rev as default*/
 		omap_revision =  OMAP3630_REV_ES1_2;
author maintainer
#2 lore raw

PATCH 2/6 OMAP3: Fix a cpu type check problem

In reply to Tony Lindgren

From: stanley.miao <[email protected]>

cpu_is_omap3517() and cpu_is_omap3505() are the subgroups of cpu_is_omap34xx(), so we should check cpu_is_omap3517() and cpu_is_omap3505() first, then check cpu_is_omap34xx().

Otherwise, All AM35XX (Sitara) clocks do not get registered and device drivers (ti_hecc, etc...) that depend on those clocks are failing to get the clock and end up with non working device.

Signed-off-by Stanley.Miao <[email protected]>
Tested-by Igor Grinberg <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/mach-omap2/clock3xxx_data.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)
arch/arm/mach-omap2/clock3xxx_data.c +7 -7
index 138646d..dfdce2d 100644
@@ -3417,7 +3417,13 @@ int __init omap3xxx_clk_init(void)
 	struct omap_clk *c;
 	u32 cpu_clkflg = CK_3XXX;
 
-	if (cpu_is_omap34xx()) {
+	if (cpu_is_omap3517()) {
+		cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
+		cpu_clkflg |= CK_3517;
+	} else if (cpu_is_omap3505()) {
+		cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
+		cpu_clkflg |= CK_3505;
+	} else if (cpu_is_omap34xx()) {
 		cpu_mask = RATE_IN_3XXX;
 		cpu_clkflg |= CK_343X;
 

@@ -3432,12 +3438,6 @@ int __init omap3xxx_clk_init(void)
 			cpu_mask |= RATE_IN_3430ES2PLUS;
 			cpu_clkflg |= CK_3430ES2;
 		}
-	} else if (cpu_is_omap3517()) {
-		cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
-		cpu_clkflg |= CK_3517;
-	} else if (cpu_is_omap3505()) {
-		cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
-		cpu_clkflg |= CK_3505;
 	}
 
 	if (omap3_has_192mhz_clk())
author maintainer
#3 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

In reply to Tony Lindgren

From: Kevin Hilman <[email protected]>

Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain.

During idle, if the PER powerdomain transitions and CORE does not (as is the case with the lower C-states when using CPUidle) the IO pad wakeups are not being disabled in the idle path after they are enabled.

This patch ensures that the check for disabling IO wakeups also checks for PER transitions, matching the check done to enable IO wakeups.

Found when debugging PM/CPUidle related problems reported by Ameya Palande <[email protected]>. Problems were triggered particularily on boards with UART2 consoles (n900, Overo) since UART2 is in the PER powerdomain.

Tested on l-o master (omap3_defonfig + CONFIG_CPU_IDLE=y) as well as with current PM branch. Boards tested: n900, Overo, omap3evm.

Cc Paul Walmsley <[email protected]>
Cc Ameya Palande <[email protected]>
Tested-by Jarkko Nikula <[email protected]>
Signed-off-by Kevin Hilman <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/mach-omap2/pm34xx.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/pm34xx.c +3 -1
index fb4994a..7b03426 100644
@@ -480,7 +480,9 @@ void omap_sram_idle(void)
 	}
 
 	/* Disable IO-PAD and IO-CHAIN wakeup */
-	if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) {
+	if (omap3_has_io_wakeup() &&
+	    (per_next_state < PWRDM_POWER_ON ||
+	     core_next_state < PWRDM_POWER_ON)) {
 		prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
 		omap3_disable_io_chain();
 	}
#4 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

Hello.

Quoted 6 lines · Tony Lindgren

From: Kevin Hilman <[email protected]>

Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain.

During idle, if the PER powerdomain transitions and CORE does not (as

Does not what?

Quoted 3 lines

is the case with the lower C-states when using CPUidle) the IO pad wakeups are not being disabled in the idle path after they are enabled.

WBR, Sergei

author maintainer
#5 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

Quoted 4 lines · Sergei Shtylyov

Hello.

Tony Lindgren wrote:

Quoted 8 lines
Quoted 6 lines

From: Kevin Hilman <[email protected]>

Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain.

During idle, if the PER powerdomain transitions and CORE does not (as

Does not what?

How about ".. and CORE does not transition"?

Kevin, care to clarify that?

Tony

#6 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

Hello.

Quoted 9 lines · Tony Lindgren
Quoted 7 lines
Quoted 5 lines

From: Kevin Hilman <[email protected]>
Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain.

During idle, if the PER powerdomain transitions and CORE does not (as

Does not what?

How about ".. and CORE does not transition"?

Transition to what then? Sentense till won't parse right...

Quoted 1 line

Kevin, care to clarify that?

Yeah, looks like a considerable partt of that sentense got omitted...

Quoted 1 line

Tony

WBR, Sergei

#7 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

Quoted 12 lines · Sergei Shtylyov

Hello.

Quoted 7 lines · Tony Lindgren
Quoted 7 lines
Quoted 5 lines

From: Kevin Hilman <[email protected]>
Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain.

During idle, if the PER powerdomain transitions and CORE does not (as

Does not what?

Quoted 8 lines
Quoted 1 line

How about ".. and CORE does not transition"?

Transition to what then? Sentense till won't parse right...

Quoted 1 line

Kevin, care to clarify that?

Yeah, looks like a considerable partt of that sentense got omitted...

No. Nothing was omitted.

It's like saying "Tony drinks Fernet and Kevin does not." Adding an additional "drinks Fernet" at the end is redundant.

Kevin

#8 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

Hello.

Quoted 11 lines · Kevin Hilman
Quoted 10 lines
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines

From: Kevin Hilman <[email protected]>
Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain. During idle, if the PER powerdomain transitions and CORE does not (as

Does not what?

How about ".. and CORE does not transition"?

Transition to what then? Sentense till won't parse right...

Quoted 7 lines
Quoted 2 lines
Quoted 1 line

Kevin, care to clarify that?

Yeah, looks like a considerable partt of that sentense got omitted...

No. Nothing was omitted.

It's like saying "Tony drinks Fernet and Kevin does not." Adding an additional "drinks Fernet" at the end is redundant.

Sorry, the sentence still doesn't parse for me. You don't say "Fernet"
there BTW, so it's not clear where the PER powerdomain transitions to. What goes after the closing parenthesis doesn't clear things up either, it just describes what happens if...

Quoted 1 line

Kevin

WBR, Sergei

author maintainer
#9 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

Quoted 20 lines · Sergei Shtylyov

Hello.

Quoted 15 lines · Kevin Hilman
Quoted 5 lines
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines

From: Kevin Hilman <[email protected]>
Commit 5a5f561 (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain. During idle, if the PER powerdomain transitions and CORE does not (as

Quoted 8 lines
Quoted 3 lines
Quoted 1 line

Does not what?

How about ".. and CORE does not transition"?

Transition to what then? Sentense till won't parse right...

Quoted 1 line

Kevin, care to clarify that?

Yeah, looks like a considerable partt of that sentense got omitted...

No. Nothing was omitted.

Quoted 7 lines
Quoted 2 lines

It's like saying "Tony drinks Fernet and Kevin does not." Adding an additional "drinks Fernet" at the end is redundant.

Sorry, the sentence still doesn't parse for me. You don't say
"Fernet" there BTW, so it's not clear where the PER powerdomain transitions to. What goes after the closing parenthesis doesn't clear things up either, it just describes what happens if...

I'll update it with the following to preserve the Fernet style, and to describe the transition:

During idle, if the PER powerdomain transitions into a lower state and CORE does not, the IO pad wakeups are not being disabled in the idle path after they are enabled. This can happen with the lower C-states when using CPUidle for example.

Updated patch attached.

Please reply ASAP if this is not OK, I'd like to get a pull request for these fixes sent to Linus over the weekend.

Regards,

Tony
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#10 lore raw

PATCH 3/6 OMAP3: PM: ensure IO wakeups are properly disabled

Tony Lindgren <[email protected]> writes:

[...]

Quoted 2 lines

I'll update it with the following to preserve the Fernet style, and to describe the transition:

ok with me, thanks tony.

Kevin

author maintainer
#11 lore raw

PATCH 4/6 omap: Fix sev instruction usage for multi-omap

In reply to Tony Lindgren

Otherwise we get the following error with omap3_defconfig and CONFIG_SMP:

Error: selected processor does not support `sev'

Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/mach-omap2/Makefile          |    1 +
 arch/arm/mach-omap2/omap-smp.c        |    3 +--
 arch/arm/plat-omap/include/plat/smp.h |    7 -------
 3 files changed, 2 insertions(+), 9 deletions(-)
arch/arm/mach-omap2/Makefile +1 -0
index 63b2d88..88d3a1e 100644
@@ -25,6 +25,7 @@ obj-$(CONFIG_LOCAL_TIMERS)		+= timer-mpu.o
 obj-$(CONFIG_HOTPLUG_CPU)		+= omap-hotplug.o
 obj-$(CONFIG_ARCH_OMAP4)		+= omap44xx-smc.o omap4-common.o
 
+AFLAGS_omap-headsmp.o			:=-Wa,-march=armv7-a
 AFLAGS_omap44xx-smc.o			:=-Wa,-march=armv7-a
 
 # Functions loaded to SRAM
arch/arm/mach-omap2/omap-smp.c +1 -2
index af3c20c..9e9f70e 100644
@@ -102,8 +102,7 @@ static void __init wakeup_secondary(void)
 	 * Send a 'sev' to wake the secondary core from WFE.
 	 * Drain the outstanding writes to memory
 	 */
-	dsb();
-	set_event();
+	dsb_sev();
 	mb();
 }
arch/arm/plat-omap/include/plat/smp.h +0 -7
index 6a3ff65..5177a9c 100644
@@ -19,13 +19,6 @@
 
 #include <asm/hardware/gic.h>
 
-/*
- * set_event() is used to wake up secondary core from wfe using sev. ROM
- * code puts the second core into wfe(standby).
- *
- */
-#define set_event()	__asm__ __volatile__ ("sev" : : : "memory")
-
 /* Needed for secondary core boot */
 extern void omap_secondary_startup(void);
 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
#12 lore raw

PATCH 4/6 omap: Fix sev instruction usage for multi-omap

Quoted 8 lines

-----Original Message-----
From: linux-omap-owner at vger.kernel.org [mailto:linux-omap- owner at vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Friday, August 13, 2010 1:32 PM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org
Subject: [PATCH 4/6] omap: Fix sev instruction usage for multi-omap

Quoted 5 lines

Otherwise we get the following error with omap3_defconfig and CONFIG_SMP:

Error: selected processor does not support `sev'

Signed-off-by Tony Lindgren <[email protected]>

Looks good to me.

Acked-by Santosh Shilimkar <[email protected]>
Quoted 57 lines
---
 arch/arm/mach-omap2/Makefile          |    1 +
 arch/arm/mach-omap2/omap-smp.c        |    3 +--
 arch/arm/plat-omap/include/plat/smp.h |    7 -------
 3 files changed, 2 insertions(+), 9 deletions(-)
arch/arm/mach-omap2/Makefile +1 -0
index 63b2d88..88d3a1e 100644
@@ -25,6 +25,7 @@ obj-$(CONFIG_LOCAL_TIMERS)		+= timer-mpu.o
 obj-$(CONFIG_HOTPLUG_CPU)		+= omap-hotplug.o
 obj-$(CONFIG_ARCH_OMAP4)		+= omap44xx-smc.o omap4-common.o
 
+AFLAGS_omap-headsmp.o			:=-Wa,-march=armv7-a
 AFLAGS_omap44xx-smc.o			:=-Wa,-march=armv7-a
 
 # Functions loaded to SRAM
arch/arm/mach-omap2/omap- renamed from arch/arm/mach-omap2/omap-smp.c +0 -0

smp.c
index af3c20c..9e9f70e 100644

arch/arm/mach-omap2/omap-smp.c +1 -2
@@ -102,8 +102,7 @@ static void __init wakeup_secondary(void)
 	 * Send a 'sev' to wake the secondary core from WFE.
 	 * Drain the outstanding writes to memory
 	 */
-	dsb();
-	set_event();
+	dsb_sev();
 	mb();
 }
arch/arm/plat- renamed from arch/arm/plat-omap/include/plat/smp.h +0 -0

omap/include/plat/smp.h
index 6a3ff65..5177a9c 100644

arch/arm/plat-omap/include/plat/smp.h +0 -8
@@ -19,13 +19,6 @@
 
 #include <asm/hardware/gic.h>
 
-/*
- * set_event() is used to wake up secondary core from wfe using sev. ROM
- * code puts the second core into wfe(standby).
- *
- */
-#define set_event()	__asm__ __volatile__ ("sev" : : : "memory")
-
 /* Needed for secondary core boot */
 extern void omap_secondary_startup(void);
 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
 
--

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author maintainer
#13 lore raw

PATCH 5/6 omap: Use CONFIG_SMP for test_for_ipi and test_for_ltirq

In reply to Tony Lindgren

Otherwise we get the following error when enabling CONFIG_SMP for omap3_defconfig:

arch/arm/kernel/entry-armv.S: Assembler messages:
arch/arm/kernel/entry-armv.S:48: Error: bad instruction test_for_ipi r0,r6,r5,lr' arch/arm/kernel/entry-armv.S:48: Error: bad instruction test_for_ltirq r0,r6,r5,lr' arch/arm/kernel/entry-armv.S:48: Error: bad instruction test_for_ipi r0,r6,r5,lr' arch/arm/kernel/entry-armv.S:48: Error: bad instruction test_for_ltirq r0,r6,r5,lr'

Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/mach-omap2/include/mach/entry-macro.S |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/include/mach/entry-macro.S +4 -2
index 50fd749..06e64e1 100644
@@ -177,7 +177,10 @@ omap_irq_base:	.word	0
 		cmpne   \irqnr, \tmp
 		cmpcs   \irqnr, \irqnr
 		.endm
+#endif
+#endif	/* MULTI_OMAP2 */
 
+#ifdef CONFIG_SMP
 		/* We assume that irqstat (the raw value of the IRQ acknowledge
 		 * register) is preserved from the macro above.
 		 * If there is an IPI, we immediately signal end of interrupt

@@ -205,8 +208,7 @@ omap_irq_base:	.word	0
 		streq	\irqstat, [\base, #GIC_CPU_EOI]
 		cmp	\tmp, #0
 		.endm
-#endif
-#endif	/* MULTI_OMAP2 */
+#endif	/* CONFIG_SMP */
 
 		.macro	irq_prio_table
 		.endm
#14 lore raw

PATCH 5/6 omap: Use CONFIG_SMP for test_for_ipi and test_for_ltirq

Quoted 22 lines

-----Original Message-----
From: linux-omap-owner at vger.kernel.org [mailto:linux-omap- owner at vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Friday, August 13, 2010 1:32 PM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org
Subject: [PATCH 5/6] omap: Use CONFIG_SMP for test_for_ipi and test_for_ltirq

Otherwise we get the following error when enabling CONFIG_SMP for omap3_defconfig:

arch/arm/kernel/entry-armv.S: Assembler messages:
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ipi r0,r6,r5,lr'
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ltirq r0,r6,r5,lr'
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ipi r0,r6,r5,lr'
arch/arm/kernel/entry-armv.S:48: Error: bad instruction `test_for_ltirq r0,r6,r5,lr'

Quoted 2 lines
Signed-off-by Tony Lindgren <[email protected]>

---

This is same with omap_4430sdp_defconfig.
With this patch build is working patch now.

Acked-by Santosh Shilimkar <[email protected]>
Quoted 35 lines
 arch/arm/mach-omap2/include/mach/entry-macro.S |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/include/mach/entry-macro.S +3 -0
index 50fd749..06e64e1 100644
@@ -177,7 +177,10 @@ omap_irq_base:	.word	0
 		cmpne   \irqnr, \tmp
 		cmpcs   \irqnr, \irqnr
 		.endm
+#endif
+#endif	/* MULTI_OMAP2 */
 
+#ifdef CONFIG_SMP
 		/* We assume that irqstat (the raw value of the IRQ

acknowledge

arch/arm/mach-omap2/include/mach/entry-macro.S +1 -3
 		 * register) is preserved from the macro above.
 		 * If there is an IPI, we immediately signal end of interrupt

@@ -205,8 +208,7 @@ omap_irq_base:	.word	0
 		streq	\irqstat, [\base, #GIC_CPU_EOI]
 		cmp	\tmp, #0
 		.endm
-#endif
-#endif	/* MULTI_OMAP2 */
+#endif	/* CONFIG_SMP */
 
 		.macro	irq_prio_table
 		.endm
 
--

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author maintainer
#15 lore raw

PATCH 6/6 omap: Fix omap_4430sdp_defconfig for make oldconfig

In reply to Tony Lindgren

Commit ffb63e3402849e1b70119ee0c9a81dc9da4dfa97 changed Kconfig to select support for omap2, 3 and 4 by default.

However, CONFIG_SMP won't currently work properly on uniprocessor ARMs, or if support for earlier ARM cores is selected in.

Fix this by updating omap_4430sdp_defconfig to not select omap2 or 3 at this point.

Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/configs/omap_4430sdp_defconfig |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)
arch/arm/configs/omap_4430sdp_defconfig +3 -0
index 63e0c2d..14c1e18 100644
@@ -13,6 +13,9 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_OMAP=y
 CONFIG_ARCH_OMAP4=y
+# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
+# CONFIG_ARCH_OMAP2 is not set
+# CONFIG_ARCH_OMAP3 is not set
 # CONFIG_OMAP_MUX is not set
 CONFIG_OMAP_32K_TIMER=y
 CONFIG_OMAP_DM_TIMER=y
#16 lore raw

PATCH 6/6 omap: Fix omap_4430sdp_defconfig for make oldconfig

Quoted 11 lines

-----Original Message-----
From: linux-omap-owner at vger.kernel.org [mailto:linux-omap- owner at vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Friday, August 13, 2010 1:32 PM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org
Subject: [PATCH 6/6] omap: Fix omap_4430sdp_defconfig for make oldconfig

Commit ffb63e3402849e1b70119ee0c9a81dc9da4dfa97 changed Kconfig to select support for omap2, 3 and 4 by default.

Quoted 8 lines

However, CONFIG_SMP won't currently work properly on uniprocessor ARMs, or if support for earlier ARM cores is selected in.

Fix this by updating omap_4430sdp_defconfig to not select omap2 or 3 at this point.

Signed-off-by Tony Lindgren <[email protected]>

With this patch and previous one in the series, OMAP4 SDP build and boot are working fine. Thanks

Acked-by Santosh Shilimkar <[email protected]>
Quoted 24 lines
---
 arch/arm/configs/omap_4430sdp_defconfig |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)
arch/arm/configs/omap_4430sdp_defconfig +3 -1
index 63e0c2d..14c1e18 100644
@@ -13,6 +13,9 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_OMAP=y
 CONFIG_ARCH_OMAP4=y
+# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
+# CONFIG_ARCH_OMAP2 is not set
+# CONFIG_ARCH_OMAP3 is not set
 # CONFIG_OMAP_MUX is not set
 CONFIG_OMAP_32K_TIMER=y
 CONFIG_OMAP_DM_TIMER=y
 
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