Topcliff: Update PCH_GPIO driver to 2.6.35
PATCH v3 1/1 Topcliff: Update PCH_GPIO driver to 2.6.35
Hi Mike and Mark,
Thank you for your comments.
I have modified for your indications.
Please check this.
Thanks, Ohtake(OKISemi)
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GPIO driver of Topcliff PCH
Topcliff PCH is the platform controller hub that is going to be used in Intel's upcoming general embedded platform. All IO peripherals in Topcliff PCH are actually devices sitting on AMBA bus. Topcliff PCH has GPIO I/F. Using this I/F, it is able to access system devices connected to GPIO.
--- drivers/gpio/Kconfig | 8 ++ drivers/gpio/Makefile | 1 + drivers/gpio/pch_gpio.c | 304 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 313 insertions(+), 0 deletions(-) create mode 100644 drivers/gpio/pch_gpio.c
drivers/gpio/Kconfig +8 -0
@@ -298,6 +298,14 @@ config GPIO_RDC321X Support for the RDC R321x SoC GPIOs over southbridge PCI configuration space. +config GPIO_PCH + tristate "PCH GPIO of Intel Topcliff" + depends on PCI + help + This driver is for PCH(Platform controller Hub) GPIO of Intel Topcliff + which is an IOH(Input/Output Hub) for x86 embedded processor. + This driver can access PCH GPIO device. + comment "SPI GPIO expanders:" config GPIO_MAX7301
drivers/gpio/Makefile +1 -0
@@ -35,3 +35,4 @@ obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o obj-$(CONFIG_GPIO_SCH) += sch_gpio.o obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o +obj-$(CONFIG_GPIO_PCH) += pch_gpio.o
drivers/gpio/pch_gpio.c new file +304 -0
304 lines not on this page · raw message
Signature · 1 line
1.6.0.6
Quoted 4 lines · Masayuki Ohtak
drivers/gpio/pch_gpio.c new file +4
-0+static int pch_gpio_direction_output (struct gpio_chip *gpio,unsigned nr, +int val) +{ + struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
drivers/gpio/pch_gpio.c line 104
Quoted 10 lines
drivers/gpio/pch_gpio.c new file +10
-0+u32 pm; + +mutex_lock (&chip->lock); + pm =ioread32 (&chip->reg->pm) &PCH_GPIO_ALL_PINS ; + pm |= (1 << nr); +iowrite32 (pm, &chip->reg->pm); +mutex_unlock (&chip->lock); + +return 0 ; +}
This doesn't do anything with val - it should be doing the equivalent of a gpio_set() to set the initial value of the GPIO when switching it to output mode.
Otherwise this looks good.