Add support for async page fault to qemu
PATCH v3 1/1 Add support for async page fault to qemu
Add save/restore of MSR for migration and cpuid bit.
Signed-off-by Gleb Natapov <[email protected]>
--
v1->v2
- use vmstate subsection to migrate new msr.
v2->v3
- rebase onto uq/master
- protect use of MSR_KVM_ASYNC_PF_EN with ifdef KVM_CAP_ASYNC_PF
target-i386/cpu.h +1 -0
@@ -680,6 +680,7 @@ typedef struct CPUX86State {#endif uint64_t system_time_msr;uint64_t wall_clock_msr; +uint64_t async_pf_en_msr;uint64_t tsc;
target-i386/cpuid.c +1 -1
@@ -73,7 +73,7 @@ static const char *ext3_feature_name[] = { };static const char *kvm_feature_name[] = { -"kvmclock" ,"kvm_nopiodelay" ,"kvm_mmu" ,NULL ,NULL ,NULL ,NULL ,NULL , +"kvmclock" ,"kvm_nopiodelay" ,"kvm_mmu" ,NULL ,"kvm_asyncpf" ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,
target-i386/kvm.c +14 -0
@@ -162,6 +162,9 @@ struct kvm_para_features { #ifdef KVM_CAP_PV_MMU { KVM_CAP_PV_MMU, KVM_FEATURE_MMU_OP }, #endif +#ifdef KVM_CAP_ASYNC_PF + { KVM_CAP_ASYNC_PF, KVM_FEATURE_ASYNC_PF }, +#endif { -1, -1 } };
@@ -838,6 +841,9 @@ static int kvm_put_msrs(CPUState *env, int level)kvm_msr_entry_set (&msrs[n++],MSR_KVM_SYSTEM_TIME , env->system_time_msr);kvm_msr_entry_set (&msrs[n++],MSR_KVM_WALL_CLOCK , env->wall_clock_msr); +#ifdef KVM_CAP_ASYNC_PF +kvm_msr_entry_set (&msrs[n++],MSR_KVM_ASYNC_PF_EN , env->async_pf_en_msr); +#endif }#ifdef KVM_CAP_MCE if (env->mcg_cap) {
@@ -1064,6 +1070,9 @@ static int kvm_get_msrs(CPUState *env)#endif msrs[n++].index =MSR_KVM_SYSTEM_TIME ; msrs[n++].index =MSR_KVM_WALL_CLOCK ; +#ifdef KVM_CAP_ASYNC_PF + msrs[n++].index =MSR_KVM_ASYNC_PF_EN ; +#endif #ifdef KVM_CAP_MCE if (env->mcg_cap) {
@@ -1135,6 +1144,11 @@ static int kvm_get_msrs(CPUState *env) }#endif break ; +#ifdef KVM_CAP_ASYNC_PF +case MSR_KVM_ASYNC_PF_EN : + env->async_pf_en_msr = msrs[i].data; +break ; +#endif } }
target-i386/machine.c +26 -0
@@ -373,6 +373,24 @@ static int cpu_post_load(void *opaque, int version_id)return 0 ; } +static bool async_pf_msr_needed (void *opaque) +{ +CPUState *cpu = opaque; + +return cpu->async_pf_en_msr !=0 ; +} + +static const VMStateDescription vmstate_async_pf_msr = { + .name ="cpu/async_pf_msr" , + .version_id =1 , + .minimum_version_id =1 , + .minimum_version_id_old =1 , + .fields = (VMStateField []) { +VMSTATE_UINT64 (async_pf_en_msr, CPUState), +VMSTATE_END_OF_LIST () + } +}; +static const VMStateDescription vmstate_cpu = { .name ="cpu" , .version_id =CPU_SAVE_VERSION ,
@@ -475,6 +493,14 @@ static const VMStateDescription vmstate_cpu = { VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),VMSTATE_END_OF_LIST ()/* The above list is not sorted /wrt version numbers, watch out! */ + }, + .subsections = (VMStateSubsection []) { + { + .vmsd = &vmstate_async_pf_msr, + .needed = async_pf_msr_needed, + } , { +/* empty */ + } } };
--
Gleb.
Marcelo Tosatti
AppliedQuoted 9 lines · Gleb Natapov
Add save/restore of MSR for migration and cpuid bit.
Signed-off-by Gleb Natapov <[email protected]>--
v1->v2
- use vmstate subsection to migrate new msr.
v2->v3
- rebase onto uq/master
- protect use ofMSR_KVM_ASYNC_PF_ENwith ifdefKVM_CAP_ASYNC_PF
Applied, thanks.