MIPS: Separate two consecutive loads in memset.S

partial_fixup is used in noreorder block.

Separating two consecutive loads can save one cycle on processors with GPR intrelock and can fix load-use on processors that need a load delay slot.

Also do so for fwd_fixup.

---
 arch/mips/lib/memset.S |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

index 77dc3b2..606c8a9 100644
@@ -161,16 +161,16 @@ FEXPORT(__bzero)
 
 .Lfwd_fixup:
 	PTR_L		t0, TI_TASK($28)
-	LONG_L		t0, THREAD_BUADDR(t0)
 	andi		a2, 0x3f
+	LONG_L		t0, THREAD_BUADDR(t0)
 	LONG_ADDU	a2, t1
 	jr		ra
 	 LONG_SUBU	a2, t0
 
 .Lpartial_fixup:
 	PTR_L		t0, TI_TASK($28)
-	LONG_L		t0, THREAD_BUADDR(t0)
 	andi		a2, LONGMASK
+	LONG_L		t0, THREAD_BUADDR(t0)
 	LONG_ADDU	a2, t1
 	jr		ra
 	 LONG_SUBU	a2, t0

1.7.1

On Wed, Nov 10, 2010 at 09:48:15PM +0800, Tony Wu wrote:

This new version applies cleanly, so applied.

Only R2000/R3000 class processors are lacking the the load-user interlock and even some of those got it retrofitted. With R2000/R3000 being fairly uncommon these days the impact of this bug should be minor but the last R3000 DECstation user on this list may be interested ;-)

Thanks a lot!

Ralf

Good catch Tony, thanks!

Maciej