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Intel SCU Watchdog Timer Driver for Moorestown and Medfield platforms.

PATCH RESEND In review Alan Cox 2 participants 2 messages Jan 25, 2011 – Jan 26, 2011 Watchdog device drivers

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Alan Cox

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PATCH RESEND 1/1 Intel SCU Watchdog Timer Driver for Moorestown and Medfield platforms.

From: Donald Johnson <[email protected]>

This submission includes:
- Fix to intel_scu_write() to start watchdog timer the on the first write, and refresh on subsequent writes.
This enables Open, write, write, ... usage model.
- Moves boot parameter checks from intel_scu_open() to intel_scu_watchdog_init(), so driver init will fail if these parameters are out of bounds.
- Adds check for whether process waiting in wait_event_interruptible() received a signal while it was waiting.
- Other small error handling changes.

[Fix a backwards check]
[Printk and style clean + check loaded on a MID device]

---

 drivers/watchdog/Kconfig              |   10 +
 drivers/watchdog/Makefile             |    1 
 drivers/watchdog/intel_scu_watchdog.c |  620 +++++++++++++++++++++++++++++++++
 drivers/watchdog/intel_scu_watchdog.h |   66 ++++
 4 files changed, 697 insertions(+), 0 deletions(-)
 create mode 100644 drivers/watchdog/intel_scu_watchdog.c
 create mode 100644 drivers/watchdog/intel_scu_watchdog.h
drivers/watchdog/Kconfig +10 -0
index cbd37bb..3bc099f 100644
@@ -533,6 +533,16 @@ config I6300ESB_WDT
 	  To compile this driver as a module, choose M here: the
 	  module will be called i6300esb.
 
+config INTEL_SCU_WATCHDOG
+	bool "Intel SCU Watchdog for Mobile Platforms"
+	depends on WATCHDOG
+	depends on INTEL_SCU_IPC
+	---help---
+	  Hardware driver for the watchdog time built into the Intel SCU
+	  for Intel Mobile Platforms.
+
+	  To compile this driver as a module, choose M here.
+
 config ITCO_WDT
 	tristate "Intel TCO Timer/Watchdog"
 	depends on (X86 || IA64) && PCI
drivers/watchdog/Makefile +1 -0
index cd1e7fe..d7901fb 100644
@@ -102,6 +102,7 @@ obj-$(CONFIG_W83877F_WDT) += w83877f_wdt.o
 obj-$(CONFIG_W83977F_WDT) += w83977f_wdt.o
 obj-$(CONFIG_MACHZ_WDT) += machzwd.o
 obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o
+obj-$(CONFIG_INTEL_SCU_WATCHDOG) += intel_scu_watchdog.o
 
 # M32R Architecture
 
drivers/watchdog/intel_scu_watchdog.c new file +620 -0

620 lines not on this page · raw message

drivers/watchdog/intel_scu_watchdog.h new file +66 -0

66 lines not on this page · raw message

#1 lore raw

Hi Alan,

Quoted 22 lines
drivers/watchdog/intel_scu_watchdog.c new file +22 -0
+static ssize_t intel_scu_read(struct file *file,
+			     char __user *user_data,
+			     size_t len,
+			     loff_t *user_ppos)
+{
+	int result;
+	u8 buf = 0;
+
+	/* we wait for the next interrupt; if more than one */
+	/* interrupt has occurred since the last read, we */
+	/* dont care. The data is not critical. We will do */
+	/* a copy to user each time we get and interrupt */
+	/* It is up to the Watchdog daemon to be ready to */
+	/* do the read (which signifies that the driver is */
+	/* awaiting a keep alive and that a limited time */
+	/* is available for the keep alive before the system */
+	/* is rebooted by the timer */
+	if (wait_event_interruptible(read_wq, warning_flag != 0))
+		return -ERESTARTSYS;
+
+	warning_flag = 0;
+

drivers/watchdog/intel_scu_watchdog.c line 411

Quoted 10 lines
drivers/watchdog/intel_scu_watchdog.c new file +10 -0
+	/* Please note that the content of the data is irrelevent */
+	/* All that matters is that the read is available to the user */
+	result = copy_to_user(user_data, (void *)&buf, 1);
+
+	if (result != 0)
+		return -EFAULT;
+	else
+		return 1;
+
+}

Since we don't use the read operation for /dev/watchdog up till now:
could you explain what the read function is supposed to do?

Thanks in advance,
Wim.