ath: Fix clearing of secondary key cache entry for TKIP

All register writes to the key cache have to be done in pairs. However, the clearing of a separate MIC entry with hardware revisions that use combined MIC key layout did not do that with one of the registers. Add the matching register write to the following register to make the KEY4 register write actually complete.

This is mostly a fix for a theoretical issue since the incorrect entry that could potentially be left behind in the key cache would not match with received frames. Anyway, better make this code clean the entry correctly using paired register writes.

---
 drivers/net/wireless/ath/key.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

@@ -58,8 +58,11 @@ bool ath_hw_keyreset(struct ath_common *
 		REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
 		REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0);
 		REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
-		if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)
+		if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) {
 			REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);
+			REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
+				  AR_KEYTABLE_TYPE_CLR);
+		}
 
 	}
 

Jouni Malinen                                            PGP id EFC895FA