ARM: MPCore v6_early_abort enhancement

RFC PATCH New Valentine Barshak 3 participants 4 messages Feb 11, 2011 – Feb 13, 2011 Arm (32-bit)

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Valentine Barshak

author

2011-02-11 21:54 UTC #0 lore raw

RFC PATCH 1/1 ARM: MPCore v6_early_abort enhancement

SWP instruction sets bit 11 in DFSR, in case of data fault on SMP MPCore. So v6_early_abort doesn't need erratum 326103 workaround for MPCore.

Signed-off-by Valentine Barshak <[email protected]>

arch/arm/mm/abort-ev6.S +4 -1

index f332df7..590d061 100644
@@ -30,8 +30,10 @@ ENTRY(v6_early_abort)
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
 /*
  * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103).
- * The test below covers all the write situations, including Java bytecodes
+ * The test below covers all the write situations, including Java bytecodes.
+ * However SMP MPCore doesn't have this erratum.
  */
+#ifndef CONFIG_SMP
 	bic	r1, r1, #1 << 11		@ clear bit 11 of FSR
 	tst	r3, #PSR_J_BIT			@ Java?
 	movne	pc, lr

@@ -43,6 +45,7 @@ ENTRY(v6_early_abort)
 	do_ldrd_abort
 	tst	r3, #1 << 20			@ L = 0 -> write
 	orreq	r1, r1, #1 << 11		@ yes.
+#endif	/* !CONFIG_SMP */
 	mov	pc, lr

Russell King - ARM Linux

2011-02-11 22:38 UTC #1 lore raw

RFC PATCH 1/1 ARM: MPCore v6_early_abort enhancement

Quoted 2 lines · Valentine Barshak

SWP instruction sets bit 11 in DFSR, in case of data fault on SMP MPCore. So v6_early_abort doesn't need erratum 326103 workaround for MPCore.

NAK. When building a SMP kernel which also supports v6 CPUs, this will cause v6 CPUs to break.

George G. Davis

2011-02-11 22:53 UTC #2 lore raw

RFC PATCH 1/1 ARM: MPCore v6_early_abort enhancement

Hi,

Quoted 6 lines · Russell King - ARM Linux

Quoted 2 lines · Valentine Barshak
SWP instruction sets bit 11 in DFSR, in case of data fault on SMP MPCore. So v6_early_abort doesn't need erratum 326103 workaround for MPCore.
NAK. When building a SMP kernel which also supports v6 CPUs, this will cause v6 CPUs to break.

Since the SWP erratum only affects ARM1136 (UP) processors, how will this break ARM11 MPCore (v6) processors? Are you referring to unified kernels which support both UP and SMP machines? I reckon that's a recent feature to be able to boot SMP kernels on UP machines. Perhaps if that's why you're against this, then we need to have a separate config option to specifically enable this ARM1136 erratum workaround? Or at least only perform the workaround for certain processor IDs?

Thanks!

--
Regards,
George

Russell King - ARM Linux

2011-02-13 10:43 UTC #3 lore raw

RFC PATCH 1/1 ARM: MPCore v6_early_abort enhancement

Quoted 4 lines · George G. Davis

Hi,
Quoted 1 line · Russell King - ARM Linux
On Sat, Feb 12, 2011 at 12:54:21AM +0300, Valentine Barshak wrote:

Quoted 8 lines

Quoted 5 lines
Quoted 2 lines
SWP instruction sets bit 11 in DFSR, in case of data fault on SMP MPCore. So v6_early_abort doesn't need erratum 326103 workaround for MPCore.
NAK. When building a SMP kernel which also supports v6 CPUs, this will cause v6 CPUs to break.
Since the SWP erratum only affects ARM1136 (UP) processors, how will this break ARM11 MPCore (v6) processors?

Omitting the code will break MPcore processors.

Quoted 1 line

Are you referring to unified kernels which support both UP and SMP machines?

Of course.

Quoted 2 lines

I reckon that's a recent feature to be able to boot SMP kernels on UP machines.

Makes no difference if it's a recent feature or not. We're not adding new obstacles to this when we're getting rid of them. It's counter productive.

Quoted 3 lines

Perhaps if that's why you're against this, then we need to have a separate config option to specifically enable this ARM1136 erratum workaround?

No we don't. Omitting the code is an optimization to what is already a slow path which results in breakage for people. That's why I nak'd it.