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Refactor do_reset() into board-specific and CPU-specific portions

PATCH New Kyle Moffett 4 participants 8 messages Feb 23, 2011 – Feb 24, 2011

Subsystems (11)
Arm (32-bit) PowerPC Library code MIPS +7 more subsystems
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Kyle Moffett

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PATCH v4 1/4 Refactor do_reset() into board-specific and CPU-specific portions

The existing do_reset() shell command function is defined and redefined all over the place.

Most CPU types have their own default internal reset mechanism, even if it is just to force a triple-fault. In addition, some board designs require the ability to override the native CPU reset due to hardware requirements or limitations.

This patch is designed to make it much easier for boards to generically override their CPU-architecture reset routine, as well as to provide a generic entrypoint for common improvements to CPU reset (IE: clean restart of network/storage devices, etc).

In particular, this is necessary for the new eXMeritus HWW-1U-1A port.

All of the board-specific reset routines are renamed from do_reset() to board_reset(). A few CPUs already had a customized board_reset() hook; those were adjusted to use the new board_reset() prototype.

All of the CPU-specific reset routines are renamed from do_reset() to arch_reset(). The name cpu_reset() might better, but that is already in use in various places for SMP support. (IE: Reset one particular CPU).

Weak no-ops were created for arch_reset() and board_reset() to support platforms which don't implement one or both of them.

A new generic system_reset() function was introduced which simply calls board_reset() and cpu_reset() in that order, and all explicit callers of do_reset() were changed to use system_reset() instead.

Signed-off-by Kyle Moffett <[email protected]>
Cc Wolfgang Denk <[email protected]>
Cc Albert Aribaud <[email protected]>
Cc Mike Frysinger <[email protected]>
Cc Jason Jin <[email protected]>
Cc Michal Simek <[email protected]>
Cc Shinya Kuribayashi <[email protected]>
Cc Kim Phillips <[email protected]>
Cc Andy Fleming <[email protected]>
Cc Kumar Gala <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Daniel Hellstrom <[email protected]>
Cc Graeme Russ <[email protected]>

---

v4: Complete rewrite as a fully architecture-independent feature

 api/api.c                                          |    3 +-
 arch/arm/cpu/arm920t/at91/reset.c                  |    5 ---
 arch/arm/cpu/arm920t/at91rm9200/reset.c            |    2 -
 arch/arm/lib/reset.c                               |    2 +-
 arch/avr32/cpu/cpu.c                               |    2 +-
 arch/blackfin/cpu/cpu.h                            |    1 -
 arch/blackfin/cpu/reset.c                          |   28 ++++++-----------
 arch/i386/cpu/cpu.c                                |    2 +-
 arch/m68k/cpu/mcf5227x/cpu.c                       |    2 +-
 arch/m68k/cpu/mcf523x/cpu.c                        |    2 +-
 arch/m68k/cpu/mcf52x2/cpu.c                        |   20 ++++--------
 arch/m68k/cpu/mcf52x2/cpu.h                        |   33 --------------------
 arch/m68k/cpu/mcf532x/cpu.c                        |    2 +-
 arch/m68k/cpu/mcf5445x/cpu.c                       |    2 +-
 arch/m68k/cpu/mcf547x_8x/cpu.c                     |    2 +-
 arch/mips/cpu/cpu.c                                |    2 +-
 arch/nios2/cpu/cpu.c                               |    2 +-
 arch/powerpc/cpu/74xx_7xx/cpu.c                    |    2 +-
 arch/powerpc/cpu/mpc512x/cpu.c                     |    3 +-
 arch/powerpc/cpu/mpc5xx/cpu.c                      |    2 +-
 arch/powerpc/cpu/mpc5xxx/cpu.c                     |    3 +-
 arch/powerpc/cpu/mpc8220/cpu.c                     |    2 +-
 arch/powerpc/cpu/mpc824x/cpu.c                     |    2 +-
 arch/powerpc/cpu/mpc8260/cpu.c                     |    5 +--
 arch/powerpc/cpu/mpc83xx/cpu.c                     |    3 +-
 arch/powerpc/cpu/mpc85xx/cpu.c                     |   15 +++++---
 arch/powerpc/cpu/mpc86xx/cpu.c                     |   22 ++-----------
 arch/powerpc/cpu/mpc8xx/cpu.c                      |    4 +-
 arch/powerpc/cpu/ppc4xx/cpu.c                      |    9 +-----
 arch/sh/cpu/sh2/cpu.c                              |    2 +-
 arch/sh/cpu/sh3/cpu.c                              |    2 +-
 arch/sh/cpu/sh4/cpu.c                              |    2 +-
 arch/sparc/cpu/leon2/cpu.c                         |    3 +-
 arch/sparc/cpu/leon3/cpu.c                         |    4 +--
 board/BuS/eb_cpux9k2/cpux9k2.c                     |    1 -
 board/amcc/yosemite/yosemite.c                     |    3 +-
 board/atmel/at91rm9200dk/at91rm9200dk.c            |    3 +-
 board/bf537-stamp/bf537-stamp.c                    |    3 +-
 board/dave/PPChameleonEVB/PPChameleonEVB.c         |    4 +-
 board/eltec/bab7xx/bab7xx.c                        |    6 ++--
 board/eltec/elppc/elppc.c                          |    2 +-
 board/esd/apc405/apc405.c                          |    4 +-
 board/esd/ar405/ar405.c                            |    2 +-
 board/esd/ash405/ash405.c                          |    4 +-
 board/esd/canbt/canbt.c                            |    2 +-
 board/esd/cpci405/cpci405.c                        |    6 ++--
 board/esd/cpciiser4/cpciiser4.c                    |    2 +-
 board/esd/du405/du405.c                            |    2 +-
 board/esd/hh405/hh405.c                            |    4 +-
 board/esd/pci405/pci405.c                          |    4 +-
 board/esd/plu405/plu405.c                          |    4 +-
 board/esd/tasreg/tasreg.c                          |    4 +-
 board/esd/voh405/voh405.c                          |    4 +-
 board/esd/wuh405/wuh405.c                          |    4 +-
 board/freescale/mpc8610hpcd/mpc8610hpcd.c          |    2 +-
 board/freescale/mpc8641hpcn/mpc8641hpcn.c          |    2 +-
 board/funkwerk/vovpn-gw/vovpn-gw.c                 |    5 +--
 board/lwmon5/lwmon5.c                              |    3 +-
 board/pcippc2/pcippc2.c                            |    2 +-
 board/ppmc7xx/ppmc7xx.c                            |    6 ++--
 board/prodrive/pdnb3/pdnb3.c                       |    2 +-
 board/sacsng/sacsng.c                              |    2 +-
 board/sbc8641d/sbc8641d.c                          |    7 ++--
 .../xilinx/microblaze-generic/microblaze-generic.c |    2 +-
 board/zeus/zeus.c                                  |    4 +-
 common/cmd_boot.c                                  |   23 +++++++++++++-
 common/cmd_bootm.c                                 |    7 ++--
 common/hush.c                                      |    2 +-
 common/main.c                                      |    2 +-
 examples/api/libgenwrap.c                          |    2 +-
 include/_exports.h                                 |    2 +-
 include/command.h                                  |    3 +-
 include/configs/VoVPN-GW.h                         |    3 --
 include/configs/lwmon5.h                           |    1 -
 include/configs/yosemite.h                         |    1 -
 lib/vsprintf.c                                     |    2 +-
 76 files changed, 143 insertions(+), 207 deletions(-)
 delete mode 100644 arch/m68k/cpu/mcf52x2/cpu.h
api/api.c +2 -1
index 853f010..548949f 100644
@@ -131,7 +131,8 @@ static int API_puts(va_list ap)
  */
 static int API_reset(va_list ap)
 {
-	do_reset(NULL, 0, 0, NULL);
+	if (system_reset())
+		return API_ENODEV;
 
 	/* NOT REACHED */
 	return 0;
arch/arm/cpu/arm920t/at91/reset.c +0 -5
index 51043ec..8a430c6 100644
@@ -35,11 +35,6 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_st.h>
 
-void  __attribute__((weak)) board_reset(void)
-{
-	/* true empty function for defining weak symbol */
-}
-
 void reset_cpu(ulong ignored)
 {
 	at91_st_t *st = (at91_st_t *) AT91_ST_BASE;
arch/arm/cpu/arm920t/at91rm9200/reset.c +0 -2
index 945ea2c..8aa5faa 100644
@@ -33,8 +33,6 @@
 #include <common.h>
 #include <asm/arch/hardware.h>
 
-void board_reset(void) __attribute__((__weak__));
-
 /*
  * Reset the cpu by setting up the watchdog timer and let him time out
  * or toggle a GPIO pin on the AT91RM9200DK board
arch/arm/lib/reset.c +1 -1
index 08e6acb..69d0333 100644
@@ -39,7 +39,7 @@
 
 #include <common.h>
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	puts ("resetting ...\n");
arch/avr32/cpu/cpu.c +1 -1
index e4489bb..c484d77 100644
@@ -76,7 +76,7 @@ void prepare_to_boot(void)
 		     "sync   0" : : "r"(0) : "memory");
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	/* This will reset the CPU core, caches, MMU and all internal busses */
 	__builtin_mtdr(8, 1 << 13);	/* set DC:DBE */
arch/blackfin/cpu/cpu.h +0 -1
index ba85e0b..25f6960 100644
@@ -27,7 +27,6 @@
 
 #include <command.h>
 
-void board_reset(void) __attribute__((__weak__));
 void bfin_reset_or_hang(void) __attribute__((__noreturn__));
 void bfin_dump(struct pt_regs *reg);
 void bfin_panic(struct pt_regs *reg);
arch/blackfin/cpu/reset.c +10 -18
index 164afde..dbfe575 100644
@@ -75,32 +75,24 @@ static void bfin_reset(void)
 		asm("raise 1");
 }
 
-/* We need to trampoline ourselves up into L1 since our linker
- * does not have relaxtion support and will only generate a
- * PC relative call with a 25 bit immediate.  This is not enough
- * to get us from the top of SDRAM into L1.
- */
-__attribute__ ((__noreturn__))
-static inline void bfin_reset_trampoline(void)
-{
-	if (board_reset)
-		board_reset();
-	while (1)
-		asm("jump (%0);" : : "a" (bfin_reset));
-}
-
 __attribute__ ((__noreturn__))
 void bfin_reset_or_hang(void)
 {
 #ifdef CONFIG_PANIC_HANG
 	hang();
 #else
-	bfin_reset_trampoline();
+	system_reset();
 #endif
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+/* We need to trampoline ourselves up into L1 since our linker
+ * does not have relaxtion support and will only generate a
+ * PC relative call with a 25 bit immediate.  This is not enough
+ * to get us from the top of SDRAM into L1.
+ */
+__attribute__ ((__noreturn__))
+int arch_reset(void)
 {
-	bfin_reset_trampoline();
-	return 0;
+	while (1)
+		asm("jump (%0);" : : "a" (bfin_reset));
 }
arch/i386/cpu/cpu.c +1 -1
index ae40384..e8bd4cd 100644
@@ -113,7 +113,7 @@ int cpu_init_r(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	printf ("resetting ...\n");
 	udelay(50000);				/* wait 50 ms */
arch/m68k/cpu/mcf5227x/cpu.c +1 -1
index 09ef1d2..24f1b97 100644
@@ -33,7 +33,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
 	udelay(1000);
arch/m68k/cpu/mcf523x/cpu.c +1 -1
index 2376f97..71da886 100644
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
arch/m68k/cpu/mcf52x2/cpu.c +7 -13
index 571d078..5233631 100644
@@ -33,12 +33,11 @@
 #include <command.h>
 #include <asm/immap.h>
 #include <netdev.h>
-#include "cpu.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef	CONFIG_M5208
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
 

@@ -141,13 +140,8 @@ int checkcpu(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
-	/* Call the board specific reset actions first. */
-	if(board_reset) {
-		board_reset();
-	}
-
 	mbar_writeByte(MCF_RCM_RCR,
 		       MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
 	return 0;

@@ -176,7 +170,7 @@ int watchdog_init(void)
 #endif
 
 #ifdef	CONFIG_M5272
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 

@@ -256,7 +250,7 @@ int watchdog_init(void)
 #endif				/* #ifdef CONFIG_M5272 */
 
 #ifdef	CONFIG_M5275
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
 

@@ -336,7 +330,7 @@ int checkcpu(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
 	return 0;

@@ -353,7 +347,7 @@ int checkcpu(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	/* enable watchdog, set timeout to 0 and wait */
 	mbar_writeByte(MCFSIM_SYPCR, 0xc0);

@@ -383,7 +377,7 @@ int checkcpu(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	/* enable watchdog, set timeout to 0 and wait */
 	mbar_writeByte(SIM_SYPCR, 0xc0);
arch/m68k/cpu/mcf52x2/cpu.h deleted +0 -33
deleted file mode 100644
index c1227eb..0000000
@@ -1,33 +0,0 @@
-/*
- *  cpu.h
- *
- *  Copyright (c) 2009 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#ifndef _CPU_H_
-#define _CPU_H_
-
-#include <command.h>
-
-/* Use this to create board specific reset functions */
-void board_reset(void) __attribute__((__weak__));
-
-#endif /* _CPU_H_ */
arch/m68k/cpu/mcf532x/cpu.c +1 -1
index 3346784..16c80ff 100644
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
arch/m68k/cpu/mcf5445x/cpu.c +1 -1
index 323a54e..5fa7a20 100644
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
 	udelay(1000);
arch/m68k/cpu/mcf547x_8x/cpu.c +1 -1
index 7590f2c..d75c641 100644
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
arch/mips/cpu/cpu.c +1 -1
index 3ae397c..52c2fc1 100644
@@ -42,7 +42,7 @@ void __attribute__((weak)) _machine_restart(void)
 {
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	_machine_restart();
arch/nios2/cpu/cpu.c +1 -1
index ef360ee..32a834b 100644
@@ -40,7 +40,7 @@ int checkcpu (void)
 	return (0);
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	disable_interrupts();
 	/* indirect call to go beyond 256MB limitation of toolchain */
arch/powerpc/cpu/74xx_7xx/cpu.c +1 -1
index b6a31b4..9bc9602 100644
@@ -234,7 +234,7 @@ soft_restart(unsigned long addr)
     !defined(CONFIG_ELPPC)   && \
     !defined(CONFIG_PPMC7XX)
 /* no generic way to do board reset. simply call soft_reset. */
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	ulong addr;
 	/* flush and disable I/D cache */
arch/powerpc/cpu/mpc512x/cpu.c +1 -2
index a1a3bd4..cc905b9 100644
@@ -74,8 +74,7 @@ int checkcpu (void)
 }
 
 
-int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	ulong msr;
 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
arch/powerpc/cpu/mpc5xx/cpu.c +1 -1
index 5aa7f84..3c4155e 100644
@@ -138,7 +138,7 @@ int dcache_status (void)
 /*
  * Reset board
  */
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 #if defined(CONFIG_PATI)
 	volatile ulong *addr = (ulong *) CONFIG_SYS_RESET_ADDRESS;
arch/powerpc/cpu/mpc5xxx/cpu.c +1 -2
index 0c1eebd..f4e6a3b 100644
@@ -77,8 +77,7 @@ int checkcpu (void)
 
 /* ------------------------------------------------------------------------- */
 
-int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	ulong msr;
 	/* Interrupts and MMU off */
arch/powerpc/cpu/mpc8220/cpu.c +1 -1
index 64e0526..af68cbf 100644
@@ -52,7 +52,7 @@ int checkcpu (void)
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	volatile gptmr8220_t *gptmr = (volatile gptmr8220_t *) MMAP_GPTMR;
 	ulong msr;
arch/powerpc/cpu/mpc824x/cpu.c +1 -1
index 44f91b2..36fc8fe 100644
@@ -92,7 +92,7 @@ int checkdcache (void)
 
 /*------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	ulong msr, addr;
arch/powerpc/cpu/mpc8260/cpu.c +1 -4
index 220c1e2..3c0f3d4 100644
@@ -236,9 +236,7 @@ void upmconfig (uint upm, uint * table, uint size)
 
 /* ------------------------------------------------------------------------- */
 
-#if !defined(CONFIG_HAVE_OWN_RESET)
-int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	ulong msr, addr;
 

@@ -270,7 +268,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	return 1;
 
 }
-#endif	/* CONFIG_HAVE_OWN_RESET */
 
 /* ------------------------------------------------------------------------- */
arch/powerpc/cpu/mpc83xx/cpu.c +1 -2
index 6635109..b6b5aa3 100644
@@ -126,8 +126,7 @@ int checkcpu(void)
 	return 0;
 }
 
-int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	ulong msr;
 #ifndef MPC83xx_RESET
arch/powerpc/cpu/mpc85xx/cpu.c +9 -6
index 1aad2ba..2df247d 100644
@@ -202,11 +202,10 @@ int checkcpu (void)
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-/* Everything after the first generation of PQ3 parts has RSTCR */
 #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
     defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
+int arch_reset(void)
+{
 	unsigned long val, msr;
 
 	/*

@@ -220,14 +219,18 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	val = mfspr(DBCR0);
 	val |= 0x70000000;
 	mtspr(DBCR0,val);
+	return 1;
+}
 #else
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+int arch_reset(void)
+{
+	/* Everything after the first generation of PQ3 parts has RSTCR */
+	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 	out_be32(&gur->rstcr, 0x2);	/* HRESET_REQ */
 	udelay(100);
-#endif
-
 	return 1;
 }
+#endif
 
 
 /*
arch/powerpc/cpu/mpc86xx/cpu.c +4 -18
index ffcc8e6..946f078 100644
@@ -32,17 +32,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*
- * Default board reset function
- */
-static void
-__board_reset(void)
-{
-	/* Do nothing */
-}
-void board_reset(void) __attribute__((weak, alias("__board_reset")));
-
-
 int
 checkcpu(void)
 {

@@ -123,15 +112,12 @@ checkcpu(void)
 }
 
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
-	volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-	volatile ccsr_gur_t *gur = &immap->im_gur;
-
-	/* Attempt board-specific reset */
-	board_reset();
+	immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
+	ccsr_gur_t *gur = &immap->im_gur;
 
-	/* Next try asserting HRESET_REQ */
+	/* Try asserting HRESET_REQ */
 	out_be32(&gur->rstcr, MPC86xx_RSTCR_HRST_REQ);
 
 	while (1)
arch/powerpc/cpu/mpc8xx/cpu.c +2 -2
index 142cfa5..cdc4d39 100644
@@ -478,7 +478,7 @@ void upmconfig (uint upm, uint * table, uint size)
 
 #ifndef CONFIG_LWMON
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	ulong msr, addr;
 

@@ -521,7 +521,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * and thus too short to reset the external hardware. So we  use  the
  * watchdog to reset the board.
  */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	/* prevent triggering the watchdog */
 	disable_interrupts ();
arch/powerpc/cpu/ppc4xx/cpu.c +1 -8
index 67f1fff..58c2853 100644
@@ -40,8 +40,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-void board_reset(void);
-
 /*
  * To provide an interface to detect CPU number for boards that support
  * more then one CPU, we implement the "weak" default functions here.

@@ -699,11 +697,8 @@ int ppc440spe_revB() {
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
-#if defined(CONFIG_BOARD_RESET)
-	board_reset();
-#else
 #if defined(CONFIG_SYS_4xx_RESET_TYPE)
 	mtspr(SPRN_DBCR0, CONFIG_SYS_4xx_RESET_TYPE << 28);
 #else

@@ -712,8 +707,6 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	 */
 	mtspr(SPRN_DBCR0, 0x30000000);
 #endif /* defined(CONFIG_SYS_4xx_RESET_TYPE) */
-#endif /* defined(CONFIG_BOARD_RESET) */
-
 	return 1;
 }
arch/sh/cpu/sh2/cpu.c +1 -1
index 6bbedd9..82e4305 100644
@@ -59,7 +59,7 @@ int cleanup_before_linux(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	disable_interrupts();
 	reset_cpu(0);
arch/sh/cpu/sh3/cpu.c +1 -1
index 3e9caad..2a3ace0 100644
@@ -45,7 +45,7 @@ int cleanup_before_linux(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	disable_interrupts();
 	reset_cpu(0);
arch/sh/cpu/sh4/cpu.c +1 -1
index f136758..e56c6fb 100644
@@ -44,7 +44,7 @@ int cleanup_before_linux (void)
 	return 0;
 }
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	disable_interrupts();
 	reset_cpu (0);
arch/sparc/cpu/leon2/cpu.c +1 -2
index 46512c7..679aece 100644
@@ -49,10 +49,9 @@ void cpu_reset(void)
 	_reset_reloc();
 }
 
-int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	cpu_reset();
-
 	return 1;
 }
arch/sparc/cpu/leon3/cpu.c +1 -3
index a1646e2..a7f0b99 100644
@@ -52,12 +52,10 @@ void cpu_reset(void)
 	_reset_reloc();
 }
 
-int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 	cpu_reset();
-
 	return 1;
-
 }
 
 u64 flash_read64(void *addr)
board/BuS/eb_cpux9k2/cpux9k2.c +0 -1
index fe62a0f..473498c 100644
@@ -111,7 +111,6 @@ int misc_init_r(void)
 		}
 	}
 #endif
-	gd->jt[XF_do_reset] = (void *) do_reset;
 
 #ifdef CONFIG_STATUS_LED
 	status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
board/amcc/yosemite/yosemite.c +2 -1
index aaeab6f..d572742 100644
@@ -365,8 +365,9 @@ void hw_watchdog_reset(void)
 }
 #endif
 
-void board_reset(void)
+int board_reset(void)
 {
 	/* give reset to BCSR */
 	*(unsigned char *)(CONFIG_SYS_BCSR_BASE | 0x06) = 0x09;
+	return 0;
 }
board/atmel/at91rm9200dk/at91rm9200dk.c +2 -1
index 49b5fe3..567b9bb 100644
@@ -60,7 +60,7 @@ int board_init (void)
 	return 0;
 }
 
-void board_reset (void)
+int board_reset(void)
 {
 	AT91PS_PIO pio = AT91C_BASE_PIOA;
 

@@ -68,6 +68,7 @@ void board_reset (void)
 	writel(0x00080000, pio->PIO_CODR);
 	writel(0x00080000, pio->PIO_OER);
 	writel(0x00080000, pio->PIO_PER);
+	return 0;
 }
 
 int dram_init (void)
board/bf537-stamp/bf537-stamp.c +2 -1
index ec888d4..54a0a14 100644
@@ -43,11 +43,12 @@ int checkboard(void)
 	return 0;
 }
 
-void board_reset(void)
+int board_reset(void)
 {
 	/* workaround for weak pull ups on ssel */
 	if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
 		bfin_reset_boot_spi_cs(GPIO_PF10);
+	return 0;
 }
 
 #ifdef CONFIG_BFIN_MAC
board/dave/PPChameleonEVB/PPChameleonEVB.c +2 -2
index 8e26996..b418e06 100644
@@ -103,7 +103,7 @@ int misc_init_r (void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -136,7 +136,7 @@ int misc_init_r (void)
 				udelay(1000);
 		}
 		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/eltec/bab7xx/bab7xx.c +3 -3
index ea4897b..e5e5116 100644
@@ -181,10 +181,10 @@ void after_reloc (ulong dest_addr)
 /* ------------------------------------------------------------------------- */
 
 /*
- * do_reset is done here because in this case it is board specific, since the
- * 7xx CPUs can only be reset by external HW (the RTC in this case).
+ * Board-specific reset, since the 7xx CPUs can only be reset by external HW
+ * (the RTC in this case).
  */
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int board_reset(void)
 {
 #if defined(CONFIG_RTC_MK48T59)
 	/* trigger watchdog immediately */
board/eltec/elppc/elppc.c +1 -1
index cb9ab86..a80a007 100644
@@ -117,7 +117,7 @@ phys_size_t initdram (int board_type)
  * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
  * Memory Block).
  */
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int board_reset(void)
 {
 	out8 (MPC107_EUMB_PI, 1);
 	return (0);
board/esd/apc405/apc405.c +2 -2
index def8a4f..e1d3601 100644
@@ -219,7 +219,7 @@ int misc_init_r(void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -255,7 +255,7 @@ int misc_init_r(void)
 				udelay(1000);
 		}
 		putc('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	/* restore gpio/cs settings */
board/esd/ar405/ar405.c +1 -1
index 6ec507f..c77bb33 100644
@@ -112,7 +112,7 @@ int board_early_init_f (void)
 					udelay (1000);
 			}
 			putc ('\n');
-			do_reset (NULL, 0, 0, NULL);
+			system_reset();
 		}
 	}
board/esd/ash405/ash405.c +2 -2
index 1b0365e..f4cdcf6 100644
@@ -88,7 +88,7 @@ int misc_init_r (void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -121,7 +121,7 @@ int misc_init_r (void)
 				udelay(1000);
 		}
 		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/esd/canbt/canbt.c +1 -1
index cc537f2..2534478 100644
@@ -108,7 +108,7 @@ int board_early_init_f (void)
 				udelay (1000);
 		}
 		putc ('\n');
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	/*
board/esd/cpci405/cpci405.c +3 -3
index 98a8584..e434e2b 100644
@@ -160,7 +160,7 @@ int board_early_init_f(void)
 					udelay(1000);
 			}
 			putc('\n');
-			do_reset(NULL, 0, 0, NULL);
+			system_reset();
 		}
 	}
 #endif /* !CONFIG_CPCI405_VER2 */

@@ -288,7 +288,7 @@ int misc_init_r (void)
 		if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE,
 			   (uchar *)fpgadata, &len) != 0) {
 			printf("GUNZIP ERROR - must RESET board to recover\n");
-			do_reset(NULL, 0, 0, NULL);
+			system_reset();
 		}
 
 		status = fpga_boot(dst, len);

@@ -324,7 +324,7 @@ int misc_init_r (void)
 					udelay(1000);
 			}
 			putc('\n');
-			do_reset(NULL, 0, 0, NULL);
+			system_reset();
 		}
 
 		/* restore gpio/cs settings */
board/esd/cpciiser4/cpciiser4.c +1 -1
index 8afc50d..fc7bfd2 100644
@@ -106,7 +106,7 @@ int board_early_init_f (void)
 				udelay (1000);
 		}
 		putc ('\n');
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	/*
board/esd/du405/du405.c +1 -1
index c32d333..d3582d2 100644
@@ -106,7 +106,7 @@ int board_early_init_f (void)
 				udelay (1000);
 		}
 		putc ('\n');
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	/*
board/esd/hh405/hh405.c +2 -2
index e9d2d36..054865d 100644
@@ -417,7 +417,7 @@ int misc_init_r (void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -450,7 +450,7 @@ int misc_init_r (void)
 				udelay(1000);
 		}
 		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/esd/pci405/pci405.c +2 -2
index c1bac6a..7476022 100644
@@ -198,7 +198,7 @@ int misc_init_r (void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -231,7 +231,7 @@ int misc_init_r (void)
 				udelay(1000);
 		}
 		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/esd/plu405/plu405.c +2 -2
index 109d2dc..2bfe238 100644
@@ -121,7 +121,7 @@ int misc_init_r(void)
 	if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE,
 		   (uchar *)fpgadata, &len) != 0) {
 		printf("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -157,7 +157,7 @@ int misc_init_r(void)
 				udelay(1000);
 		}
 		putc('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/esd/tasreg/tasreg.c +2 -2
index d2488b8..0baf9da 100644
@@ -152,7 +152,7 @@ int misc_init_r (void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -185,7 +185,7 @@ int misc_init_r (void)
 				udelay(1000);
 		}
 		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/esd/voh405/voh405.c +2 -2
index 5f28a48..9f2a454 100644
@@ -117,7 +117,7 @@ int misc_init_r (void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -150,7 +150,7 @@ int misc_init_r (void)
 				udelay(1000);
 		}
 		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/esd/wuh405/wuh405.c +2 -2
index d8d4bb5..a331a07 100644
@@ -85,7 +85,7 @@ int misc_init_r (void)
 	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	status = fpga_boot(dst, len);

@@ -118,7 +118,7 @@ int misc_init_r (void)
 				udelay(1000);
 		}
 		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/freescale/mpc8610hpcd/mpc8610hpcd.c +1 -1
index d7dd470..04204d2 100644
@@ -314,7 +314,7 @@ int board_eth_init(bd_t *bis)
 	return pci_eth_init(bis);
 }
 
-void board_reset(void)
+int board_reset(void)
 {
 	u8 *pixis_base = (u8 *)PIXIS_BASE;
board/freescale/mpc8641hpcn/mpc8641hpcn.c +1 -1
index 166ff0c..2d51cee 100644
@@ -252,7 +252,7 @@ int board_eth_init(bd_t *bis)
 	return pci_eth_init(bis);
 }
 
-void board_reset(void)
+int board_reset(void)
 {
 	u8 *pixis_base = (u8 *)PIXIS_BASE;
board/funkwerk/vovpn-gw/vovpn-gw.c +1 -4
index a4bfbc9..8b2d826 100644
@@ -304,9 +304,7 @@ int misc_init_r (void)
 	return 0;
 }
 
-#if defined(CONFIG_HAVE_OWN_RESET)
-int
-do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int board_reset(void)
 {
 	volatile ioport_t *iop;
 

@@ -314,7 +312,6 @@ do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	iop->pdat |= 0x00002000;	/* PC18 = HW_RESET */
 	return 1;
 }
-#endif	/* CONFIG_HAVE_OWN_RESET */
 
 #define ns2clk(ns) (ns / (1000000000 / CONFIG_8260_CLKIN) + 1)
board/lwmon5/lwmon5.c +2 -1
index dd275bf..387e580 100644
@@ -490,7 +490,8 @@ void video_get_info_str(int line_number, char *info)
 #endif /* CONFIG_CONSOLE_EXTRA_INFO */
 #endif /* CONFIG_VIDEO */
 
-void board_reset(void)
+int board_reset(void)
 {
 	gpio_write_bit(CONFIG_SYS_GPIO_BOARD_RESET, 1);
+	return 0;
 }
board/pcippc2/pcippc2.c +1 -1
index 4a91458..f8f1f9a 100644
@@ -69,7 +69,7 @@ phys_size_t initdram (int board_type)
 	return cpc710_ram_init ();
 }
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int board_reset(void)
 {
 	out32 (REG (CPC0, SPOR), 0);
 	iobarrier_rw ();
board/ppmc7xx/ppmc7xx.c +3 -3
index 432d366..35baef1 100644
@@ -84,11 +84,11 @@ int misc_init_r( void )
 
 
 /*
- * do_reset()
+ * board_reset()
  *
- * Shell command to reset the board.
+ * Called from the "reset" shell command.
  */
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int board_reset(void)
 {
 	printf( "Resetting...\n" );
board/prodrive/pdnb3/pdnb3.c +1 -1
index 928dd22..8a13b16 100644
@@ -181,7 +181,7 @@ int do_fpga_boot(unsigned char *fpgadata)
 				udelay(1000);
 		}
 		putc('\n');
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 	}
 
 	puts("FPGA:  ");
board/sacsng/sacsng.c +1 -1
index 61cab87..dfabf84 100644
@@ -826,7 +826,7 @@ void show_boot_progress (int status)
 	/*
 	 * Reset the board to retry initialization.
 	 */
-	do_reset (NULL, 0, 0, NULL);
+	system_reset();
     }
 }
 #endif /* CONFIG_SHOW_BOOT_PROGRESS */
board/sbc8641d/sbc8641d.c +4 -3
index 5c30b26..b07db63 100644
@@ -245,9 +245,9 @@ unsigned long get_board_sys_clk (ulong dummy)
 	return val;
 }
 
-void board_reset(void)
-{
 #ifdef CONFIG_SYS_RESET_ADDRESS
+int board_reset(void)
+{
 	ulong addr = CONFIG_SYS_RESET_ADDRESS;
 
 	/* flush and disable I/D cache */

@@ -271,8 +271,9 @@ void board_reset(void)
 	__asm__ __volatile__ ("li	4, (1 << 6)"	::: "r4");
 	__asm__ __volatile__ ("mtspr	27, 4");
 	__asm__ __volatile__ ("rfi");
-#endif
+	return 0;
 }
+#endif
 
 #ifdef CONFIG_MP
 extern void cpu_mp_lmb_reserve(struct lmb *lmb);
board/xilinx/microblaze-generic/microblaze-generic.c +1 -1
index 183e4dc..f2cd66e 100644
@@ -31,7 +31,7 @@
 #include <asm/microblaze_intc.h>
 #include <asm/asm.h>
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int arch_reset(void)
 {
 #ifdef CONFIG_SYS_GPIO_0
 	*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
board/zeus/zeus.c +2 -2
index 7e33d3f..a8cf402 100644
@@ -372,7 +372,7 @@ int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char * const argv[])
 		/*
 		 * Reset the board for default to become valid
 		 */
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 
 		return 0;
 	}

@@ -392,7 +392,7 @@ int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char * const argv[])
 		 */
 		logbuff_reset();
 
-		do_reset(NULL, 0, 0, NULL);
+		system_reset();
 
 		return 0;
 	}
common/cmd_boot.c +22 -1
index 7b603d3..fc8b366 100644
@@ -60,6 +60,23 @@ int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 /* -------------------------------------------------------------------- */
 
+/* These weak stubs are overridden by individual boards and architectures */
+__attribute__((__weak__)) int board_reset(void)
+{
+	return 0;
+}
+__attribute__((__weak__)) int arch_reset(void)
+{
+	return 0;
+}
+
+/* This is the "official" system reset function */
+int system_reset(void)
+{
+	int ret = board_reset();
+	return ret ? ret : arch_reset();
+}
+
 U_BOOT_CMD(
 	go, CONFIG_SYS_MAXARGS, 1,	do_go,
 	"start application at address 'addr'",

@@ -67,8 +84,12 @@ U_BOOT_CMD(
 	"      passing 'arg' as arguments"
 );
 
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	return system_reset();
+}
 U_BOOT_CMD(
-	reset, 1, 0,	do_reset,
+	reset, 1, 0, do_reset,
 	"Perform RESET of the CPU",
 	""
 );
common/cmd_bootm.c +3 -4
index 18019d6..ffe3dbb 100644
@@ -645,7 +645,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	if (ret < 0) {
 		if (ret == BOOTM_ERR_RESET)
-			do_reset (cmdtp, flag, argc, argv);
+			system_reset();
 		if (ret == BOOTM_ERR_OVERLAP) {
 			if (images.legacy_hdr_valid) {
 				if (image_get_type (&images.legacy_hdr_os_copy) == IH_TYPE_MULTI)

@@ -655,7 +655,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 				puts ("ERROR: new format image overwritten - "
 					"must RESET the board to recover\n");
 				show_boot_progress (-113);
-				do_reset (cmdtp, flag, argc, argv);
+				system_reset();
 			}
 		}
 		if (ret == BOOTM_ERR_UNIMPLEMENTED) {

@@ -702,8 +702,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef DEBUG
 	puts ("\n## Control returned to monitor - resetting...\n");
 #endif
-	do_reset (cmdtp, flag, argc, argv);
-
+	system_reset();
 	return 1;
 }
common/hush.c +1 -1
index 8021a68..37c249e 100644
@@ -1036,7 +1036,7 @@ static void get_user_input(struct in_str *i)
 	if (n == -2) {
 	  puts("\nTimeout waiting for command\n");
 #  ifdef CONFIG_RESET_TO_RETRY
-	  do_reset(NULL, 0, 0, NULL);
+	  system_reset();
 #  else
 #	error "This currently only works with CONFIG_RESET_TO_RETRY enabled"
 #  endif
common/main.c +1 -1
index dcbacc9..31b8850 100644
@@ -450,7 +450,7 @@ void main_loop (void)
 			puts ("\nTimed out waiting for command\n");
 # ifdef CONFIG_RESET_TO_RETRY
 			/* Reinit board to run initialization code again */
-			do_reset (NULL, 0, 0, NULL);
+			system_reset();
 # else
 			return;		/* retry autoboot */
 # endif
examples/api/libgenwrap.c +1 -1
index 873cf34..361d8ce 100644
@@ -81,7 +81,7 @@ void __udelay(unsigned long usec)
 	ub_udelay(usec);
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int system_reset(void)
 {
 	ub_reset();
 	return 0;
include/_exports.h +1 -1
index d89b65b..bfe0630 100644
@@ -15,7 +15,7 @@ EXPORT_FUNC(free)
 EXPORT_FUNC(udelay)
 EXPORT_FUNC(get_timer)
 EXPORT_FUNC(vprintf)
-EXPORT_FUNC(do_reset)
+EXPORT_FUNC(system_reset)
 EXPORT_FUNC(getenv)
 EXPORT_FUNC(setenv)
 EXPORT_FUNC(simple_strtoul)
include/command.h +2 -1
index 8310fe5..0a1a462 100644
@@ -99,7 +99,8 @@ extern int cmd_get_data_size(char* arg, int default_size);
 extern int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 #endif
 extern int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+
+extern int system_reset(void);
 
 #endif	/* __ASSEMBLY__ */
include/configs/VoVPN-GW.h +0 -3
index c06909f..796c9a0 100644
@@ -47,9 +47,6 @@
 /* have reset_phy_r() function */
 #define CONFIG_RESET_PHY_R		1
 
-/* have special reset function */
-#define	CONFIG_HAVE_OWN_RESET		1
-
 /* allow serial and ethaddr to be overwritten */
 #define	CONFIG_ENV_OVERWRITE
include/configs/lwmon5.h +0 -1
index a1ead70..a8c6348 100644
@@ -49,7 +49,6 @@
 #define CONFIG_BOARD_EARLY_INIT_R	/* Call board_early_init_r	*/
 #define CONFIG_BOARD_POSTCLK_INIT	/* Call board_postclk_init	*/
 #define CONFIG_MISC_INIT_R		/* Call misc_init_r		*/
-#define CONFIG_BOARD_RESET		/* Call board_reset		*/
 
 /*
  * Base addresses -- Note these are effective addresses where the
include/configs/yosemite.h +0 -1
index 0cbef6f..1657d91 100644
@@ -51,7 +51,6 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f	*/
 #define CONFIG_MISC_INIT_R	1	/* call misc_init_r()		*/
-#define CONFIG_BOARD_RESET	1	/* call board_reset()		*/
 
 /*-----------------------------------------------------------------------
  * Base addresses -- Note these are effective addresses where the
lib/vsprintf.c +1 -1
index 61e6f0d..892ee42 100644
@@ -674,6 +674,6 @@ void panic(const char *fmt, ...)
 	hang();
 #else
 	udelay (100000);	/* allow messages to go out */
-	do_reset (NULL, 0, 0, NULL);
+	system_reset();
 #endif
 }
Signature · 1 line
1.7.2.3
author
#1 lore raw

PATCH v4 2/4 mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statements

The numeric constants in the switch statements are replaced by #defines added to the common ddr_spd.h header. This dramatically improves the readability of the switch statments.

In addition, a few of the longer lines were cleaned up, and the DDR2 type for an SO-RDIMM module was added to the DDR2 switch statement.

Signed-off-by Kyle Moffett <[email protected]>
Cc Andy Fleming <[email protected]>
Cc Kumar Gala <[email protected]>
Cc Kim Phillips <[email protected]>
Cc Wolfgang Denk <[email protected]>

---

Changelog:
v2: Moved the constants to include/ddr_spd.h and also fixed DDR3.
v3: No changes
v4: Fixed up excessively long lines

 arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c |   23 +++++++-----
 arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c |   43 ++++++++++------------
 common/ddr_spd.c                                |    2 +-
 include/ddr_spd.h                               |   28 ++++++++++-----
 4 files changed, 53 insertions(+), 43 deletions(-)
arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c +13 -10
index dcb37ce..b565e33 100644
@@ -250,24 +250,27 @@ ddr_compute_dimm_parameters(const ddr2_spd_eeprom_t *spd,
 	pdimm->primary_sdram_width = spd->primw;
 	pdimm->ec_sdram_width = spd->ecw;
 
-	/* FIXME: what about registered SO-DIMM? */
+	/* These are all the types defined by the JEDEC DDR2 SPD 1.3 spec */
 	switch (spd->dimm_type) {
-	case 0x01:	/* RDIMM */
-	case 0x10:	/* Mini-RDIMM */
-		pdimm->registered_dimm = 1; /* register buffered */
+	case DDR2_SPD_DIMMTYPE_RDIMM:
+	case DDR2_SPD_DIMMTYPE_72B_SO_RDIMM:
+	case DDR2_SPD_DIMMTYPE_MINI_RDIMM:
+		/* Registered/buffered DIMMs */
+		pdimm->registered_dimm = 1;
 		break;
 
-	case 0x02:	/* UDIMM */
-	case 0x04:	/* SO-DIMM */
-	case 0x08:	/* Micro-DIMM */
-	case 0x20:	/* Mini-UDIMM */
-		pdimm->registered_dimm = 0;	/* unbuffered */
+	case DDR2_SPD_DIMMTYPE_UDIMM:
+	case DDR2_SPD_DIMMTYPE_SO_DIMM:
+	case DDR2_SPD_DIMMTYPE_MICRO_DIMM:
+	case DDR2_SPD_DIMMTYPE_MINI_UDIMM:
+		/* Unbuffered DIMMs */
+		pdimm->registered_dimm = 0;
 		break;
 
+	case DDR2_SPD_DIMMTYPE_72B_SO_CDIMM:
 	default:
 		printf("unknown dimm_type 0x%02X\n", spd->dimm_type);
 		return 1;
-		break;
 	}
 
 	/* SDRAM device parameters */
arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c +20 -23

60 lines not on this page · raw message

common/ddr_spd.c +1 -1
index a7a30de..7a388bb 100644
@@ -18,7 +18,7 @@ spd_check(const u8 *buf, u8 spd_rev, u8 spd_cksum)
 
 	/*
 	 * Check SPD revision supported
-	 * Rev 1.2 or less supported by this code
+	 * Rev 1.X or less supported by this code
 	 */
 	if (spd_rev >= 0x20) {
 		printf("SPD revision %02X not supported by this code\n",
include/ddr_spd.h +19 -9
index 710e528..e895d61 100644
@@ -304,14 +304,24 @@ extern unsigned int ddr3_spd_check(const ddr3_spd_eeprom_t *spd);
 #define SPD_MEMTYPE_DDR2_FBDIMM_PROBE	(0x0A)
 #define SPD_MEMTYPE_DDR3	(0x0B)
 
-/*
- * Byte 3 Key Byte / Module Type for DDR3 SPD
- */
-#define SPD_MODULETYPE_RDIMM		(0x01)
-#define SPD_MODULETYPE_UDIMM		(0x02)
-#define SPD_MODULETYPE_SODIMM		(0x03)
-#define SPD_MODULETYPE_MICRODIMM	(0x04)
-#define SPD_MODULETYPE_MINIRDIMM	(0x05)
-#define SPD_MODULETYPE_MINIUDIMM	(0x06)
+/* DIMM Type for DDR2 SPD (according to v1.3) */
+#define DDR2_SPD_DIMMTYPE_UNDEFINED	(0x00)
+#define DDR2_SPD_DIMMTYPE_RDIMM		(0x01)
+#define DDR2_SPD_DIMMTYPE_UDIMM		(0x02)
+#define DDR2_SPD_DIMMTYPE_SO_DIMM	(0x04)
+#define DDR2_SPD_DIMMTYPE_72B_SO_CDIMM	(0x06)
+#define DDR2_SPD_DIMMTYPE_72B_SO_RDIMM	(0x07)
+#define DDR2_SPD_DIMMTYPE_MICRO_DIMM	(0x08)
+#define DDR2_SPD_DIMMTYPE_MINI_RDIMM	(0x10)
+#define DDR2_SPD_DIMMTYPE_MINI_UDIMM	(0x20)
+
+/* Byte 3 Key Byte / Module Type for DDR3 SPD */
+#define DDR3_SPD_MODULETYPE_MASK	(0x0f)
+#define DDR3_SPD_MODULETYPE_RDIMM	(0x01)
+#define DDR3_SPD_MODULETYPE_UDIMM	(0x02)
+#define DDR3_SPD_MODULETYPE_SO_DIMM	(0x03)
+#define DDR3_SPD_MODULETYPE_MICRO_DIMM	(0x04)
+#define DDR3_SPD_MODULETYPE_MINI_RDIMM	(0x05)
+#define DDR3_SPD_MODULETYPE_MINI_UDIMM	(0x06)
 
 #endif /* _DDR_SPD_H_ */
Signature · 1 line
1.7.2.3
author
#2 lore raw

PATCH v4 3/4 mpc85xx: Add inline GPIO acessor functions

In reply to Kyle Moffett

To ease the implementation of other MPC85xx board ports, several common GPIO helpers are added to <asm/mpc85xx_gpio.h>.

Since each of these compiles to no more than 4-5 instructions it would be very inefficient to call them out of line, therefore we put them entirely in the header file.

The HWW-1U-1A board port which these were written for strongly prefers to set multiple GPIOs as a single batch operation, so the API is designed around that basis.

To assist other board ports, a small set of wrappers are used which provides a standard gpio_request() interface around the MPC85xx-specific functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO

Signed-off-by Kyle Moffett <[email protected]>
Cc Andy Fleming <[email protected]>
Cc Kumar Gala <[email protected]>
Cc Peter Tyser <[email protected]>

---
Changelog:
v2: Moved the inline functions to a non-board-specific header
v3: Added generic Linux-standard GPIO wrappers
v4: Improved comments and fixed minor bugs in the wrapper functions

 arch/powerpc/include/asm/mpc85xx_gpio.h |  120 +++++++++++++++++++++++++++++++
 1 files changed, 120 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/include/asm/mpc85xx_gpio.h
arch/powerpc/include/asm/mpc85xx_gpio.h new file +120 -0
new file mode 100644
index 0000000..ad54b4e
@@ -0,0 +1,120 @@
+/*
+ * Copyright 2010 eXMeritus, A Boeing Company
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/immap_85xx.h>
+
+/*
+ * The following internal functions are an MPC85XX-specific GPIO API which
+ * allows setting and querying multiple GPIOs in a single operation.
+ *
+ * All of these look relatively large, but the arguments are almost always
+ * constants, so they compile down to just a few instructions and a
+ * memory-mapped IO operation or two.
+ */
+static inline void mpc85xx_gpio_set(unsigned int mask,
+		unsigned int dir, unsigned int val)
+{
+	ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR + 0xc00);
+
+	/* First mask off the unwanted parts of "dir" and "val" */
+	dir &= mask;
+	val &= mask;
+
+	/* Now read in the values we're supposed to preserve */
+	dir |= (in_be32(&gpio->gpdir) & ~mask);
+	val |= (in_be32(&gpio->gpdat) & ~mask);
+
+	/*
+	 * Poke the new output values first, then set the direction.  This
+	 * helps to avoid transient data when switching from input to output
+	 * and vice versa.
+	 */
+	out_be32(&gpio->gpdat, val);
+	out_be32(&gpio->gpdir, dir);
+}
+
+static inline void mpc85xx_gpio_set_in(unsigned int gpios)
+{
+	mpc85xx_gpio_set(gpios, 0x00000000, 0x00000000);
+}
+
+static inline void mpc85xx_gpio_set_low(unsigned int gpios)
+{
+	mpc85xx_gpio_set(gpios, 0xFFFFFFFF, 0x00000000);
+}
+
+static inline void mpc85xx_gpio_set_high(unsigned int gpios)
+{
+	mpc85xx_gpio_set(gpios, 0xFFFFFFFF, 0xFFFFFFFF);
+}
+
+static inline unsigned int mpc85xx_gpio_get(unsigned int mask)
+{
+	ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR + 0xc00);
+
+	/* Read the requested values */
+	return in_be32(&gpio->gpdat) & mask;
+}
+
+/*
+ * These implement the generic Linux GPIO API on top of the other functions
+ * in this header.
+ */
+#ifdef CONFIG_MPC85XX_GENERIC_GPIO
+static inline int gpio_request(unsigned gpio, const char *label)
+{
+	/* Compatibility shim */
+	return 0;
+}
+
+static inline void gpio_free(unsigned gpio)
+{
+	/* Compatibility shim */
+}
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+	mpc85xx_gpio_set_in(1U << gpio);
+	return 0;
+}
+
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+	mpc85xx_gpio_set_low(1U << gpio);
+	return 0;
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+	return !!mpc85xx_gpio_get(1U << gpio)
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+	if (value)
+		mpc85xx_gpio_set_high(1U << gpio);
+	else
+		mpc85xx_gpio_set_low(1U << gpio);
+}
+
+static inline int gpio_is_valid(int gpio)
+{
+	return (gpio >= 0) && (gpio < 32);
+}
+#endif /* CONFIG_MPC85XX_GENERIC_GPIO */
Signature · 1 line
1.7.2.3
author
#3 lore raw

PATCH v4 4/4 mpc85xx: Add board support for the eXMeritus HWW-1U-1A devices

In reply to Kyle Moffett

The eXMeritus HWW-1U-1A unit is a DO-160-certified 13lb 1U chassis with 3 independent TEMPEST zones. Two independent P2020 computers may be found inside each zone. Complete hardware support is included.

High-level hardware overview:
* DO-160 certified for passenger aircraft (noncritical)
* TEMPEST ceritified for RED/BLACK separation
* 3 zones per chassis, 2 computers per zone (total of 6)
* Dual-core 1.066GHz P2020 per computer
* One 2GB DDR2 SO-RDIMM module per computer (upgradable to 4GB)
* Removable 80GB or 160GB Intel X18-M SSD per computer
* Front-accessible dual-port E1000E per computer
* Front-accessible serial console per computer
* Front-accessible USB port per computer
* Internal Gigabit crossover within each TEMPEST zone
* Internal unidirectional fiber links across TEMPEST zones
* Battery-backed DS1339 I2C RTC on each CPU.

Combined, each 13lb 1U chassis contains 12GB RAM, 12 cores @ 1.066GHz, 12 front-accessible Gigabit Ethernet ports and 960GB of solid-state storage with a total power consumption of ~200W.

Additional notes:
* SPD detection is only known to work with the DO-160-certified DIMMs

* A U-Boot built with 36-bit address-space seems to work, but I don't yet have a usable 36-bit kernel or DTB, so it's mostly untested.

* CPU reset is a little quirky due to hardware misfeature, see the extensive comments in the board_reset() function in hww1u1a.c

Signed-off-by Kyle Moffett <[email protected]>
Cc Andy Fleming <[email protected]>
Cc Kumar Gala <[email protected]>
---
 MAINTAINERS                       |    4 +
 board/exmeritus/hww1u1a/Makefile  |   54 ++++
 board/exmeritus/hww1u1a/ddr.c     |   51 ++++
 board/exmeritus/hww1u1a/gpios.h   |   67 +++++
 board/exmeritus/hww1u1a/hww1u1a.c |  549 +++++++++++++++++++++++++++++++++++++
 board/exmeritus/hww1u1a/law.c     |   34 +++
 board/exmeritus/hww1u1a/tlb.c     |  106 +++++++
 boards.cfg                        |    2 +
 include/configs/HWW1U1A.h         |  474 ++++++++++++++++++++++++++++++++
 9 files changed, 1341 insertions(+), 0 deletions(-)
 create mode 100644 board/exmeritus/hww1u1a/Makefile
 create mode 100644 board/exmeritus/hww1u1a/ddr.c
 create mode 100644 board/exmeritus/hww1u1a/gpios.h
 create mode 100644 board/exmeritus/hww1u1a/hww1u1a.c
 create mode 100644 board/exmeritus/hww1u1a/law.c
 create mode 100644 board/exmeritus/hww1u1a/tlb.c
 create mode 100644 include/configs/HWW1U1A.h
MAINTAINERS +4 -0
index 07541bd..5da7c1f 100644
@@ -320,6 +320,10 @@ Reinhard Meyer <[email protected]>
 	TOP5200		MPC5200
 	TOP9000		ARM926EJS (AT91SAM9xxx SoC)
 
+Kyle Moffett <[email protected]>
+
+	HWW1U1A		P2020
+
 Tolunay Orkun <[email protected]>
 
 	csb272		PPC405GP
board/exmeritus/hww1u1a/Makefile new file +54 -0

54 lines not on this page · raw message

board/exmeritus/hww1u1a/ddr.c new file +51 -0

51 lines not on this page · raw message

board/exmeritus/hww1u1a/gpios.h new file +67 -0

67 lines not on this page · raw message

board/exmeritus/hww1u1a/hww1u1a.c new file +549 -0

549 lines not on this page · raw message

board/exmeritus/hww1u1a/law.c new file +34 -0
new file mode 100644
index 0000000..1281c56
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, [email protected].
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fsl_law.h>
+#include <asm/mmu.h>
+
+struct law_entry law_table[] = {
+	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);
board/exmeritus/hww1u1a/tlb.c new file +106 -0

106 lines not on this page · raw message

boards.cfg +2 -0
index 9b34287..3cacb9c 100644
@@ -459,6 +459,8 @@ sbc8560                      powerpc     mpc85xx     sbc8560             -
 sbc8560_33                   powerpc     mpc85xx     sbc8560             -              -           sbc8560
 sbc8560_66                   powerpc     mpc85xx     sbc8560             -              -           sbc8560
 socrates                     powerpc     mpc85xx     socrates
+HWW1U1A                      powerpc     mpc85xx     hww1u1a             exmeritus
+HWW1U1A_36BIT                powerpc     mpc85xx     hww1u1a             exmeritus      -           HWW1U1A:36BIT
 MPC8536DS                    powerpc     mpc85xx     mpc8536ds           freescale      -           MPC8536DS
 MPC8536DS_36BIT              powerpc     mpc85xx     mpc8536ds           freescale      -           MPC8536DS:36BIT
 MPC8536DS_NAND               powerpc     mpc85xx     mpc8536ds           freescale      -           MPC8536DS:NAND
include/configs/HWW1U1A.h new file +474 -0

474 lines not on this page · raw message

Signature · 1 line
1.7.2.3
#4 lore raw

PATCH v4 1/4 Refactor do_reset() into board-specific and CPU-specific portions

In reply to Kyle Moffett

common/cmd_boot.c int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) · line 71

Quoted 4 lines · On Wednesday, February 23, 2011 14:28:44 Kyle Moffett wrote:
common/cmd_boot.c +4 -0
+__attribute__((__weak__)) int arch_reset(void)
+{
+	return 0;
+}

is there any cpu which wouldnt provide arch_reset() ? i dont think it was possible in the past to do this, so i dont see any value in supporting this.

Quoted 1 line

+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

static
-mike
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#5 lore raw

PATCH v4 1/4 Refactor do_reset() into board-specific and CPU-specific portions

Quoted 8 lines · Mike Frysinger

common/cmd_boot.c int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) · line 71

Quoted 4 lines · On Wednesday, February 23, 2011 14:28:44 Kyle Moffett wrote:
common/cmd_boot.c +4 -0
+__attribute__((__weak__)) int arch_reset(void)
+{
+	return 0;
+}

is there any cpu which wouldnt provide arch_reset() ? i dont think it was possible in the past to do this, so i dont see any value in supporting this.

Hmm, good point.

Although, I think there are a few CPUs which fundamentally cannot reset on their own (they rely on external board-specific hardware triggered by GPIOs).

Perhaps the default should instead be something like this?

  __attribute__((__weak__)) int arch_reset(void)
  {
          while(1);
  }

Having a default might make it easier to do the initial standup of a new CPU type (less code to write initially), but you wouldn't get any obvious errors about the fact that you are missing functionality.

I can't really form enough of an opinion to care either way, so if you have any strong preferences please let me know.

Thanks for the review!

Cheers,
Kyle Moffett

#6 lore raw

PATCH v4 1/4 Refactor do_reset() into board-specific and CPU-specific portions

Dear "Moffett, Kyle D",

Quoted 7 lines · In message <[email protected]> you wrote:

Perhaps the default should instead be something like this?

  __attribute__((__weak__)) int arch_reset(void)
  {
          while(1);
  }

No. Please don;t implement something that does not do what it is supposed to do. Rather make the problem obvious.

Quoted 3 lines

Having a default might make it easier to do the initial standup of a new CPU type (less code to write initially), but you wouldn't get any obvious errors about the fact that you are missing functionality.

That's a fundamentally broken approach. You know how people work:
they start, they have something running without too blatant error messages, they leave it as is and go on to the next task.

I rather see a clear unresolved external reference error instead of a bad defualt that doesn't work.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"There is no distinctly American criminal class except Congress."
- Mark Twain
#7 lore raw

PATCH v4 1/4 Refactor do_reset() into board-specific and CPU-specific portions

Quoted 16 lines · Wolfgang Denk
Quoted 7 lines · In message <[email protected]> you wrote:

Perhaps the default should instead be something like this?

__attribute__((__weak__)) int arch_reset(void)

{
        while(1);
}

No. Please don;t implement something that does not do what it is supposed to do. Rather make the problem obvious.

Quoted 3 lines

Having a default might make it easier to do the initial standup of a new CPU type (less code to write initially), but you wouldn't get any obvious errors about the fact that you are missing functionality.

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That's a fundamentally broken approach. You know how people work:
they start, they have something running without too blatant error messages, they leave it as is and go on to the next task.

I rather see a clear unresolved external reference error instead of a bad defualt that doesn't work.

Ok, I'm working on an updated patch.

There are a few CPU architectures like the 74xx_7xx which have worrying comments like these:
/* no generic way to do board reset. simply call soft_reset. */

It basically just disables caching and performs a jump to the CPU reset vector.

Several boards already have overrides of various sorts to use board-specific reset vectors; from looking at commit logs and configuration for the boards based on the 74xx and 7xx I'm not convinced that reset function has ever been tested on some of them.

I would almost be willing to argue that if that kind of "soft reset" is a desirable feature then U-Boot should support it separately via a "kexec()"-style interface.

Anyways, I should be sending out a new patch here shortly.

Cheers,
Kyle Moffett