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ARM: kernel/sleep.S: fix Thumb2 compilation issues

PATCH New Nicolas Pitre 4 participants 4 messages Mar 19, 2011 – Mar 26, 2011 Arm (32-bit)

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Nicolas Pitre

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#0 lore raw

PATCH 1/1 ARM: kernel/sleep.S: fix Thumb2 compilation issues

Signed-off-by Nicolas Pitre <[email protected]>
arch/arm/kernel/sleep.S +11 -3
index bfad698..6398ead 100644
@@ -119,11 +119,19 @@ ENTRY(cpu_resume)
 #else
 	ldr	r0, sleep_save_sp	@ stack phys addr
 #endif
-	msr	cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
+	setmode	PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set SVC, irqs off
 #ifdef MULTI_CPU
-	ldmia	r0!, {r1, sp, lr, pc}	@ load v:p, stack, return fn, resume fn
+	@ load v:p, stack, return fn, resume fn
+  ARM(	ldmia	r0!, {r1, sp, lr, pc}	)
+THUMB(	ldmia	r0!, {r1, r2, r3, r4}	)
+THUMB(	mov	sp, r2			)
+THUMB(	mov	lr, r3			)
+THUMB(	bx	r4			)
 #else
-	ldmia	r0!, {r1, sp, lr}	@ load v:p, stack, return fn
+	@ load v:p, stack, return fn
+  ARM(	ldmia	r0!, {r1, sp, lr}	)
+THUMB(	ldmia	r0!, {r1, r2, lr}	)
+THUMB(	mov	sp, r2			)
 	b	cpu_do_resume
 #endif
 ENDPROC(cpu_resume)
#1 lore raw

PATCH 1/1 ARM: kernel/sleep.S: fix Thumb2 compilation issues

Quoted 20 lines · Nicolas Pitre
Signed-off-by Nicolas Pitre <[email protected]>
arch/arm/kernel/sleep.S +6 -2
index bfad698..6398ead 100644
@@ -119,11 +119,19 @@ ENTRY(cpu_resume)
 #else
 	ldr	r0, sleep_save_sp	@ stack phys addr
 #endif
-	msr	cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
+	setmode	PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set SVC, irqs off
 #ifdef MULTI_CPU
-	ldmia	r0!, {r1, sp, lr, pc}	@ load v:p, stack, return fn, resume fn
+	@ load v:p, stack, return fn, resume fn
+  ARM(	ldmia	r0!, {r1, sp, lr, pc}	)
+THUMB(	ldmia	r0!, {r1, r2, r3, r4}	)
+THUMB(	mov	sp, r2			)
+THUMB(	mov	lr, r3			)

arch/arm/kernel/sleep.S ENTRY(cpu_resume) · line 137

Quoted 10 lines
arch/arm/kernel/sleep.S +5 -1
+THUMB(	bx	r4			)
 #else
-	ldmia	r0!, {r1, sp, lr}	@ load v:p, stack, return fn
+	@ load v:p, stack, return fn
+  ARM(	ldmia	r0!, {r1, sp, lr}	)
+THUMB(	ldmia	r0!, {r1, r2, lr}	)
+THUMB(	mov	sp, r2			)
 	b	cpu_do_resume
 #endif
 ENDPROC(cpu_resume)

As far as I can determine from the context, r1-r4 are not live at this point, so the suggested change looks sound.

Reviewed-by Dave Martin <[email protected]>

I haven't watched the generic suspend/resume discussion too closely; how would I go about testing this?

Cheers
---Dave

#2 lore raw

PATCH 1/1 ARM: kernel/sleep.S: fix Thumb2 compilation issues

In reply to Nicolas Pitre
Quoted 20 lines · Nicolas Pitre
Signed-off-by Nicolas Pitre <[email protected]>
arch/arm/kernel/sleep.S +6 -2
index bfad698..6398ead 100644
@@ -119,11 +119,19 @@ ENTRY(cpu_resume)
 #else
 	ldr	r0, sleep_save_sp	@ stack phys addr
 #endif
-	msr	cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
+	setmode	PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set SVC, irqs off
 #ifdef MULTI_CPU
-	ldmia	r0!, {r1, sp, lr, pc}	@ load v:p, stack, return fn, resume fn
+	@ load v:p, stack, return fn, resume fn
+  ARM(	ldmia	r0!, {r1, sp, lr, pc}	)
+THUMB(	ldmia	r0!, {r1, r2, r3, r4}	)
+THUMB(	mov	sp, r2			)
+THUMB(	mov	lr, r3			)

arch/arm/kernel/sleep.S ENTRY(cpu_resume) · line 137

Quoted 10 lines
arch/arm/kernel/sleep.S +5 -1
+THUMB(	bx	r4			)
 #else
-	ldmia	r0!, {r1, sp, lr}	@ load v:p, stack, return fn
+	@ load v:p, stack, return fn
+  ARM(	ldmia	r0!, {r1, sp, lr}	)
+THUMB(	ldmia	r0!, {r1, r2, lr}	)
+THUMB(	mov	sp, r2			)
 	b	cpu_do_resume
 #endif
 ENDPROC(cpu_resume)

Do we know whether boot loaders support calling the resume path in Thumb mode, and is the necessary setup in place for telling boot loaders that they are to call the resume path in Thumb mode?

#3 lore raw

PATCH 1/1 ARM: kernel/sleep.S: fix Thumb2 compilation issues

Quoted 27 lines · Russell King - ARM Linux
Quoted 26 lines · Nicolas Pitre
Signed-off-by Nicolas Pitre <[email protected]>
arch/arm/kernel/sleep.S +10 -3
index bfad698..6398ead 100644
@@ -119,11 +119,19 @@ ENTRY(cpu_resume)
 #else
 	ldr	r0, sleep_save_sp	@ stack phys addr
 #endif
-	msr	cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
+	setmode	PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set SVC, irqs off
 #ifdef MULTI_CPU
-	ldmia	r0!, {r1, sp, lr, pc}	@ load v:p, stack, return fn, resume fn
+	@ load v:p, stack, return fn, resume fn
+  ARM(	ldmia	r0!, {r1, sp, lr, pc}	)
+THUMB(	ldmia	r0!, {r1, r2, r3, r4}	)
+THUMB(	mov	sp, r2			)
+THUMB(	mov	lr, r3			)
+THUMB(	bx	r4			)
 #else
-	ldmia	r0!, {r1, sp, lr}	@ load v:p, stack, return fn
+	@ load v:p, stack, return fn
+  ARM(	ldmia	r0!, {r1, sp, lr}	)
+THUMB(	ldmia	r0!, {r1, r2, lr}	)
Quoted 8 lines

arch/arm/kernel/sleep.S ENTRY(cpu_resume) · line 137

Quoted 4 lines
arch/arm/kernel/sleep.S +1 -0
+THUMB(	mov	sp, r2			)
 	b	cpu_do_resume
 #endif
 ENDPROC(cpu_resume)

Do we know whether boot loaders support calling the resume path in Thumb mode, and is the necessary setup in place for telling boot loaders that they are to call the resume path in Thumb mode?

Hard to tell for sure without testing. But in theory, if the bootloader is passed the value of the cpu_resume symbol, even after going through virt_to_phys(), then bit 0 should be set indicating Thumb mode and therefore it ought to work correctly by simply loading that value into the pc (not true for ARMv6T2 but we don't support any of those).

Nicolas