scic: remove mmio wrappers

Index: linux-2.6/drivers/scsi/isci/core/scic_sds_controller.c
===================================================================
@@ -59,8 +59,7 @@
 #include "scic_port.h"
 #include "scic_remote_device.h"
 #include "scic_sds_controller.h"
-#include "scic_sds_controller_registers.h"
-#include "scic_sds_pci.h"
+#include "scu_registers.h"
 #include "scic_sds_phy.h"
 #include "scic_sds_port_configuration_agent.h"
 #include "scic_sds_port.h"

@@ -355,7 +354,10 @@ static void scic_sds_controller_ram_init
 	 * Therefore it no longer comes out of memory in the MDL. */
 	mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
 	this_controller->completion_queue = (u32 *)mde->virtual_address;
-	SMU_CQBAR_WRITE(this_controller, mde->physical_address);
+	writel(lower_32_bits(mde->physical_address), \
+		&this_controller->smu_registers->completion_queue_lower);
+	writel(upper_32_bits(mde->physical_address),
+		&this_controller->smu_registers->completion_queue_upper);
 
 	/*
 	 * Program the location of the Remote Node Context table

@@ -363,13 +365,19 @@ static void scic_sds_controller_ram_init
 	mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
 	this_controller->remote_node_context_table = (union scu_remote_node_context *)
 						     mde->virtual_address;
-	SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
+	writel(lower_32_bits(mde->physical_address),
+		&this_controller->smu_registers->remote_node_context_lower);
+	writel(upper_32_bits(mde->physical_address),
+		&this_controller->smu_registers->remote_node_context_upper);
 
 	/* Program the location of the Task Context table into the SCU. */
 	mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
 	this_controller->task_context_table = (struct scu_task_context *)
 					      mde->virtual_address;
-	SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
+	writel(lower_32_bits(mde->physical_address),
+		&this_controller->smu_registers->host_task_table_lower);
+	writel(upper_32_bits(mde->physical_address),
+		&this_controller->smu_registers->host_task_table_upper);
 
 	mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
 	scic_sds_unsolicited_frame_control_construct(

@@ -378,13 +386,17 @@ static void scic_sds_controller_ram_init
 
 	/*
 	 * Inform the silicon as to the location of the UF headers and
-	 * address table. */
-	SCU_UFHBAR_WRITE(
-		this_controller,
-		this_controller->uf_control.headers.physical_address);
-	SCU_PUFATHAR_WRITE(
-		this_controller,
-		this_controller->uf_control.address_table.physical_address);
+	 * address table.
+	 */
+	writel(lower_32_bits(this_controller->uf_control.headers.physical_address),
+		&this_controller->scu_registers->sdma.uf_header_base_address_lower);
+	writel(upper_32_bits(this_controller->uf_control.headers.physical_address),
+		&this_controller->scu_registers->sdma.uf_header_base_address_upper);
+
+	writel(lower_32_bits(this_controller->uf_control.address_table.physical_address),
+		&this_controller->scu_registers->sdma.uf_address_table_lower);
+	writel(upper_32_bits(this_controller->uf_control.address_table.physical_address),
+		&this_controller->scu_registers->sdma.uf_address_table_upper);
 }
 
 /**

@@ -392,25 +404,26 @@ static void scic_sds_controller_ram_init
  * @this_controller:
  *
  */
-static void scic_sds_controller_assign_task_entries(
-	struct scic_sds_controller *this_controller)
+static void
+scic_sds_controller_assign_task_entries(struct scic_sds_controller *controller)
 {
 	u32 task_assignment;
 
 	/*
 	 * Assign all the TCs to function 0
-	 * TODO: Do we actually need to read this register to write it back? */
-	task_assignment = SMU_TCA_READ(this_controller, 0);
+	 * TODO: Do we actually need to read this register to write it back?
+	 */
 
 	task_assignment =
-		(
-			task_assignment
-			| (SMU_TCA_GEN_VAL(STARTING, 0))
-			| (SMU_TCA_GEN_VAL(ENDING,  this_controller->task_context_entries - 1))
-			| (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
-		);
+		readl(&controller->smu_registers->task_context_assignment[0]);
+
+	task_assignment |= (SMU_TCA_GEN_VAL(STARTING, 0)) |
+		(SMU_TCA_GEN_VAL(ENDING,  controller->task_context_entries - 1)) |
+		(SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE));
+
+	writel(task_assignment,
+		&controller->smu_registers->task_context_assignment[0]);
 
-	SMU_TCA_WRITE(this_controller, 0, task_assignment);
 }
 
 /**

@@ -433,7 +446,9 @@ static void scic_sds_controller_initiali
 		| SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
 		);
 
-	SMU_CQC_WRITE(this_controller, completion_queue_control_value);
+	writel(completion_queue_control_value,
+		&this_controller->smu_registers->completion_queue_control);
+
 
 	/* Set the completion queue get pointer and enable the queue */
 	completion_queue_get_value = (

@@ -443,7 +458,8 @@ static void scic_sds_controller_initiali
 		| (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
 		);
 
-	SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
+	writel(completion_queue_get_value,
+		&this_controller->smu_registers->completion_queue_get);
 
 	/* Set the completion queue put pointer */
 	completion_queue_put_value = (

@@ -451,7 +467,9 @@ static void scic_sds_controller_initiali
 		| (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
 		);
 
-	SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
+	writel(completion_queue_put_value,
+		&this_controller->smu_registers->completion_queue_put);
+
 
 	/* Initialize the cycle bit of the completion queue entries */
 	for (index = 0; index < this_controller->completion_queue_entries; index++) {

@@ -479,7 +497,8 @@ static void scic_sds_controller_initiali
 	frame_queue_control_value =
 		SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
 
-	SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
+	writel(frame_queue_control_value,
+		&this_controller->scu_registers->sdma.unsolicited_frame_queue_control);
 
 	/* Setup the get pointer for the unsolicited frame queue */
 	frame_queue_get_value = (

@@ -487,12 +506,12 @@ static void scic_sds_controller_initiali
 		|  SCU_UFQGP_GEN_BIT(ENABLE_BIT)
 		);
 
-	SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
-
+	writel(frame_queue_get_value,
+		&this_controller->scu_registers->sdma.unsolicited_frame_get_pointer);
 	/* Setup the put pointer for the unsolicited frame queue */
 	frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
-
-	SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
+	writel(frame_queue_put_value,
+		&this_controller->scu_registers->sdma.unsolicited_frame_put_pointer);
 }
 
 /**

@@ -505,12 +524,12 @@ static void scic_sds_controller_enable_p
 {
 	u32 port_task_scheduler_value;
 
-	port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
-
+	port_task_scheduler_value =
+		readl(&this_controller->scu_registers->peg0.ptsg.control);
 	port_task_scheduler_value |=
 		(SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
-
-	SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
+	writel(port_task_scheduler_value,
+		&this_controller->scu_registers->peg0.ptsg.control);
 }
 
 /**

@@ -531,35 +550,34 @@ static void scic_sds_controller_afe_init
 	u32 phy_id;
 
 	/* Clear DFX Status registers */
-	scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
+	writel(0x0081000f, &scic->scu_registers->afe.afe_dfx_master_control0);
 	udelay(AFE_REGISTER_WRITE_DELAY);
 
 	/* Configure bias currents to normal */
 	if (is_a0())
-		scu_afe_register_write(scic, afe_bias_control, 0x00005500);
+		writel(0x00005500, &scic->scu_registers->afe.afe_bias_control);
 	else
-		scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
+		writel(0x00005A00, &scic->scu_registers->afe.afe_bias_control);
 
 	udelay(AFE_REGISTER_WRITE_DELAY);
 
 	/* Enable PLL */
 	if (is_b0())
-		scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
+		writel(0x80040A08, &scic->scu_registers->afe.afe_pll_control0);
 	else
-		scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
+		writel(0x80040908, &scic->scu_registers->afe.afe_pll_control0);
 
 	udelay(AFE_REGISTER_WRITE_DELAY);
 
 	/* Wait for the PLL to lock */
 	do {
-		afe_status = scu_afe_register_read(
-			scic, afe_common_block_status);
+		afe_status = readl(&scic->scu_registers->afe.afe_common_block_status);
 		udelay(AFE_REGISTER_WRITE_DELAY);
 	} while ((afe_status & 0x00001000) == 0);
 
 	if (is_b0()) {
 		/* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
-		scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
+		writel(0x7bcc96ad, &scic->scu_registers->afe.afe_pmsn_master_control0);
 		udelay(AFE_REGISTER_WRITE_DELAY);
 	}
 

@@ -568,16 +586,16 @@ static void scic_sds_controller_afe_init
 
 		if (is_b0()) {
 			 /* Configure transmitter SSC parameters */
-			scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
+			writel(0x00030000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
 			udelay(AFE_REGISTER_WRITE_DELAY);
 		} else {
 			/*
 			 * All defaults, except the Receive Word Alignament/Comma Detect
 			 * Enable....(0xe800) */
-			scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
+			writel(0x00004512, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
 			udelay(AFE_REGISTER_WRITE_DELAY);
 
-			scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
+			writel(0x0050100F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control1);
 			udelay(AFE_REGISTER_WRITE_DELAY);
 		}
 

@@ -585,61 +603,65 @@ static void scic_sds_controller_afe_init
 		 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 		 * & increase TX int & ext bias 20%....(0xe85c) */
 		if (is_a0())
-			scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
+			writel(0x000003D4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
 		else if (is_a2())
-			scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
+			writel(0x000003F0, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
 		else {
 			 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
-			scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
+			writel(0x000003d7, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
 			udelay(AFE_REGISTER_WRITE_DELAY);
 
 			/*
 			 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 			 * & increase TX int & ext bias 20%....(0xe85c) */
-			scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
+			writel(0x000003d4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
 		}
 		udelay(AFE_REGISTER_WRITE_DELAY);
 
 		if (is_a0() || is_a2()) {
 			/* Enable TX equalization (0xe824) */
-			scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
+			writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
 			udelay(AFE_REGISTER_WRITE_DELAY);
 		}
 
 		/*
 		 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
 		 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
-		scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
+		writel(0x00004100, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
 		udelay(AFE_REGISTER_WRITE_DELAY);
 
 		/* Leave DFE/FFE on */
 		if (is_a0())
-			scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
+			writel(0x3F09983F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
 		else if (is_a2())
-			scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
+			writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
 		else {
-			scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
+			writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
 			udelay(AFE_REGISTER_WRITE_DELAY);
 			/* Enable TX equalization (0xe824) */
-			scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
+			writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
 		}
 		udelay(AFE_REGISTER_WRITE_DELAY);
 
-		scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control0);
+		writel(oem_phy->afe_tx_amp_control0,
+			&scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control0);
 		udelay(AFE_REGISTER_WRITE_DELAY);
 
-		scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control1);
+		writel(oem_phy->afe_tx_amp_control1,
+			&scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control1);
 		udelay(AFE_REGISTER_WRITE_DELAY);
 
-		scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control2);
+		writel(oem_phy->afe_tx_amp_control2,
+			&scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control2);
 		udelay(AFE_REGISTER_WRITE_DELAY);
 
-		scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control3);
+		writel(oem_phy->afe_tx_amp_control3,
+			&scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control3);
 		udelay(AFE_REGISTER_WRITE_DELAY);
 	}
 
 	/* Transfer control to the PEs */
-	scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
+	writel(0x00010f00, &scic->scu_registers->afe.afe_dfx_master_control0);
 	udelay(AFE_REGISTER_WRITE_DELAY);
 }
 

@@ -1437,8 +1459,9 @@ static void scic_sds_controller_process_
 			| event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
 			| get_cycle   | SMU_CQGR_GEN_VAL(POINTER, get_index);
 
-		SMU_CQGR_WRITE(this_controller,
-			       this_controller->completion_queue_get);
+		writel(this_controller->completion_queue_get,
+			&this_controller->smu_registers->completion_queue_get);
+
 	}
 
 	dev_dbg(scic_to_dev(this_controller),

@@ -1456,15 +1479,15 @@ bool scic_sds_controller_isr(struct scic
 		/*
 		 * we have a spurious interrupt it could be that we have already
 		 * emptied the completion queue from a previous interrupt */
-		SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
+		writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
 
 		/*
 		 * There is a race in the hardware that could cause us not to be notified
 		 * of an interrupt completion if we do not take this step.  We will mask
 		 * then unmask the interrupts so if there is another interrupt pending
 		 * the clearing of the interrupt source we get the next interrupt message. */
-		SMU_IMR_WRITE(scic, 0xFF000000);
-		SMU_IMR_WRITE(scic, 0x00000000);
+		writel(0xFF000000, &scic->smu_registers->interrupt_mask);
+		writel(0, &scic->smu_registers->interrupt_mask);
 	}
 
 	return false;

@@ -1477,18 +1500,18 @@ void scic_sds_controller_completion_hand
 		scic_sds_controller_process_completions(scic);
 
 	/* Clear the interrupt and enable all interrupts again */
-	SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
+	writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
 	/* Could we write the value of SMU_ISR_COMPLETION? */
-	SMU_IMR_WRITE(scic, 0xFF000000);
-	SMU_IMR_WRITE(scic, 0x00000000);
+	writel(0xFF000000, &scic->smu_registers->interrupt_mask);
+	writel(0, &scic->smu_registers->interrupt_mask);
 }
 
 bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
 {
 	u32 interrupt_status;
 
-	interrupt_status = SMU_ISR_READ(scic);
-
+	interrupt_status =
+		readl(&scic->smu_registers->interrupt_status);
 	interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
 
 	if (interrupt_status != 0) {

@@ -1504,8 +1527,8 @@ bool scic_sds_controller_error_isr(struc
 	 * then unmask the error interrupts so if there was another interrupt
 	 * pending we will be notified.
 	 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
-	SMU_IMR_WRITE(scic, 0x000000FF);
-	SMU_IMR_WRITE(scic, 0x00000000);
+	writel(0xff, &scic->smu_registers->interrupt_mask);
+	writel(0, &scic->smu_registers->interrupt_mask);
 
 	return false;
 }

@@ -1514,14 +1537,14 @@ void scic_sds_controller_error_handler(s
 {
 	u32 interrupt_status;
 
-	interrupt_status = SMU_ISR_READ(scic);
+	interrupt_status =
+		readl(&scic->smu_registers->interrupt_status);
 
 	if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
 	    scic_sds_controller_completion_queue_has_entries(scic)) {
 
 		scic_sds_controller_process_completions(scic);
-		SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
-
+		writel(SMU_ISR_QUEUE_SUSPEND, &scic->smu_registers->interrupt_status);
 	} else {
 		dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
 			interrupt_status);

@@ -1535,7 +1558,7 @@ void scic_sds_controller_error_handler(s
 	/* If we dont process any completions I am not sure that we want to do this.
 	 * We are in the middle of a hardware fault and should probably be reset.
 	 */
-	SMU_IMR_WRITE(scic, 0x00000000);
+	writel(0, &scic->smu_registers->interrupt_mask);
 }
 
 

@@ -1648,7 +1671,7 @@ void scic_sds_controller_post_request(
 		this_controller,
 		request);
 
-	SMU_PCP_WRITE(this_controller, request);
+	writel(request, &this_controller->smu_registers->post_context_port);
 }
 
 /**

@@ -1871,7 +1894,8 @@ void scic_sds_controller_release_frame(
 {
 	if (scic_sds_unsolicited_frame_control_release_frame(
 		    &this_controller->uf_control, frame_index) == true)
-		SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
+		writel(this_controller->uf_control.get,
+			&this_controller->scu_registers->sdma.unsolicited_frame_get_pointer);
 }
 
 /**

@@ -2478,14 +2502,14 @@ void scic_controller_enable_interrupts(
 	struct scic_sds_controller *scic)
 {
 	BUG_ON(scic->smu_registers == NULL);
-	SMU_IMR_WRITE(scic, 0x00000000);
+	writel(0, &scic->smu_registers->interrupt_mask);
 }
 
 void scic_controller_disable_interrupts(
 	struct scic_sds_controller *scic)
 {
 	BUG_ON(scic->smu_registers == NULL);
-	SMU_IMR_WRITE(scic, 0xffffffff);
+	writel(0xffffffff, &scic->smu_registers->interrupt_mask);
 }
 
 static enum sci_status scic_controller_set_mode(

@@ -2543,16 +2567,16 @@ static void scic_sds_controller_reset_ha
 	scic_controller_disable_interrupts(scic);
 
 	/* Reset the SCU */
-	SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
+	writel(0xFFFFFFFF, &scic->smu_registers->soft_reset_control);
 
 	/* Delay for 1ms to before clearing the CQP and UFQPR. */
 	udelay(1000);
 
 	/* The write to the CQGR clears the CQP */
-	SMU_CQGR_WRITE(scic, 0x00000000);
+	writel(0x00000000, &scic->smu_registers->completion_queue_get);
 
 	/* The write to the UFQGP clears the UFQPR */
-	SCU_UFQGP_WRITE(scic, 0x00000000);
+	writel(0, &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
 }
 
 enum sci_status scic_user_parameters_set(

@@ -2778,11 +2802,10 @@ static enum sci_status scic_controller_s
 			return SCI_FAILURE_INVALID_PARAMETER_VALUE;
 	}
 
-	SMU_ICC_WRITE(
-		scic_controller,
-		(SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
-		 SMU_ICC_GEN_VAL(TIMER, timeout_encode))
-		);
+	writel(SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
+	       SMU_ICC_GEN_VAL(TIMER, timeout_encode),
+	       &scic_controller->smu_registers->interrupt_coalesce_control);
+
 
 	scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
 	scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;

@@ -2868,7 +2891,7 @@ static enum sci_status scic_sds_controll
 		u32 terminate_loop;
 
 		/* Take the hardware out of reset */
-		SMU_SMUSRCR_WRITE(scic, 0x00000000);
+		writel(0, &scic->smu_registers->soft_reset_control);
 
 		/*
 		 * / @todo Provide meaningfull error code for hardware failure

@@ -2879,7 +2902,7 @@ static enum sci_status scic_sds_controll
 		while (terminate_loop-- && (result != SCI_SUCCESS)) {
 			/* Loop until the hardware reports success */
 			udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
-			status = SMU_SMUCSR_READ(scic);
+			status = readl(&scic->smu_registers->control_status);
 
 			if ((status & SCU_RAM_INIT_COMPLETED) ==
 					SCU_RAM_INIT_COMPLETED)

@@ -2896,7 +2919,9 @@ static enum sci_status scic_sds_controll
 		/*
 		 * Determine what are the actaul device capacities that the
 		 * hardware will support */
-		device_context_capacity = SMU_DCC_READ(scic);
+		device_context_capacity =
+			readl(&scic->smu_registers->device_context_capacity);
+
 
 		max_supported_ports = smu_dcc_get_max_ports(device_context_capacity);
 		max_supported_devices = smu_dcc_get_max_remote_node_context(device_context_capacity);

@@ -2910,9 +2935,7 @@ static enum sci_status scic_sds_controll
 			struct scu_port_task_scheduler_group_registers *ptsg =
 				&scic->scu_registers->peg0.ptsg;
 
-			scu_register_write(scic,
-					   ptsg->protocol_engine[index],
-					   index);
+			writel(index, &ptsg->protocol_engine[index]);
 		}
 
 		/* Record the smaller of the two capacity values */

@@ -2939,16 +2962,20 @@ static enum sci_status scic_sds_controll
 		u32 dma_configuration;
 
 		/* Configure the payload DMA */
-		dma_configuration = SCU_PDMACR_READ(scic);
+		dma_configuration =
+			readl(&scic->scu_registers->sdma.pdma_configuration);
 		dma_configuration |=
 			SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
-		SCU_PDMACR_WRITE(scic, dma_configuration);
+		writel(dma_configuration,
+			&scic->scu_registers->sdma.pdma_configuration);
 
 		/* Configure the control DMA */
-		dma_configuration = SCU_CDMACR_READ(scic);
+		dma_configuration =
+			readl(&scic->scu_registers->sdma.cdma_configuration);
 		dma_configuration |=
 			SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
-		SCU_CDMACR_WRITE(scic, dma_configuration);
+		writel(dma_configuration,
+			&scic->scu_registers->sdma.cdma_configuration);
 	}
 
 	/*

Index: linux-2.6/drivers/scsi/isci/core/scic_sds_controller.h
===================================================================
@@ -57,6 +57,7 @@
 #define _SCIC_SDS_CONTROLLER_H_
 
 #include <linux/string.h>
+#include <linux/io.h>
 
 /**
  * This file contains the structures, constants and prototypes used for the

@@ -80,7 +81,6 @@
 #include "scu_unsolicited_frame.h"
 #include "scic_sds_unsolicited_frame_control.h"
 #include "scic_sds_port_configuration_agent.h"
-#include "scic_sds_pci.h"
 
 struct scic_sds_remote_device;
 struct scic_sds_request;

@@ -428,38 +428,6 @@ extern const struct scic_sds_controller_
 	(&(controller)->port_agent)
 
 /**
- * smu_register_write() -
- *
- * This macro writes to the smu_register for this controller
- */
-#define smu_register_write(controller, reg, value) \
-	scic_sds_pci_write_smu_dword((controller), &(reg), (value))
-
-/**
- * smu_register_read() -
- *
- * This macro reads the smu_register for this controller
- */
-#define smu_register_read(controller, reg) \
-	scic_sds_pci_read_smu_dword((controller), &(reg))
-
-/**
- * scu_register_write() -
- *
- * This mcaro writes the scu_register for this controller
- */
-#define scu_register_write(controller, reg, value) \
-	scic_sds_pci_write_scu_dword((controller), &(reg), (value))
-
-/**
- * scu_register_read() -
- *
- * This macro reads the scu_register for this controller
- */
-#define scu_register_read(controller, reg) \
-	scic_sds_pci_read_scu_dword((controller), &(reg))
-
-/**
  * scic_sds_controller_get_protocol_engine_group() -
  *
  * This macro returns the protocol engine group for this controller object.

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Index: linux-2.6/drivers/scsi/isci/core/scic_sds_request.c
===================================================================
@@ -62,8 +62,7 @@
 #include "scic_io_request.h"
 #include "scic_remote_device.h"
 #include "scic_sds_controller.h"
-#include "scic_sds_controller_registers.h"
-#include "scic_sds_pci.h"
+#include "scu_registers.h"
 #include "scic_sds_port.h"
 #include "scic_sds_remote_device.h"
 #include "scic_sds_request.h"

@@ -862,20 +861,16 @@ u32 scic_io_request_get_number_of_bytes_
 {
 	u32 ret_val = 0;
 
-	if (SMU_AMR_READ(scic_sds_request->owning_controller) == 0) {
+	if (readl(&scic_sds_request->owning_controller->smu_registers->address_modifier) == 0) {
 		/*
 		 * get the bytes of data from the Address == BAR1 + 20002Ch + (256*TCi) where
 		 *   BAR1 is the scu_registers
 		 *   0x20002C = 0x200000 + 0x2c
 		 *            = start of task context SRAM + offset of (type.ssp.data_offset)
 		 *   TCi is the io_tag of struct scic_sds_request */
-		ret_val =  scic_sds_pci_read_scu_dword(
-			scic_sds_request->owning_controller,
-			(
-				(u8 *)scic_sds_request->owning_controller->scu_registers +
+		ret_val = readl((u8 *)scic_sds_request->owning_controller->scu_registers +
 				(SCU_TASK_CONTEXT_SRAM + SCI_FIELD_OFFSET(struct scu_task_context, type.ssp.data_offset)) +
 				((sizeof(struct scu_task_context)) * scic_sds_io_tag_get_index(scic_sds_request->io_tag))
-			)
 			);
 	}
 

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Index: linux-2.6/drivers/scsi/isci/core/scic_sds_port.h
===================================================================
@@ -289,29 +289,6 @@ static inline void scic_sds_port_decreme
 		sci_port->started_request_count--;
 }
 
-/**
- * scic_sds_port_write_phy_assignment() -
- *
- * Helper macro to write the phys port assignment
- */
-#define scic_sds_port_write_phy_assignment(port, phy) \
-	SCU_PCSPExCR_WRITE(\
-		(port),	\
-		(phy)->phy_index, \
-		(port)->physical_port_index \
-		)
-
-/**
- * scic_sds_port_read_phy_assignment() -
- *
- * Helper macro to read the phys port assignment
- */
-#define scic_sds_port_read_phy_assignment(port, phy) \
-	SCU_PCSPExCR_READ(\
-		(port),	\
-		(phy)->phy_index \
-		)
-
 #define scic_sds_port_active_phy(port, phy) \
 	(((port)->active_phy_mask & (1 << (phy)->phy_index)) != 0)
 

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Index: linux-2.6/drivers/scsi/isci/core/scic_sds_unsolicited_frame_control.c
===================================================================
@@ -317,8 +317,8 @@ enum sci_status scic_sds_unsolicited_fra
  * This method returns an indication to the caller as to whether the
  * unsolicited frame get pointer should be updated. true This value indicates
  * the unsolicited frame get pointer should be updated (i.e. write
- * SCU_UFQGP_WRITE). false This value indicates the get pointer should not be
- * updated.
+ * scu_registers->sdma.unsolicited_frame_get_pointer).
+ * false This value indicates the get pointer should not be updated.
  */
 bool scic_sds_unsolicited_frame_control_release_frame(
 	struct scic_sds_unsolicited_frame_control *uf_control,

Index: linux-2.6/drivers/scsi/isci/core/sci_base_controller.h
===================================================================
@@ -1,304 +0,0 @@
-/*
- * This file is provided under a dual BSD/GPLv2 license.  When using or
- * redistributing this file, you may do so under either license.
- *
- * GPL LICENSE SUMMARY
- *
- * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- * The full GNU General Public License is included in this distribution
- * in the file called LICENSE.GPL.
- *
- * BSD LICENSE
- *
- * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *   * Redistributions of source code must retain the above copyright
- *     notice, this list of conditions and the following disclaimer.
- *   * Redistributions in binary form must reproduce the above copyright
- *     notice, this list of conditions and the following disclaimer in
- *     the documentation and/or other materials provided with the
- *     distribution.
- *   * Neither the name of Intel Corporation nor the names of its
- *     contributors may be used to endorse or promote products derived
- *     from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _SCI_BASE_CONTROLLER_H_
-#define _SCI_BASE_CONTROLLER_H_
-
-#include "intel_sas.h"
-#include "sci_controller_constants.h"
-#include "sci_base_state.h"
-#include "sci_base_memory_descriptor_list.h"
-#include "sci_base_state_machine.h"
-#include "sci_object.h"
-
-struct sci_base_memory_descriptor_list;
-
-/**
- * enum sci_base_controller_states - This enumeration depicts all the states
- *    for the common controller state machine.
- *
- *
- */
-enum sci_base_controller_states {
-	/**
-	 * Simply the initial state for the base controller state machine.
-	 */
-	SCI_BASE_CONTROLLER_STATE_INITIAL = 0,
-
-	/**
-	 * This state indicates that the controller is reset.  The memory for
-	 * the controller is in it's initial state, but the controller requires
-	 * initialization.
-	 * This state is entered from the INITIAL state.
-	 * This state is entered from the RESETTING state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_RESET,
-
-	/**
-	 * This state is typically an action state that indicates the controller
-	 * is in the process of initialization.  In this state no new IO operations
-	 * are permitted.
-	 * This state is entered from the RESET state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_INITIALIZING,
-
-	/**
-	 * This state indicates that the controller has been successfully
-	 * initialized.  In this state no new IO operations are permitted.
-	 * This state is entered from the INITIALIZING state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_INITIALIZED,
-
-	/**
-	 * This state indicates the the controller is in the process of becoming
-	 * ready (i.e. starting).  In this state no new IO operations are permitted.
-	 * This state is entered from the INITIALIZED state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_STARTING,
-
-	/**
-	 * This state indicates the controller is now ready.  Thus, the user
-	 * is able to perform IO operations on the controller.
-	 * This state is entered from the STARTING state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_READY,
-
-	/**
-	 * This state is typically an action state that indicates the controller
-	 * is in the process of resetting.  Thus, the user is unable to perform
-	 * IO operations on the controller.  A reset is considered destructive in
-	 * most cases.
-	 * This state is entered from the READY state.
-	 * This state is entered from the FAILED state.
-	 * This state is entered from the STOPPED state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_RESETTING,
-
-	/**
-	 * This state indicates that the controller is in the process of stopping.
-	 * In this state no new IO operations are permitted, but existing IO
-	 * operations are allowed to complete.
-	 * This state is entered from the READY state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_STOPPING,
-
-	/**
-	 * This state indicates that the controller has successfully been stopped.
-	 * In this state no new IO operations are permitted.
-	 * This state is entered from the STOPPING state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_STOPPED,
-
-	/**
-	 * This state indicates that the controller could not successfully be
-	 * initialized.  In this state no new IO operations are permitted.
-	 * This state is entered from the INITIALIZING state.
-	 * This state is entered from the STARTING state.
-	 * This state is entered from the STOPPING state.
-	 * This state is entered from the RESETTING state.
-	 */
-	SCI_BASE_CONTROLLER_STATE_FAILED,
-
-	SCI_BASE_CONTROLLER_MAX_STATES
-
-};
-
-/**
- * struct sci_base_controller - The base controller object abstracts the fields
- *    common to all SCI controller objects.
- *
- *
- */
-struct sci_base_controller {
-	/**
-	 * The field specifies that the parent object for the base controller
-	 * is the base object itself.
-	 */
-	struct sci_base_object parent;
-
-	/**
-	 * This field points to the memory descriptor list associated with this
-	 * controller.  The MDL indicates the memory requirements necessary for
-	 * this controller object.
-	 */
-	struct sci_base_memory_descriptor_list mdl;
-
-	/**
-	 * This field contains the information for the base controller state
-	 * machine.
-	 */
-	struct sci_base_state_machine state_machine;
-};
-
-/* Forward declarations */
-struct sci_base_remote_device;
-struct sci_base_request;
-
-typedef enum sci_status
-(*sci_base_controller_handler_t)(struct sci_base_controller *);
-
-typedef enum sci_status
-(*sci_base_controller_timed_handler_t)(struct sci_base_controller *, u32);
-
-typedef enum sci_status
-(*sci_base_controller_request_handler_t)(struct sci_base_controller *,
-					 struct sci_base_remote_device *,
-					 struct sci_base_request *);
-
-typedef enum sci_status
-(*sci_base_controller_start_request_handler_t)(struct sci_base_controller *,
-					       struct sci_base_remote_device *,
-					       struct sci_base_request *, u16);
-
-/**
- * struct sci_base_controller_state_handler - This structure contains all of
- *    the state handler methods common to base controller state machines.
- *    Handler methods provide the ability to change the behavior for user
- *    requests or transitions depending on the state the machine is in.
- *
- *
- */
-struct sci_base_controller_state_handler {
-	/**
-	 * The start_handler specifies the method invoked when a user attempts to
-	 * start a controller.
-	 */
-	sci_base_controller_timed_handler_t start;
-
-	/**
-	 * The stop_handler specifies the method invoked when a user attempts to
-	 * stop a controller.
-	 */
-	sci_base_controller_timed_handler_t stop;
-
-	/**
-	 * The reset_handler specifies the method invoked when a user attempts to
-	 * reset a controller.
-	 */
-	sci_base_controller_handler_t reset;
-
-	/**
-	 * The initialize_handler specifies the method invoked when a user
-	 * attempts to initialize a controller.
-	 */
-	sci_base_controller_handler_t initialize;
-
-	/**
-	 * The start_io_handler specifies the method invoked when a user
-	 * attempts to start an IO request for a controller.
-	 */
-	sci_base_controller_start_request_handler_t start_io;
-
-	/**
-	 * The complete_io_handler specifies the method invoked when a user
-	 * attempts to complete an IO request for a controller.
-	 */
-	sci_base_controller_request_handler_t complete_io;
-
-	/**
-	 * The continue_io_handler specifies the method invoked when a user
-	 * attempts to continue an IO request for a controller.
-	 */
-	sci_base_controller_request_handler_t continue_io;
-
-	/**
-	 * The start_task_handler specifies the method invoked when a user
-	 * attempts to start a task management request for a controller.
-	 */
-	sci_base_controller_start_request_handler_t start_task;
-
-	/**
-	 * The complete_task_handler specifies the method invoked when a user
-	 * attempts to complete a task management request for a controller.
-	 */
-	sci_base_controller_request_handler_t complete_task;
-
-};
-
-/**
- * sci_base_controller_construct() - Construct the base controller
- * @this_controller: This parameter specifies the base controller to be
- *    constructed.
- * @state_table: This parameter specifies the table of state definitions to be
- *    utilized for the controller state machine.
- * @mde_array: This parameter specifies the array of memory descriptor entries
- *    to be managed by this list.
- * @mde_array_length: This parameter specifies the size of the array of entries.
- * @next_mdl: This parameter specifies a subsequent MDL object to be managed by
- *    this MDL object.
- * @oem_parameters: This parameter specifies the original equipment
- *    manufacturer parameters to be utilized by this controller object.
- *
- */
-static inline void sci_base_controller_construct(
-	struct sci_base_controller *scic_base,
-	const struct sci_base_state *state_table,
-	struct sci_physical_memory_descriptor *mdes,
-	u32 mde_count,
-	struct sci_base_memory_descriptor_list *next_mdl)
-{
-	sci_base_state_machine_construct(
-		&scic_base->state_machine,
-		&scic_base->parent,
-		state_table,
-		SCI_BASE_CONTROLLER_STATE_INITIAL
-		);
-
-	sci_base_mdl_construct(&scic_base->mdl, mdes, mde_count, next_mdl);
-
-	sci_base_state_machine_start(&scic_base->state_machine);
-}
-
-#endif /* _SCI_BASE_CONTROLLER_H_ */

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Index: linux-2.6/drivers/scsi/isci/core/sci_controller.h
===================================================================
@@ -63,36 +63,7 @@
  *
  */
 
-
-struct sci_base_memory_descriptor_list;
-struct scic_sds_controller;
-
 #define SCI_CONTROLLER_INVALID_IO_TAG 0xFFFF
 
-/**
- * sci_controller_get_memory_descriptor_list_handle() - This method simply
- *    returns a handle for the memory descriptor list associated with the
- *    supplied controller.  The descriptor list provides DMA safe/capable
- *    memory requirements for this controller.
- * @controller: This parameter specifies the controller for which to retrieve
- *    the DMA safe memory descriptor list.
- *
- * The user must adhere to the alignment requirements specified in memory
- * descriptor.  In situations where the operating environment does not offer
- * memory allocation utilities supporting alignment, then it is the
- * responsibility of the user to manually align the memory buffer for SCI.
- * Thus, the user may have to allocate a larger buffer to meet the alignment.
- * Additionally, the user will need to remember the actual memory allocation
- * addresses in order to ensure the memory can be properly freed when necessary
- * to do so. This method will return a valid handle, but the MDL may not be
- * accurate until after the user has invoked the associated
- * sci_controller_initialize() routine. A pointer to a physical memory
- * descriptor array.
- */
-struct sci_base_memory_descriptor_list *
-	sci_controller_get_memory_descriptor_list_handle(
-	struct scic_sds_controller *controller);
-
-
 #endif  /* _SCI_CONTROLLER_H_ */
 

Index: linux-2.6/drivers/scsi/isci/core/scic_sds_remote_device.c
===================================================================
@@ -563,12 +563,11 @@ void scic_sds_remote_device_continue_req
 	/* we need to check if this request is still valid to continue. */
 	if (sci_req) {
 		struct scic_sds_controller *scic = sci_req->owning_controller;
-		u32 state = scic->parent.state_machine.current_state_id;
-		sci_base_controller_request_handler_t continue_io;
+		u32 state = scic->state_machine.current_state_id;
+		scic_sds_controller_request_handler_t continue_io;
 
-		continue_io = scic_sds_controller_state_handler_table[state].base.continue_io;
-		continue_io(&scic->parent, &sci_req->target_device->parent,
-			    &sci_req->parent);
+		continue_io = scic_sds_controller_state_handler_table[state].continue_io;
+		continue_io(scic, &sci_req->target_device->parent, &sci_req->parent);
 	}
 }
 

Index: linux-2.6/drivers/scsi/isci/core/scic_sds_stp_request.c
===================================================================
@@ -649,7 +649,7 @@ static enum sci_status scic_sds_stp_requ
 	u32 length)
 {
 	struct scic_sds_stp_request *this_sds_stp_request = (struct scic_sds_stp_request *)this_request;
-	sci_base_controller_request_handler_t continue_io;
+	scic_sds_controller_request_handler_t continue_io;
 	struct scu_sgl_element *current_sgl;
 	struct scic_sds_controller *scic;
 	u32 state;

@@ -675,9 +675,9 @@ static enum sci_status scic_sds_stp_requ
 
 	/* send the new TC out. */
 	scic = this_request->owning_controller;
-	state = scic->parent.state_machine.current_state_id;
-	continue_io = scic_sds_controller_state_handler_table[state].base.continue_io;
-	return continue_io(&scic->parent, &this_request->target_device->parent,
+	state = scic->state_machine.current_state_id;
+	continue_io = scic_sds_controller_state_handler_table[state].continue_io;
+	return continue_io(scic, &this_request->target_device->parent,
 			   &this_request->parent);
 }
 

@@ -1822,7 +1822,7 @@ static void scic_sds_stp_request_started
 	struct sci_base_object *object)
 {
 	struct scic_sds_request *this_request = (struct scic_sds_request *)object;
-	sci_base_controller_request_handler_t continue_io;
+	scic_sds_controller_request_handler_t continue_io;
 	struct scu_task_context *task_context;
 	struct sata_fis_reg_h2d *h2d_fis;
 	struct scic_sds_controller *scic;

@@ -1839,10 +1839,10 @@ static void scic_sds_stp_request_started
 	task_context->control_frame = 0;
 
 	scic = this_request->owning_controller;
-	state = scic->parent.state_machine.current_state_id;
-	continue_io = scic_sds_controller_state_handler_table[state].base.continue_io;
+	state = scic->state_machine.current_state_id;
+	continue_io = scic_sds_controller_state_handler_table[state].continue_io;
 
-	status = continue_io(&scic->parent, &this_request->target_device->parent,
+	status = continue_io(scic, &this_request->target_device->parent,
 			     &this_request->parent);
 
 	if (status == SCI_SUCCESS) {

Index: linux-2.6/drivers/scsi/isci/host.c
===================================================================
@@ -62,6 +62,7 @@
 #include "request.h"
 #include "host.h"
 #include "probe_roms.h"
+#include "core/scic_sds_controller.h"
 
 irqreturn_t isci_msix_isr(int vec, void *data)
 {

@@ -231,9 +232,8 @@ static int isci_host_mdl_allocate_cohere
 	struct coherent_memory_info *mdl_struct;
 	u32 size = 0;
 
-	struct sci_base_memory_descriptor_list *mdl_handle
-		= sci_controller_get_memory_descriptor_list_handle(
-		isci_host->core_controller);
+	struct sci_base_memory_descriptor_list *mdl_handle =
+		&isci_host->core_controller->mdl;
 
 	sci_mdl_first_entry(mdl_handle);
 

Index: linux-2.6/drivers/scsi/isci/isci.h
===================================================================
@@ -65,7 +65,7 @@
 #include <scsi/libsas.h>
 #include <scsi/scsi.h>
 
-#include "sci_base_controller.h"
+#include "core/sci_object.h"
 #include "scic_controller.h"
 #include "host.h"
 #include "timers.h"

Index: linux-2.6/drivers/scsi/isci/core/sci_base_remote_device.h
===================================================================
@@ -65,7 +65,7 @@
 
 #include "sci_base_state_machine.h"
 
-struct sci_base_request;
+struct scic_sds_request;
 
 /**
  * enum sci_base_remote_device_states - This enumeration depicts all the states

@@ -159,12 +159,12 @@ typedef enum sci_status (*sci_base_remot
 
 typedef enum sci_status (*sci_base_remote_device_request_handler_t)(
 	struct sci_base_remote_device *,
-	struct sci_base_request *
+	struct scic_sds_request *
 	);
 
 typedef enum sci_status (*sci_base_remote_device_high_priority_request_complete_handler_t)(
 	struct sci_base_remote_device *,
-	struct sci_base_request *,
+	struct scic_sds_request *,
 	void *,
 	enum sci_io_status
 	);

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Index: linux-2.6/drivers/scsi/isci/core/scic_sds_controller.h
===================================================================
@@ -86,7 +86,6 @@
 
 struct sci_base_remote_device;
 struct scic_sds_remote_device;
-struct sci_base_request;
 struct scic_sds_request;
 struct scic_sds_controller;
 

@@ -487,11 +486,11 @@ typedef enum sci_status (*scic_sds_contr
 typedef enum sci_status (*scic_sds_controller_request_handler_t)
 				(struct scic_sds_controller *,
 				 struct sci_base_remote_device *,
-				 struct sci_base_request *);
+				 struct scic_sds_request *);
 typedef enum sci_status (*scic_sds_controller_start_request_handler_t)
 				(struct scic_sds_controller *,
 				 struct sci_base_remote_device *,
-				 struct sci_base_request *, u16);
+				 struct scic_sds_request *, u16);
 typedef void (*scic_sds_controller_phy_handler_t)
 				(struct scic_sds_controller *,
 				 struct scic_sds_port *,

Index: linux-2.6/drivers/scsi/isci/core/scic_sds_port.c
===================================================================
@@ -1090,15 +1090,7 @@ static enum sci_status scic_sds_port_rea
 	return SCI_SUCCESS;
 }
 
-/**
- *
- * @port: This is the struct sci_base_port object which is cast into a struct scic_sds_port
- *    object.
- * @device: This is the struct sci_base_remote_device object which is not used in this
- *    function.
- * @io_request: This is the struct sci_base_request object which is not used in this
- *    function.
- *
+/*
  * This method is the general ready substate complete io handler for the
  * struct scic_sds_port object.  This function decrments the outstanding request count
  * for this port object. enum sci_status SCI_SUCCESS

@@ -1194,15 +1186,7 @@ static void scic_sds_port_ready_waiting_
 		);
 }
 
-/**
- *
- * @port: This is the struct sci_base_port object which is cast into a struct scic_sds_port
- *    object.
- * @device: This is the struct sci_base_remote_device object which is not used in this
- *    request.
- * @io_request: This is the struct sci_base_request object which is not used in this
- *    function.
- *
+/*
  * This method is the ready waiting substate start io handler for the
  * struct scic_sds_port object. The port object can not accept new requests so the
  * request is failed. enum sci_status SCI_FAILURE_INVALID_STATE

@@ -1316,15 +1300,7 @@ static void scic_sds_port_ready_operatio
 						    SCIC_SDS_PORT_READY_SUBSTATE_WAITING);
 }
 
-/**
- *
- * @port: This is the struct sci_base_port object which is cast into a struct scic_sds_port
- *    object.
- * @device: This is the struct sci_base_remote_device object which is not used in this
- *    function.
- * @io_request: This is the struct sci_base_request object which is not used in this
- *    function.
- *
+/*
  * This method is the ready operational substate start io handler for the
  * struct scic_sds_port object.  This function incremetns the outstanding request
  * count for this port object. enum sci_status SCI_SUCCESS

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Index: linux-2.6/drivers/scsi/isci/core/scic_sds_remote_device.h
===================================================================
@@ -65,7 +65,6 @@
 
 #include "intel_sas.h"
 #include "sci_base_remote_device.h"
-#include "sci_base_request.h"
 #include "scu_remote_node_context.h"
 #include "scic_sds_remote_node_context.h"
 

@@ -507,15 +506,15 @@ enum sci_status scic_sds_remote_device_d
 
 enum sci_status scic_sds_remote_device_default_start_request_handler(
 	struct sci_base_remote_device *device,
-	struct sci_base_request *request);
+	struct scic_sds_request *request);
 
 enum sci_status scic_sds_remote_device_default_complete_request_handler(
 	struct sci_base_remote_device *device,
-	struct sci_base_request *request);
+	struct scic_sds_request *request);
 
 enum sci_status scic_sds_remote_device_default_continue_request_handler(
 	struct sci_base_remote_device *device,
-	struct sci_base_request *request);
+	struct scic_sds_request *request);
 
 enum sci_status scic_sds_remote_device_default_suspend_handler(
 	struct scic_sds_remote_device *this_device,

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Index: linux-2.6/drivers/scsi/isci/core/scic_sds_smp_remote_device.c
===================================================================
@@ -78,29 +78,24 @@
  */
 static enum sci_status scic_sds_smp_remote_device_ready_idle_substate_start_io_handler(
 	struct sci_base_remote_device *device,
-	struct sci_base_request *request)
+	struct scic_sds_request *request)
 {
 	enum sci_status status;
 	struct scic_sds_remote_device *this_device = (struct scic_sds_remote_device *)device;
-	struct scic_sds_request *io_request  = (struct scic_sds_request *)request;
 
 	/* Will the port allow the io request to start? */
 	status = this_device->owning_port->state_handlers->start_io_handler(
-		this_device->owning_port,
-		this_device,
-		io_request
-		);
+		this_device->owning_port, this_device, request);
 
 	if (status == SCI_SUCCESS) {
 		status =
-			scic_sds_remote_node_context_start_io(this_device->rnc, io_request);
+			scic_sds_remote_node_context_start_io(this_device->rnc, request);
 
-		if (status == SCI_SUCCESS) {
-			status = scic_sds_request_start(io_request);
-		}
+		if (status == SCI_SUCCESS)
+			status = scic_sds_request_start(request);
 
 		if (status == SCI_SUCCESS) {
-			this_device->working_request = io_request;
+			this_device->working_request = request;
 
 			sci_base_state_machine_change_state(
 				&this_device->ready_substate_machine,

@@ -108,7 +103,7 @@ static enum sci_status scic_sds_smp_remo
 				);
 		}
 
-		scic_sds_remote_device_start_request(this_device, io_request, status);
+		scic_sds_remote_device_start_request(this_device, request, status);
 	}
 
 	return status;

@@ -129,7 +124,7 @@ static enum sci_status scic_sds_smp_remo
  */
 static enum sci_status scic_sds_smp_remote_device_ready_cmd_substate_start_io_handler(
 	struct sci_base_remote_device *device,
-	struct sci_base_request *request)
+	struct scic_sds_request *request)
 {
 	return SCI_FAILURE_INVALID_STATE;
 }

@@ -144,7 +139,7 @@ static enum sci_status scic_sds_smp_remo
  */
 static enum sci_status scic_sds_smp_remote_device_ready_cmd_substate_complete_io_handler(
 	struct sci_base_remote_device *device,
-	struct sci_base_request *request)
+	struct scic_sds_request *request)
 {
 	enum sci_status status;
 	struct scic_sds_remote_device *this_device;

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Index: linux-2.6/drivers/scsi/isci/core/scic_sds_stp_packet_request.c
===================================================================
@@ -659,16 +659,12 @@ enum sci_status scic_sds_stp_packet_requ
 }
 
 enum sci_status scic_sds_stp_packet_request_started_completion_delay_complete_handler(
-	struct sci_base_request *request)
+	struct scic_sds_request *request)
 {
-	struct scic_sds_request *this_request = (struct scic_sds_request *)request;
+	sci_base_state_machine_change_state(&request->parent.state_machine,
+		SCI_BASE_REQUEST_STATE_COMPLETED);
 
-	sci_base_state_machine_change_state(
-		&this_request->parent.state_machine,
-		SCI_BASE_REQUEST_STATE_COMPLETED
-		);
-
-	return this_request->sci_status;
+	return request->sci_status;
 }
 
 /* --------------------------------------------------------------------------- */

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