powerpc: Add ioremap_wc
Subsystems (2)
PATCH 1/2 powerpc: Add ioremap_wc
Add ioremap_wc so drivers can request write combining on kernel mappings.
Signed-off-by Anton Blanchard <[email protected]>
---
arch/powerpc/include/asm/io.h +5 -0
@@ -2,6 +2,8 @@#define _ASM_POWERPC_IO_H#ifdef __KERNEL__ +#define ARCH_HAS_IOREMAP_WC +/* * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License
@@ -628,6 +630,8 @@ static inline void iosync(void)* * * ioremap_nocache is identical to ioremap * +* * ioremap_wc enables write combining +* * * iounmap undoes such a mapping and can be hooked * * * __ioremap_at (and the pending __iounmap_at) are low level functions to
@@ -648,6 +652,7 @@ static inline void iosync(void)extern void __iomem *ioremap (phys_addr_t address,unsigned long size);extern void __iomem *ioremap_flags (phys_addr_t address,unsigned long size,unsigned long flags); +extern void __iomem *ioremap_wc (phys_addr_t address,unsigned long size);#define ioremap_nocache (addr, size) ioremap((addr), (size))#define ioremap_prot (addr, size, prot) ioremap_flags((addr), (size), (prot))
arch/powerpc/mm/pgtable_32.c +8 -0
@@ -133,6 +133,14 @@ ioremap(phys_addr_t addr, unsigned longEXPORT_SYMBOL (ioremap);void __iomem * +ioremap_wc (phys_addr_t addr,unsigned long size) +{ +return __ioremap_caller (addr, size, _PAGE_NO_CACHE, +__builtin_return_address (0 )); +} +EXPORT_SYMBOL (ioremap_wc); + +void __iomem *ioremap_flags (phys_addr_t addr,unsigned long size,unsigned long flags) {/* writeable implies dirty for kernel addresses */
arch/powerpc/mm/pgtable_64.c +11 -0
@@ -255,6 +255,16 @@ void __iomem * ioremap(phys_addr_t addr,return __ioremap_caller (addr, size, flags, caller); } +void __iomem *ioremap_wc (phys_addr_t addr,unsigned long size) +{ +unsigned long flags = _PAGE_NO_CACHE; +void *caller =__builtin_return_address (0 ); + +if (ppc_md.ioremap) +return ppc_md.ioremap (addr, size, flags, caller); +return __ioremap_caller (addr, size, flags, caller); +} +void __iomem *ioremap_flags (phys_addr_t addr,unsigned long size,unsigned long flags) {
@@ -311,6 +321,7 @@ void iounmap(volatile void __iomem *toke }EXPORT_SYMBOL (ioremap); +EXPORT_SYMBOL (ioremap_wc);EXPORT_SYMBOL (ioremap_flags);EXPORT_SYMBOL (__ioremap);EXPORT_SYMBOL (__ioremap_at);
PATCH 2/2 powerpc: Remove ioremap_flags
We have a confusing number of ioremap functions. Make things just a bit simpler by merging ioremap_flags and ioremap_prot.
Signed-off-by Anton Blanchard <[email protected]>
---
arch/powerpc/include/asm/io.h +5 -7
@@ -624,9 +624,8 @@ static inline void iosync(void)* * ioremap is the standard one and provides non-cacheable guarded mappings * and can be hooked by the platform via ppc_md * -* * ioremap_flags allows to specify the page flags as an argument and can -* also be hooked by the platform via ppc_md. ioremap_prot is the exact -* same thing as ioremap_flags. +* * ioremap_prot allows to specify the page flags as an argument and can +* also be hooked by the platform via ppc_md. * * * ioremap_nocache is identical to ioremap *
@@ -639,7 +638,7 @@ static inline void iosync(void)* currently be hooked. Must be page aligned. * * * __ioremap is the low level implementation used by ioremap and -* ioremap_flags and cannot be hooked (but can be used by a hook on one +* ioremap_prot and cannot be hooked (but can be used by a hook on one * of the previous ones) * * * __ioremap_caller is the same as above but takes an explicit caller
@@ -650,11 +649,10 @@ static inline void iosync(void)* */ extern void __iomem *ioremap (phys_addr_t address,unsigned long size); -extern void __iomem *ioremap_flags (phys_addr_t address,unsigned long size, -unsigned long flags); +extern void __iomem *ioremap_prot (phys_addr_t address,unsigned long size, +unsigned long flags);extern void __iomem *ioremap_wc (phys_addr_t address,unsigned long size);#define ioremap_nocache (addr, size) ioremap((addr), (size)) -#define ioremap_prot (addr, size, prot) ioremap_flags((addr), (size), (prot))extern void iounmap (volatile void __iomem *addr);
arch/powerpc/lib/devres.c +3 -3
@@ -9,11 +9,11 @@#include <linux/device.h> /* devres_*(), devm_ioremap_release() */ #include <linux/gfp.h> -#include <linux/io.h> /* ioremap_flags() */ +#include <linux/io.h> /* ioremap_prot() */ #include <linux/module.h> /* EXPORT_SYMBOL() */ /** -* devm_ioremap_prot - Managed ioremap_flags() +* devm_ioremap_prot - Managed ioremap_prot() * @dev: Generic device to remap IO address for * @offset: BUS offset to map * @size: Size of map
@@ -31,7 +31,7 @@ void __iomem *devm_ioremap_prot(struct dif (!ptr)return NULL ; - addr =ioremap_flags (offset, size, flags); + addr =ioremap_prot (offset, size, flags);if (addr) { *ptr = addr;devres_add (dev, ptr);
arch/powerpc/mm/pgtable_32.c +2 -2
@@ -141,7 +141,7 @@ ioremap_wc(phys_addr_t addr, unsigned loEXPORT_SYMBOL (ioremap_wc);void __iomem * -ioremap_flags (phys_addr_t addr,unsigned long size,unsigned long flags) +ioremap_prot (phys_addr_t addr,unsigned long size,unsigned long flags) {/* writeable implies dirty for kernel addresses */ if (flags & _PAGE_RW)
@@ -160,7 +160,7 @@ ioremap_flags(phys_addr_t addr, unsignedreturn __ioremap_caller (addr, size, flags,__builtin_return_address (0 )); } -EXPORT_SYMBOL (ioremap_flags); +EXPORT_SYMBOL (ioremap_prot);void __iomem *__ioremap (phys_addr_t addr,unsigned long size,unsigned long flags)
arch/powerpc/mm/pgtable_64.c +2 -2
@@ -265,7 +265,7 @@ void __iomem * ioremap_wc(phys_addr_t adreturn __ioremap_caller (addr, size, flags, caller); } -void __iomem *ioremap_flags (phys_addr_t addr,unsigned long size, +void __iomem *ioremap_prot (phys_addr_t addr,unsigned long size,unsigned long flags) {void *caller =__builtin_return_address (0 );
@@ -322,7 +322,7 @@ void iounmap(volatile void __iomem *tokeEXPORT_SYMBOL (ioremap);EXPORT_SYMBOL (ioremap_wc); -EXPORT_SYMBOL (ioremap_flags); +EXPORT_SYMBOL (ioremap_prot);EXPORT_SYMBOL (__ioremap);EXPORT_SYMBOL (__ioremap_at);EXPORT_SYMBOL (iounmap);
arch/powerpc/platforms/ps3/spu.c +2 -2
@@ -197,7 +197,7 @@ static void spu_unmap(struct spu *spu)* The current HV requires the spu shadow regs to be mapped with the * PTE page protection bits set as read-only (PP=3). This implementation * uses the low level __ioremap() to bypass the page protection settings -* inforced by ioremap_flags() to get the needed PTE bits set for the +* inforced by ioremap_prot() to get the needed PTE bits set for the * shadow regs. */
@@ -214,7 +214,7 @@ static int __init setup_areas(struct spu goto fail_ioremap; } - spu->local_store = (__force void *)ioremap_flags (spu->local_store_phys, + spu->local_store = (__force void *)ioremap_prot (spu->local_store_phys,LS_SIZE , _PAGE_NO_CACHE);if (!spu->local_store) {
arch/powerpc/sysdev/axonram.c +1 -1
@@ -216,7 +216,7 @@ static int axon_ram_probe(struct platfor AXON_RAM_DEVICE_NAME, axon_ram_bank_id, bank->size >> 20); bank->ph_addr = resource.start; - bank->io_addr = (unsigned long )ioremap_flags ( + bank->io_addr = (unsigned long )ioremap_prot ( bank->ph_addr, bank->size, _PAGE_NO_CACHE);if (bank->io_addr ==0 ) {dev_err (&device->dev,"ioremap() failed\n" );
arch/powerpc/sysdev/fsl_85xx_cache_sram.c +2 -2
@@ -106,10 +106,10 @@ int __init instantiate_cache_sram(struct goto out_free; } - cache_sram->base_virt =ioremap_flags (cache_sram->base_phys, + cache_sram->base_virt =ioremap_prot (cache_sram->base_phys, cache_sram->size, _PAGE_COHERENT |PAGE_KERNEL );if (!cache_sram->base_virt) { -dev_err (&dev->dev,"%s: ioremap_flags failed\n" , +dev_err (&dev->dev,"%s: ioremap_prot failed\n" , dev->dev.of_node->full_name); ret = -ENOMEM ; goto out_release;