USB: fsl_udc_core: fix build-failure for ARM

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

Quoted 4 lines · Uwe Kleine-K?nig

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

On ARM, we assume all new pages have dirty dcache, which allows us to neatly end the ever-increasing quantity of drivers which need to be patched to work on ARM. PowerPC doesn't do this.

Hi Russell,

Quoted 6 lines · Russell King - ARM Linux

Quoted 4 lines · Uwe Kleine-K?nig

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

Quoted 3 lines

On ARM, we assume all new pages have dirty dcache, which allows us to neatly end the ever-increasing quantity of drivers which need to be patched to work on ARM. PowerPC doesn't do this.

Unless I'm missing something the cache flushed here isn't necessarily for a new page. (And even if the flush isn't needed here for ARM, not having flush_dcache_range results in #ifdefs for each user of it. So a definition would be nice, wouldn't it?)

Commit

09ba0de (USB: fsl_udc_core: prepare for SoCs with BE registers and descriptors)

introduced two function pointers _fsl_readl and _fsl_writel in an #ifdef CONFIG_PPC32 block and used then unconditionally in fsl_udc_probe. To make the driver compile again this use has to be protected by an #ifdef, too. Moreover ARM doesn't have flush_dcache_range so this is #ifdefed out, too.

Signed-off-by Uwe Kleine-K?nig <[email protected]>

---
Hello,

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

 drivers/usb/gadget/fsl_udc_core.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

drivers/usb/gadget/fsl_udc_core.c +4 -0

index 999eafe..47152e0 100644
@@ -1333,8 +1333,10 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
 	/* Fill in the reqest structure */
 	*((u16 *) req->req.buf) = cpu_to_le16(tmp);
 
+#ifdef CONFIG_PPC32
 	/* flush cache for the req buffer */
 	flush_dcache_range((u32)req->req.buf, (u32)req->req.buf + 8);
+#endif
 
 	req->ep = ep;
 	req->req.length = 2;

@@ -2455,6 +2457,7 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
 	}
 
 	/* Set accessors only after pdata->init() ! */
+#ifdef CONFIG_PPC32
 	if (pdata->big_endian_mmio) {
 		_fsl_readl = _fsl_readl_be;
 		_fsl_writel = _fsl_writel_be;

@@ -2462,6 +2465,7 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
 		_fsl_readl = _fsl_readl_le;
 		_fsl_writel = _fsl_writel_le;
 	}
+#endif
 
 #ifndef CONFIG_ARCH_MXC
 	if (pdata->have_sysif_regs)

Hello Greg,

Quoted 14 lines · Uwe Kleine-K?nig

Commit

09ba0de (USB: fsl_udc_core: prepare for SoCs with BE registers and descriptors)

introduced two function pointers _fsl_readl and _fsl_writel in an #ifdef CONFIG_PPC32 block and used then unconditionally in fsl_udc_probe. To make the driver compile again this use has to be protected by an #ifdef, too. Moreover ARM doesn't have flush_dcache_range so this is #ifdefed out, too.

Signed-off-by Uwe Kleine-K?nig <[email protected]>

---
Hello,

Quoted 4 lines

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

As Russell seem to be OK with the #ifdef, can you please take this patch?

Quoted 11 lines

 drivers/usb/gadget/fsl_udc_core.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

drivers/usb/gadget/fsl_udc_core.c +0 -0

index 999eafe..47152e0 100644
@@ -1333,8 +1333,10 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
 	/* Fill in the reqest structure */
 	*((u16 *) req->req.buf) = cpu_to_le16(tmp);
 

drivers/usb/gadget/fsl_udc_core.c static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value, · line 1339

Quoted 4 lines

drivers/usb/gadget/fsl_udc_core.c +2 -0

+#ifdef CONFIG_PPC32
 	/* flush cache for the req buffer */
 	flush_dcache_range((u32)req->req.buf, (u32)req->req.buf + 8);
+#endif

Quoted 17 lines · Uwe Kleine-K?nig

Hello Greg,

Quoted 14 lines · Uwe Kleine-K?nig

Commit

09ba0de (USB: fsl_udc_core: prepare for SoCs with BE registers and descriptors)

introduced two function pointers _fsl_readl and _fsl_writel in an #ifdef CONFIG_PPC32 block and used then unconditionally in fsl_udc_probe. To make the driver compile again this use has to be protected by an #ifdef, too. Moreover ARM doesn't have flush_dcache_range so this is #ifdefed out, too.

Signed-off-by Uwe Kleine-K?nig <[email protected]>

---
Hello,

Quoted 6 lines

Quoted 4 lines

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

As Russell seem to be OK with the #ifdef, can you please take this patch?

Ick, no.

Come on, we don't have ifdefs in .c files for a reason, surely there is a better fix for this some other way?

Quoted 22 lines · Greg KH

Quoted 21 lines · Uwe Kleine-K?nig

Hello Greg,

Quoted 18 lines · Uwe Kleine-K?nig

Commit

09ba0de (USB: fsl_udc_core: prepare for SoCs with BE registers and descriptors)

introduced two function pointers _fsl_readl and _fsl_writel in an #ifdef CONFIG_PPC32 block and used then unconditionally in fsl_udc_probe. To make the driver compile again this use has to be protected by an #ifdef, too. Moreover ARM doesn't have flush_dcache_range so this is #ifdefed out, too.

Signed-off-by Uwe Kleine-K?nig <[email protected]>

---
Hello,

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

Quoted 4 lines

Quoted 2 lines

As Russell seem to be OK with the #ifdef, can you please take this patch?

Ick, no.

I never said I was OK with the #ifdef...

Quoted 2 lines

Come on, we don't have ifdefs in .c files for a reason, surely there is a better fix for this some other way?

I suggested ways to fix it, which apparantly got ignored. To repeat myself, what I said was:

"Well, the folk introducing it should have added it to cachetlb.txt so that other folk know what the intentions of it are. At the moment it seems to be an unofficial extension with unknown semantics. Maybe the PPC folk can clear it up and fix other arches if they wish to make it an official arch cachetlb extension."

Quoted 23 lines · Greg KH

Quoted 22 lines · Uwe Kleine-K?nig

Quoted 21 lines

Hello Greg,

Quoted 18 lines · Uwe Kleine-K?nig

Commit

? ? ? ? 09ba0de (USB: fsl_udc_core: prepare for SoCs with BE registers and descriptors)

introduced two function pointers _fsl_readl and _fsl_writel in an #ifdef CONFIG_PPC32 block and used then unconditionally in fsl_udc_probe. To make the driver compile again this use has to be protected by an #ifdef, too. Moreover ARM doesn't have flush_dcache_range so this is #ifdefed out, too.

Signed-off-by Uwe Kleine-K?nig <[email protected]>

---
Hello,

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

Quoted 6 lines

Quoted 4 lines

Quoted 2 lines

As Russell seem to be OK with the #ifdef, can you please take this patch?

Ick, no.

I never said I was OK with the #ifdef...

Ah, right, sorry.

Quoted 11 lines

Quoted 2 lines

Come on, we don't have ifdefs in .c files for a reason, surely there is a better fix for this some other way?

I suggested ways to fix it, which apparantly got ignored. ?To repeat myself, what I said was:

"Well, the folk introducing it should have added it to cachetlb.txt so that other folk know what the intentions of it are. ?At the moment it seems to be an unofficial extension with unknown semantics. ?Maybe the PPC folk can clear it up and fix other arches if they wish to make it an official arch cachetlb extension."

So what should we do? The fsl_udc_core driver currently fails to build because it uses flush_dcache_range unconditionally. So the obvious ways to fix it are:

?1) define flush_dcache_range
? a) in arch/arm
? b) in the driver
?2) make the driver not use flush_dcache_range
? a) #ifdef
? b) revert 09ba0de (and probably some commits that depend on it) ? c) use a different function to flush the cache

2011/5/22 Uwe Kleine-K?nig <[email protected]>:

Quoted 47 lines · Russell King - ARM Linux

Quoted 23 lines · Greg KH

Quoted 22 lines · Uwe Kleine-K?nig

Quoted 21 lines

Hello Greg,

Quoted 18 lines · Uwe Kleine-K?nig

Commit

? ? ? ? 09ba0de (USB: fsl_udc_core: prepare for SoCs with BE registers and descriptors)

introduced two function pointers _fsl_readl and _fsl_writel in an #ifdef CONFIG_PPC32 block and used then unconditionally in fsl_udc_probe. To make the driver compile again this use has to be protected by an #ifdef, too. Moreover ARM doesn't have flush_dcache_range so this is #ifdefed out, too.

Signed-off-by Uwe Kleine-K?nig <[email protected]>

---
Hello,

I'm unsure about getting rid of the flush_dcache_range. If powerpc needs a flush ARM probably does, too, no?
If so, what it the right thing to do? Implement flush_dcache_range for ARM (just wrapping flush_dcache_page?)?

Quoted 6 lines

Quoted 4 lines

Quoted 2 lines

As Russell seem to be OK with the #ifdef, can you please take this patch?

Ick, no.

I never said I was OK with the #ifdef...

Ah, right, sorry.

Quoted 11 lines

Quoted 2 lines

Come on, we don't have ifdefs in .c files for a reason, surely there is a better fix for this some other way?

I suggested ways to fix it, which apparantly got ignored. ?To repeat myself, what I said was:

"Well, the folk introducing it should have added it to cachetlb.txt so that other folk know what the intentions of it are. ?At the moment it seems to be an unofficial extension with unknown semantics. ?Maybe the PPC folk can clear it up and fix other arches if they wish to make it an official arch cachetlb extension."

So what should we do? The fsl_udc_core driver currently fails to build because it uses flush_dcache_range unconditionally. So the obvious ways to fix it are:

Quoted 7 lines

?1) define flush_dcache_range
? a) in arch/arm
? b) in the driver
?2) make the driver not use flush_dcache_range
? a) #ifdef
? b) revert 09ba0de (and probably some commits that depend on it) ? c) use a different function to flush the cache

I see no reason why a dma_map_*() function couldn't be used here?

This is preventing the driver from being built. And the _fsl_readl stuffs, which was really introduced by PPC guys, yet it can be made generic enough I believe. The real requirement is really for a single kernel binary to run on different LE/BE configurations, which will hurt performance a bit and is normally not true on the i.MX SoCs, so that can be made as a config option in my POV, but not necessary #ifdef CONFIG_PPC32, maybe some better name

This is an iMX driver, which was written avoiding the DMA API despite it clearly doing DMA related stuff. Allocating memory from kmalloc, translating it to physical addresses using virt_to_phys, etc.

The PPC people decided to reuse it, and ended up introducing some custom cache flushing APIs to get around the lack of dma_map_* usage.