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MIPS: AR7: Fix GCC 4.6.0 build error.

PATCH In review Alexander Clouter 5 participants 7 messages May 13, 2011 MIPS

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Alexander Clouter

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#0 lore raw

PATCH 1/1 MIPS: AR7: Fix GCC 4.6.0 build error.

CC arch/mips/ar7/gpio.o
arch/mips/ar7/gpio.c: In function 'ar7_gpio_init':
arch/mips/ar7/gpio.c:318:11: error: variable 'size' set but not used [-Werror=unused-but-set-variable]
cc1: all warnings being treated as errors

Signed-off-by Alexander Clouter <[email protected]>
---
 arch/mips/ar7/gpio.c |   12 ++----------
 1 files changed, 2 insertions(+), 10 deletions(-)
arch/mips/ar7/gpio.c +2 -10
index 425dfa5..6917427 100644
@@ -314,16 +314,8 @@ static void titan_gpio_init(void)
 int __init ar7_gpio_init(void)
 {
 	int ret;
-	struct ar7_gpio_chip *gpch;
-	unsigned size;
-
-	if (!ar7_is_titan()) {
-		gpch = &ar7_gpio_chip;
-		size = 0x10;
-	} else {
-		gpch = &titan_gpio_chip;
-		size = 0x1f;
-	}
+	struct ar7_gpio_chip *gpch = (!ar7_is_titan())
+		? &ar7_gpio_chip : &titan_gpio_chip;
 
 	gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
 					AR7_REGS_GPIO + 0x10);
Signature · 1 line
1.7.5.1
#1 lore raw

Hello.

Quoted 19 lines · Alexander Clouter

CC arch/mips/ar7/gpio.o
arch/mips/ar7/gpio.c: In function 'ar7_gpio_init':
arch/mips/ar7/gpio.c:318:11: error: variable 'size' set but not used [-Werror=unused-but-set-variable]
cc1: all warnings being treated as errors

Signed-off-by Alexander Clouter <[email protected]>
---
 arch/mips/ar7/gpio.c |   12 ++----------
 1 files changed, 2 insertions(+), 10 deletions(-)
arch/mips/ar7/gpio.c +0 -1
index 425dfa5..6917427 100644
@@ -314,16 +314,8 @@ static void titan_gpio_init(void)
 int __init ar7_gpio_init(void)
 {
 	int ret;
-	struct ar7_gpio_chip *gpch;

arch/mips/ar7/gpio.c static void titan_gpio_init(void) · line 317

Quoted 10 lines
arch/mips/ar7/gpio.c +1 -9
-	unsigned size;
-
-	if (!ar7_is_titan()) {
-		gpch = &ar7_gpio_chip;
-		size = 0x10;
-	} else {
-		gpch = &titan_gpio_chip;
-		size = 0x1f;
-	}
+	struct ar7_gpio_chip *gpch = (!ar7_is_titan())

Parens around (!x) are not really necessary. Perhaps Ralf could remove them
while applying...

arch/mips/ar7/gpio.c static void titan_gpio_init(void) · line 318

Quoted 1 line
arch/mips/ar7/gpio.c +1 -0
+		? &ar7_gpio_chip : &titan_gpio_chip;

WBR, Sergei

author
#2 lore raw
Quoted 6 lines · Sergei Shtylyov

arch/mips/ar7/gpio.c static void titan_gpio_init(void) · line 317

Quoted 2 lines
arch/mips/ar7/gpio.c +1 -0
+	struct ar7_gpio_chip *gpch = (!ar7_is_titan())

Parens around (!x) are not really necessary. Perhaps Ralf could
remove them while applying...

I'm happy to resubmit if that is preferred.

Cheers

Signature · 3 lines
Alexander Clouter
.sigmonster says: BOFH excuse #267:
                  The UPS is on strike.
#3 lore raw
Quoted 6 lines · Alexander Clouter
Quoted 5 lines

Review

Quoted 1 line
(quoted diff) +1 -0
+	struct ar7_gpio_chip *gpch = (!ar7_is_titan())

Parens around (!x) are not really necessary. Perhaps Ralf could
remove them while applying...

I'm happy to resubmit if that is preferred.

Florian who is experiencing email problems submitted an alternative patch to me which I'm appending below and which I've just applied.

Thanks folks!

Ralf

From: Florian Fainelli <[email protected]>
Date: Fri, 13 May 2011 17:41:21 +0200
Subject: [PATCH] MIPS: AR7: Fix GPIO register size for Titan variant.

The 'size' variable contains the correct register size for both AR7 and Titan, but we never used it to ioremap the correct register size. This problem only shows up on Titan.

Reported-by Alexander Clouter <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>
Signed-off-by Ralf Baechle <[email protected]>
---
 arch/mips/ar7/gpio.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/mips/ar7/gpio.c +1 -1
index 425dfa5..a8aa1b4 100644
@@ -326,7 +326,7 @@ int __init ar7_gpio_init(void)
 	}
 
 	gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
-					AR7_REGS_GPIO + 0x10);
+					AR7_REGS_GPIO + size);
 
 	if (!gpch->regs) {
 		printk(KERN_ERR "%s: failed to ioremap regs\n",
#4 lore raw

arch/mips/ar7/gpio.c int __init ar7_gpio_init(void) · line 329

Quoted 3 lines · Ralf Baechle
arch/mips/ar7/gpio.c +1 -1
 	gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
-					AR7_REGS_GPIO + 0x10);
+					AR7_REGS_GPIO + size);

And promptly screwed up, sigh ...

Ralf

#5 lore raw
In reply to Alexander Clouter
Quoted 23 lines · Alexander Clouter

 CC      arch/mips/ar7/gpio.o
arch/mips/ar7/gpio.c: In function 'ar7_gpio_init':
arch/mips/ar7/gpio.c:318:11: error: variable 'size' set but not used [-Werror=unused-but-set-variable]
cc1: all warnings being treated as errors

Signed-off-by Alexander Clouter <[email protected]>

---
 arch/mips/ar7/gpio.c |   12 ++----------

 1 files changed, 2 insertions(+), 10 deletions(-)
arch/mips/ar7/gpio.c +0 -5
index 425dfa5..6917427 100644
@@ -314,16 +314,8 @@ static void titan_gpio_init(void)
  int __init ar7_gpio_init(void)
  {
        int ret;
-       struct ar7_gpio_chip *gpch;
-       unsigned size;
-
-       if (!ar7_is_titan()) {
-               gpch = &ar7_gpio_chip;

arch/mips/ar7/gpio.c static void titan_gpio_init(void) · line 321

Quoted 10 lines
arch/mips/ar7/gpio.c +2 -5
-               size = 0x10;
-       } else {
-               gpch = &titan_gpio_chip;
-               size = 0x1f;
-       }
+       struct ar7_gpio_chip *gpch = (!ar7_is_titan())
+               ? &ar7_gpio_chip : &titan_gpio_chip;
 
        gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
                                        AR7_REGS_GPIO + 0x10);

Without any AR7 knowledge, it looks like the size is supposed to be used here instead of the 0x10 - also the "AR7_REGS_GPIO + 0x10" looks wrong - I don't think the regs are 0x8610910 bytes big ;-).

Regards
Jonas

#6 lore raw
In reply to Alexander Clouter

Hello Alexander,

Quoted 24 lines · On Friday 13 May 2011 17:28:55 Alexander Clouter wrote:

CC arch/mips/ar7/gpio.o
arch/mips/ar7/gpio.c: In function 'ar7_gpio_init':
arch/mips/ar7/gpio.c:318:11: error: variable 'size' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors

Signed-off-by Alexander Clouter <[email protected]>
---
 arch/mips/ar7/gpio.c |   12 ++----------
 1 files changed, 2 insertions(+), 10 deletions(-)
arch/mips/ar7/gpio.c +0 -5
index 425dfa5..6917427 100644
@@ -314,16 +314,8 @@ static void titan_gpio_init(void)
 int __init ar7_gpio_init(void)
 {
 	int ret;
-	struct ar7_gpio_chip *gpch;
-	unsigned size;
-
-	if (!ar7_is_titan()) {
-		gpch = &ar7_gpio_chip;

arch/mips/ar7/gpio.c static void titan_gpio_init(void) · line 321

Quoted 10 lines
arch/mips/ar7/gpio.c +2 -5
-		size = 0x10;
-	} else {
-		gpch = &titan_gpio_chip;
-		size = 0x1f;
-	}
+	struct ar7_gpio_chip *gpch = (!ar7_is_titan())
+		? &ar7_gpio_chip : &titan_gpio_chip;
 
 	gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
 					AR7_REGS_GPIO + 0x10);

From: Florian Fainelli <[email protected]>
Subject: [PATCH] AR7: fix gpio register size for Titan variant.

The 'size' variable contains the correct register size for both AR7 and Titan, but we never used it to ioremap the correct register size. This problem only shows up on Titan.

Reported-by Alexander Clouter <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>

---

arch/mips/ar7/gpio.c +1 -1
index 425dfa5..a8aa1b4 100644
@@ -326,7 +326,7 @@ int __init ar7_gpio_init(void)
 	}
 
 	gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
-					AR7_REGS_GPIO + 0x10);
+					AR7_REGS_GPIO + size);
 
 	if (!gpch->regs) {
 		printk(KERN_ERR "%s: failed to ioremap regs\n",
Signature · 1 line
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