OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

PATCH Superseded Avinash.H.M 3 participants 10 messages May 2, 2011 – May 25, 2011

Subsystems (5)

Arm (32-bit) Arm sub-architectures OMAP2+ support OMAP hwmod data +1 more subsystems

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Avinash.H.M

author

2011-05-02 09:21 UTC #0 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is
- Disable the I2C.
- Write to SOFTRESET bit.
- Enable the I2C.
- Poll on the RESETDONE bit.
The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen.

Cc Rajendra Nayak <[email protected]>

Cc Paul Walmsley <[email protected]>

Cc Benoit Cousson <[email protected]>

Cc Kevin Hilman <[email protected]>

Signed-off-by Avinash.H.M <[email protected]>

---

The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )

Changes from previous versions:
from v1:
- moved i2c specific things from hwmod files to i2c files.
- fixed comments from Paul.
- http://www.spinics.net/lists/linux-omap/msg49483.html

from v2:
- Avoided direct SYSCONFIG access in i2c.c
- http://www.spinics.net/lists/linux-omap/msg49632.html

Testing:
* build tested omap2plus_defconfig for warnings and errors. none introduced.
* boot tested on 2430.
* tested for 'core off' in suspend resume on 3430 sdp. core off counters increment after suspend resume.

 arch/arm/mach-omap2/i2c.c                    |   54 ++++++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod.c             |   12 ++++++
 arch/arm/mach-omap2/omap_hwmod_2420_data.c   |    1 +
 arch/arm/mach-omap2/omap_hwmod_2430_data.c   |    1 +
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c   |    1 +
 arch/arm/plat-omap/include/plat/i2c.h        |    4 ++
 arch/arm/plat-omap/include/plat/omap_hwmod.h |    1 +
 7 files changed, 74 insertions(+), 0 deletions(-)

arch/arm/mach-omap2/i2c.c +54 -0

index 79c478c..bd50e26 100644
@@ -21,9 +21,16 @@
 
 #include <plat/cpu.h>
 #include <plat/i2c.h>
+#include <plat/common.h>
 
 #include "mux.h"
 
+/* In register I2C_CON, Bit 15 is the I2C enable bit */
+#define I2C_EN				BIT(15)
+#define I2C_CON_OFFSET			0x24
+/* Maximum microseconds to wait for OMAP module to softreset */
+#define MAX_MODULE_SOFTRESET_WAIT	10000
+
 void __init omap2_i2c_mux_pins(int bus_id)
 {
 	char mux_name[sizeof("i2c2_scl.i2c2_scl")];

@@ -37,3 +44,50 @@ void __init omap2_i2c_mux_pins(int bus_id)
 	sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
 	omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
 }
+
+/**
+ * omap_i2c_reset- reset the omap i2c module.
+ * @oh: struct omap_hwmod *
+ *
+ * The i2c moudle in omap2, omap3 had a special sequence to reset. The
+ * sequence is:
+ * - Disable the I2C.
+ * - Write to SOFTRESET bit.
+ * - Enable the I2C.
+ * - Poll on the RESETDONE bit.
+ * The sequence is implemented in below function. This is called for 2420,
+ * 2430 and omap3.
+ */
+int omap_i2c_reset(struct omap_hwmod *oh)
+{
+	u32 v;
+	int c = 0;
+
+	/* Disable I2C */
+	v = omap_hwmod_read(oh, I2C_CON_OFFSET);
+	v = v & ~I2C_EN;
+	omap_hwmod_write(v, oh, I2C_CON_OFFSET);
+
+	/* Write to the SOFTRESET bit */
+	omap_hwmod_softreset(oh);
+
+	/* Enable I2C */
+	v = omap_hwmod_read(oh, I2C_CON_OFFSET);
+	v |= I2C_EN;
+	omap_hwmod_write(v, oh, I2C_CON_OFFSET);
+
+	/* Poll on RESETDONE bit */
+	omap_test_timeout((omap_hwmod_read(oh,
+				oh->class->sysc->syss_offs)
+				& SYSS_RESETDONE_MASK),
+				MAX_MODULE_SOFTRESET_WAIT, c);
+
+	if (c == MAX_MODULE_SOFTRESET_WAIT)
+		pr_warning("%s: %s: softreset failed (waited %d usec)\n",
+			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
+	else
+		pr_debug("%s: %s: softreset in %d usec\n", __func__,
+			oh->name, c);
+
+	return 0;
+}

arch/arm/mach-omap2/omap_hwmod.c +12 -0

index e034294..771fc15 100644
@@ -1561,6 +1561,18 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
 		__raw_writel(v, oh->_mpu_rt_va + reg_offs);
 }
 
+void omap_hwmod_softreset(struct omap_hwmod *oh)
+{
+	u32 v;
+
+	/* Write to the SOFTRESET bit in SYSCONFIG */
+	v = oh->_sysc_cache;
+	v |= (0x1 << oh->class->sysc->sysc_fields->srst_shift);
+
+	oh->_sysc_cache = v;
+	omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
+}
+
 /**
  * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  * @oh: struct omap_hwmod *

arch/arm/mach-omap2/omap_hwmod_2420_data.c +1 -0

index e9a416c..fd386af 100644
@@ -1447,6 +1447,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
 static struct omap_hwmod_class i2c_class = {
 	.name		= "i2c",
 	.sysc		= &i2c_sysc,
+	.reset		= &omap_i2c_reset,
 	.rev		= OMAP_I2C_IP_VERSION_1,
 };

arch/arm/mach-omap2/omap_hwmod_2430_data.c +1 -0

index beedda6..4ad4188 100644
@@ -1524,6 +1524,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
 static struct omap_hwmod_class i2c_class = {
 	.name		= "i2c",
 	.sysc		= &i2c_sysc,
+	.reset		= &omap_i2c_reset,
 	.rev		= OMAP_I2C_IP_VERSION_1,
 };

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +1 -0

index dec1a38..e938810 100644
@@ -1460,6 +1460,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
 static struct omap_hwmod_class i2c_class = {
 	.name = "i2c",
 	.sysc = &i2c_sysc,
+	.reset = &omap_i2c_reset,
 	.rev  = OMAP_I2C_IP_VERSION_1,
 };

arch/arm/plat-omap/include/plat/i2c.h +4 -0

index fd75dad..20237c1 100644
@@ -24,6 +24,8 @@
 #include <linux/i2c.h>
 #include <linux/i2c-omap.h>
 
+#include <plat/omap_hwmod.h>
+
 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
 				 struct i2c_board_info const *info,

@@ -53,4 +55,6 @@ struct omap_i2c_dev_attr {
 void __init omap1_i2c_mux_pins(int bus_id);
 void __init omap2_i2c_mux_pins(int bus_id);
 
+int omap_i2c_reset(struct omap_hwmod *oh);
+
 #endif /* __ASM__ARCH_OMAP_I2C_H */

arch/arm/plat-omap/include/plat/omap_hwmod.h +1 -0

index 1adea9c..9637130 100644
@@ -572,6 +572,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
 
 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
+void omap_hwmod_softreset(struct omap_hwmod *oh);
 
 int omap_hwmod_count_resources(struct omap_hwmod *oh);
 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);

Signature · 1 line

1.7.1

Paul Walmsley

maintainer

2011-05-05 21:58 UTC #1 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

Hello Avinash

Quoted 16 lines · Avinash.H.M

The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is
- Disable the I2C.
- Write to SOFTRESET bit.
- Enable the I2C.
- Poll on the RESETDONE bit.
The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen.
Cc Rajendra Nayak <[email protected]>
Cc Paul Walmsley <[email protected]>
Cc Benoit Cousson <[email protected]>
Cc Kevin Hilman <[email protected]>
Signed-off-by Avinash.H.M <[email protected]>

Quoted 6 lines

---
The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )

Please base all your patches against mainline commits. I suggest using v2.6.39-rc6.

Also some comments:

Quoted 47 lines

Changes from previous versions:
from v1:
- moved i2c specific things from hwmod files to i2c files.
- fixed comments from Paul.
- http://www.spinics.net/lists/linux-omap/msg49483.html
from v2:
- Avoided direct SYSCONFIG access in i2c.c
- http://www.spinics.net/lists/linux-omap/msg49632.html
Testing:
* build tested omap2plus_defconfig for warnings and errors. none introduced.
* boot tested on 2430.
* tested for 'core off' in suspend resume on 3430 sdp. core off counters increment after suspend resume.
 arch/arm/mach-omap2/i2c.c                    |   54 ++++++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod.c             |   12 ++++++
 arch/arm/mach-omap2/omap_hwmod_2420_data.c   |    1 +
 arch/arm/mach-omap2/omap_hwmod_2430_data.c   |    1 +
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c   |    1 +
 arch/arm/plat-omap/include/plat/i2c.h        |    4 ++
 arch/arm/plat-omap/include/plat/omap_hwmod.h |    1 +
 7 files changed, 74 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/i2c.c +7 -0
index 79c478c..bd50e26 100644
@@ -21,9 +21,16 @@
 
 #include <plat/cpu.h>
 #include <plat/i2c.h>
+#include <plat/common.h>
 
 #include "mux.h"
 
+/* In register I2C_CON, Bit 15 is the I2C enable bit */
+#define I2C_EN				BIT(15)
+#define I2C_CON_OFFSET			0x24
+/* Maximum microseconds to wait for OMAP module to softreset */
+#define MAX_MODULE_SOFTRESET_WAIT	10000
+
 void __init omap2_i2c_mux_pins(int bus_id)
 {
 	char mux_name[sizeof("i2c2_scl.i2c2_scl")];

arch/arm/mach-omap2/i2c.c void __init omap2_i2c_mux_pins(int bus_id) · line 49

Quoted 6 lines

arch/arm/mach-omap2/i2c.c +3 -0

@@ -37,3 +44,50 @@ void __init omap2_i2c_mux_pins(int bus_id)
 	sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
 	omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
 }
+
+/**
+ * omap_i2c_reset- reset the omap i2c module.

Please put a space before the dash.

Quoted 49 lines

arch/arm/mach-omap2/i2c.c +44 -0

+ * @oh: struct omap_hwmod *
+ *
+ * The i2c moudle in omap2, omap3 had a special sequence to reset. The
+ * sequence is:
+ * - Disable the I2C.
+ * - Write to SOFTRESET bit.
+ * - Enable the I2C.
+ * - Poll on the RESETDONE bit.
+ * The sequence is implemented in below function. This is called for 2420,
+ * 2430 and omap3.
+ */
+int omap_i2c_reset(struct omap_hwmod *oh)
+{
+	u32 v;
+	int c = 0;
+
+	/* Disable I2C */
+	v = omap_hwmod_read(oh, I2C_CON_OFFSET);
+	v = v & ~I2C_EN;
+	omap_hwmod_write(v, oh, I2C_CON_OFFSET);
+
+	/* Write to the SOFTRESET bit */
+	omap_hwmod_softreset(oh);
+
+	/* Enable I2C */
+	v = omap_hwmod_read(oh, I2C_CON_OFFSET);
+	v |= I2C_EN;
+	omap_hwmod_write(v, oh, I2C_CON_OFFSET);
+
+	/* Poll on RESETDONE bit */
+	omap_test_timeout((omap_hwmod_read(oh,
+				oh->class->sysc->syss_offs)
+				& SYSS_RESETDONE_MASK),
+				MAX_MODULE_SOFTRESET_WAIT, c);
+
+	if (c == MAX_MODULE_SOFTRESET_WAIT)
+		pr_warning("%s: %s: softreset failed (waited %d usec)\n",
+			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
+	else
+		pr_debug("%s: %s: softreset in %d usec\n", __func__,
+			oh->name, c);
+
+	return 0;
+}

arch/arm/mach-omap2/omap_hwmod.c +0 -0

index e034294..771fc15 100644

arch/arm/mach-omap2/omap_hwmod.c void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) · line 1563

Quoted 3 lines

arch/arm/mach-omap2/omap_hwmod.c +0 -0

@@ -1561,6 +1561,18 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
 		__raw_writel(v, oh->_mpu_rt_va + reg_offs);
 }

You're missing kerneldoc here. Please add it.

arch/arm/mach-omap2/omap_hwmod.c void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) · line 1574

Quoted 11 lines

arch/arm/mach-omap2/omap_hwmod.c +11 -0

+void omap_hwmod_softreset(struct omap_hwmod *oh)
+{
+	u32 v;
+
+	/* Write to the SOFTRESET bit in SYSCONFIG */
+	v = oh->_sysc_cache;
+	v |= (0x1 << oh->class->sysc->sysc_fields->srst_shift);
+
+	oh->_sysc_cache = v;
+	omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
+}

This is a public function, so you need to validate your oh argument and return an error if something isn't right. Similarly, you should use the existing function _set_softreset() to set the bit, because it also does some errorchecking.

Quoted 80 lines

arch/arm/mach-omap2/omap_hwmod.c +1 -0

+
 /**
  * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  * @oh: struct omap_hwmod *

arch/arm/mach-omap2/omap_hwmod_2420_data.c +1 -0

index e9a416c..fd386af 100644
@@ -1447,6 +1447,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
 static struct omap_hwmod_class i2c_class = {
 	.name		= "i2c",
 	.sysc		= &i2c_sysc,
+	.reset		= &omap_i2c_reset,
 	.rev		= OMAP_I2C_IP_VERSION_1,
 };

arch/arm/mach-omap2/omap_hwmod_2430_data.c +1 -0

index beedda6..4ad4188 100644
@@ -1524,6 +1524,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
 static struct omap_hwmod_class i2c_class = {
 	.name		= "i2c",
 	.sysc		= &i2c_sysc,
+	.reset		= &omap_i2c_reset,
 	.rev		= OMAP_I2C_IP_VERSION_1,
 };

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +1 -0

index dec1a38..e938810 100644
@@ -1460,6 +1460,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
 static struct omap_hwmod_class i2c_class = {
 	.name = "i2c",
 	.sysc = &i2c_sysc,
+	.reset = &omap_i2c_reset,
 	.rev  = OMAP_I2C_IP_VERSION_1,
 };

arch/arm/plat-omap/include/plat/i2c.h +4 -0

index fd75dad..20237c1 100644
@@ -24,6 +24,8 @@
 #include <linux/i2c.h>
 #include <linux/i2c-omap.h>
 
+#include <plat/omap_hwmod.h>
+
 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
 				 struct i2c_board_info const *info,

@@ -53,4 +55,6 @@ struct omap_i2c_dev_attr {
 void __init omap1_i2c_mux_pins(int bus_id);
 void __init omap2_i2c_mux_pins(int bus_id);
 
+int omap_i2c_reset(struct omap_hwmod *oh);
+
 #endif /* __ASM__ARCH_OMAP_I2C_H */

arch/arm/plat-omap/include/plat/omap_hwmod.h +1 -0

index 1adea9c..9637130 100644
@@ -572,6 +572,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
 
 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
+void omap_hwmod_softreset(struct omap_hwmod *oh);
 
 int omap_hwmod_count_resources(struct omap_hwmod *oh);
 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);

Signature · 6 lines

1.7.1

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- Paul

Avinash.H.M.

author

2011-05-09 12:48 UTC #2 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

On Thu, May 05, 2011 at 03:58:56PM -0600, Paul Walmsley wrote:

Hi Paul ,

Quoted 8 lines

Quoted 5 lines
The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )
Please base all your patches against mainline commits. I suggest using v2.6.39-rc6.

OK Paul. I will rebase against mainline, -rc6.

Quoted 9 lines

Also some comments:
Quoted 6 lines
Changes from previous versions:
from v1:
- moved i2c specific things from hwmod files to i2c files.
- fixed comments from Paul.
- http://www.spinics.net/lists/linux-omap/msg49483.html

Quoted 5 lines

arch/arm/mach-omap2/i2c.c void __init omap2_i2c_mux_pins(int bus_id) · line 49
Quoted 3 lines
arch/arm/mach-omap2/i2c.c +3 -0
+
+/**
+ * omap_i2c_reset- reset the omap i2c module.
Please put a space before the dash.

OK. I ll correct.

Quoted 15 lines

Quoted 12 lines
+ * @oh: struct omap_hwmod *
+ *
+ * The i2c moudle in omap2, omap3 had a special sequence to reset. The
+ * sequence is:
+ * - Disable the I2C.
+ * - Write to SOFTRESET bit.
+ * - Enable the I2C.
+ * - Poll on the RESETDONE bit.
+ * The sequence is implemented in below function. This is called for 2420,
+ * 2430 and omap3.
+ */
arch/arm/mach-omap2/i2c.c void __init omap2_i2c_mux_pins(int bus_id) · line 62
Quoted 2 lines
arch/arm/mach-omap2/i2c.c +2 -0
+int omap_i2c_reset(struct omap_hwmod *oh)
+{
You're missing kerneldoc here. Please add it.

OK. I ll add the kerneldoc.

Quoted 18 lines

arch/arm/mach-omap2/omap_hwmod.c void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) · line 1574
Quoted 12 lines
arch/arm/mach-omap2/omap_hwmod.c +11 -0
+void omap_hwmod_softreset(struct omap_hwmod *oh)
+{
+	u32 v;
+
+	/* Write to the SOFTRESET bit in SYSCONFIG */
+	v = oh->_sysc_cache;
+	v |= (0x1 << oh->class->sysc->sysc_fields->srst_shift);
+
+	oh->_sysc_cache = v;
+	omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
+}
This is a public function, so you need to validate your oh argument and return an error if something isn't right. Similarly, you should use the existing function _set_softreset() to set the bit, because it also does some errorchecking.

I agree. I ll use _set_softreset to set the bit and check for the argument sanity.

Quoted 5 lines

arch/arm/mach-omap2/omap_hwmod_2420_data.c
Quoted 5 lines
arch/arm/mach-omap2/omap_hwmod.c +1 -0
+
 /**
  * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  * @oh: struct omap_hwmod *
arch/arm/mach-omap2/omap_hwmod_2420_data.c +0 -0

thanks for reviewing.

- Avinash

Quoted 3 lines

- Paul

Paul Walmsley

maintainer

2011-05-18 16:22 UTC #3 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

Quoted 8 lines · Avinash.H.M.

Quoted 6 lines · Paul Walmsley
Quoted 5 lines
The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )

Quoted 4 lines

Quoted 2 lines
Please base all your patches against mainline commits. I suggest using v2.6.39-rc6.
OK Paul. I will rebase against mainline, -rc6.

Ping. Any progress?

- Paul

Avinash.H.M.

author

2011-05-18 16:25 UTC #4 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

Quoted 10 lines · Paul Walmsley

Quoted 8 lines · Avinash.H.M.
Quoted 6 lines · Paul Walmsley
Quoted 5 lines
The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )

Quoted 6 lines

Quoted 4 lines
Quoted 2 lines
Please base all your patches against mainline commits. I suggest using v2.6.39-rc6.
OK Paul. I will rebase against mainline, -rc6.
Ping. Any progress?

Hi Paul ,

I am having the patch ready. Haven't had a chance to test. I will test and send by tomorrow.

thanks ,

- Avinash

Quoted 3 lines

- Paul

Koyamangalath, Abhilash

2011-05-19 12:35 UTC #5 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

Quoted 20 lines · Paul Walmsley

Quoted 10 lines · Avinash.H.M.
Quoted 9 lines · Paul Walmsley
Quoted 7 lines
Quoted 6 lines
The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )
Quoted 6 lines
Quoted 4 lines
Quoted 2 lines
Please base all your patches against mainline commits. I suggest using v2.6.39-rc6.
OK Paul. I will rebase against mainline, -rc6.
Ping. Any progress?

Quoted 8 lines

Hi Paul ,
I am having the patch ready. Haven't had a chance to test. I will test and send by tomorrow.
thanks ,
- Avinash

I have tried the patch on am37x evm and the i2c soft-reset time-out issue doesn't seem to go off for me. Previously I used to get a log :

[    0.000000] omap_hwmod: i2c1: softreset failed (waited 10000 usec)                                                                                                            
[    0.000000] omap_hwmod: i2c2: softreset failed (waited 10000 usec)                                                                                                            
[    0.000000] omap_hwmod: i2c3: softreset failed (waited 10000 usec)

And now I get :

[    0.000000] omap_i2c_reset: i2c1: softreset failed (waited 10000 usec)
[    0.000000] omap_i2c_reset: i2c2: softreset failed (waited 10000 usec)
[    0.000000] omap_i2c_reset: i2c3: softreset failed (waited 10000 usec)

So the function where this failure happens seems to be the only thing that has changed. I've tried this patch on top of the recent PSP 04.02.00.07 release.
What am I missing?

thanks,
Abhilash

Quoted 3 lines

Quoted 3 lines
- Paul

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Avinash.H.M.

author

2011-05-24 19:07 UTC #6 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

Quoted 7 lines · Abhilash

I have tried the patch on am37x evm and the i2c soft-reset time-out issue doesn't seem to go off for me. Previously I used to get a log :

[    0.000000] omap_hwmod: i2c1: softreset failed (waited 10000 usec)                                                                                                            
[    0.000000] omap_hwmod: i2c2: softreset failed (waited 10000 usec)                                                                                                            
[    0.000000] omap_hwmod: i2c3: softreset failed (waited 10000 usec)

Quoted 8 lines

And now I get :
[    0.000000] omap_i2c_reset: i2c1: softreset failed (waited 10000 usec)
[    0.000000] omap_i2c_reset: i2c2: softreset failed (waited 10000 usec)
[    0.000000] omap_i2c_reset: i2c3: softreset failed (waited 10000 usec)
So the function where this failure happens seems to be the only thing that has changed. I've tried this patch on top of the recent PSP 04.02.00.07 release.
What am I missing?

Abhilash ,

I am not sure what is PSP 04.02.00.07 release. But you should make sure that the hwmod structures in omap_hwmod_3xxx_data.c should have the 16_bit flags.

Below is just a snippet in P.S.. There is already a patch submitted by andy green for this. Not sure, if it is merged.

With this and the posted v3 patch, you should not see timeouts. Or else you have some other problem.

thanks ,

- Avinash

PS:

 static struct omap_hwmod omap3xxx_i2c1_hwmod = {
        .name           = "i2c1",

+ .flags = HWMOD_16BIT_REG,

Quoted 13 lines

thanks,
Abhilash
Quoted 3 lines
Quoted 3 lines
- Paul
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Koyamangalath, Abhilash

2011-05-25 13:15 UTC #7 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

Quoted 33 lines · Abhilash

Quoted 8 lines
I have tried the patch on am37x evm and the i2c soft-reset time-out issue doesn't seem to go off for me. Previously I used to get a log :
[    0.000000] omap_hwmod: i2c1: softreset failed (waited 10000 usec)
[    0.000000] omap_hwmod: i2c2: softreset failed (waited 10000 usec)
[    0.000000] omap_hwmod: i2c3: softreset failed (waited 10000 usec)
Quoted 8 lines
And now I get :
[    0.000000] omap_i2c_reset: i2c1: softreset failed (waited 10000 usec)
[    0.000000] omap_i2c_reset: i2c2: softreset failed (waited 10000 usec)
[    0.000000] omap_i2c_reset: i2c3: softreset failed (waited 10000 usec)
So the function where this failure happens seems to be the only thing that has changed. I've tried this patch on top of the recent PSP 04.02.00.07 release.
What am I missing?
Abhilash ,
I am not sure what is PSP 04.02.00.07 release. But you should make sure that the hwmod structures in omap_hwmod_3xxx_data.c should have the 16_bit flags.
Below is just a snippet in P.S.. There is already a patch submitted by andy green for this. Not sure, if it is merged.
With this and the posted v3 patch, you should not see timeouts. Or else you have some other problem.
thanks ,

Quoted 7 lines

- Avinash
PS:
static struct omap_hwmod omap3xxx_i2c1_hwmod = {
       .name           = "i2c1",
+ .flags = HWMOD_16BIT_REG,

Yes Avinash, that works ,
thanks.

Quoted 15 lines

Quoted 11 lines
thanks,
Abhilash
Quoted 3 lines
Quoted 3 lines
- Paul
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Avinash.H.M.

author

2011-05-20 15:02 UTC #8 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

In reply to Avinash.H.M.

Quoted 14 lines · Avinash.H.M.

Quoted 13 lines · Paul Walmsley
Quoted 11 lines · Avinash.H.M.
Quoted 8 lines · Paul Walmsley
Quoted 5 lines
The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )
Please base all your patches against mainline commits. I suggest using v2.6.39-rc6.

Quoted 8 lines

Quoted 3 lines
Quoted 1 line
OK Paul. I will rebase against mainline, -rc6.
Ping. Any progress?
Hi Paul ,
I am having the patch ready. Haven't had a chance to test. I will test and send by tomorrow.

Hi Paul ,

I tested the patch on 3430 sdp today with the patch against 2.6.39-rc7.

I am seeing that the timeout is there during bootup event with this patch. Tried with the previous version (v3 , which was tested against the older commit and was confirmed to be working). With this also, i am seeing that the reset timeouts are still present.

So, looks like there is something broken. First glance, i suspect that the register access may not be proper. Need to debug more. I ll debug this and send the fix together.

Incase, if you want me to send this patch now and then send a seperate patch for the recent problem, do let me know.

thanks ,

- Avinash

Quoted 7 lines

thanks ,
- Avinash
Quoted 3 lines
- Paul

Avinash.H.M.

author

2011-05-20 15:38 UTC #9 lore raw

PATCH v3 1/1 OMAP2/3: hwmod: fix the i2c-reset timeout during bootup

Quoted 28 lines · Avinash.H.M.

Quoted 14 lines · Avinash.H.M.
Quoted 13 lines · Paul Walmsley
Quoted 11 lines · Avinash.H.M.
Quoted 8 lines · Paul Walmsley
Quoted 5 lines
The patch is based on
* git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
* master branch.
* 9be20f0 commit. ( Linux-omap rebuilt: Updated to -rc5 )
Please base all your patches against mainline commits. I suggest using v2.6.39-rc6.
Quoted 8 lines
Quoted 3 lines
Quoted 1 line
OK Paul. I will rebase against mainline, -rc6.
Ping. Any progress?
Hi Paul ,
I am having the patch ready. Haven't had a chance to test. I will test and send by tomorrow.
Hi Paul ,
I tested the patch on 3430 sdp today with the patch against 2.6.39-rc7.

Quoted 7 lines

I am seeing that the timeout is there during bootup event with this patch. Tried with the previous version (v3 , which was tested against the older commit and was confirmed to be working). With this also, i am seeing that the reset timeouts are still present.
So, looks like there is something broken. First glance, i suspect that the register access may not be proper. Need to debug more. I ll debug

Hi Paul ,

This turned out to be the issue. The register access weren't proper. I2C needs 16bit access. We need a flag 'HWMOD_16BIT_REG' added to i2c1,2,3 hwmods.

Andy Green has already submitted a patch for this and looks like it is not merged. After adding this patch, now no more timeouts are seen. I ll mention this dependency and submit v4.

thanks ,

- Avinash

Quoted 16 lines

this and send the fix together.
Incase, if you want me to send this patch now and then send a seperate patch for the recent problem, do let me know.
thanks ,
- Avinash
Quoted 7 lines
thanks ,
- Avinash
Quoted 3 lines
- Paul