x86 fixes/updates
Subsystems (4)
Linus,
Please pull the latest x86-urgent-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git x86-urgent-for-linus
The uv_tlb cleanups make up 95% of the diffstat - it does not affect any other x86 platform.
Thanks,
Ingo
------------------>
Boris Ostrovsky (1):
x86, amd: Do not enable ARAT feature on AMD processors below family 0x12
Cliff Wickman (1):
x86, UV: Clean up uv_tlb.c
Ingo Molnar (1):
x86, asm: Clean up desc.h a bit
Jack Steiner (1):
x86, UV: Add support for SGI UV2 hub chip
KOSAKI Motohiro (1):
x86: Move do_page_fault()'s error path under unlikely()
Kees Cook (1):
x86, cpufeature: Update CPU feature RDRND to RDRAND
Matthew Garrett (1):
x86, efi: Retain boot service code until after switching to virtual mode
Nikhil P Rao (1):
x86: Remove unnecessary check in detect_ht()
Richard Kennedy (1):
x86: Reorder mm_context_t to remove x86_64 alignment padding and thus shrink mm_struct
arch/x86/include/asm/cpufeature.h | 2 +- arch/x86/include/asm/desc.h | 152 ++-- arch/x86/include/asm/mmu.h | 4 +- arch/x86/include/asm/uv/uv_bau.h | 590 ++++++++++----- arch/x86/include/asm/uv/uv_hub.h | 71 ++- arch/x86/include/asm/uv/uv_mmrs.h | 1012 ++++++++++++++++++++----- arch/x86/kernel/apic/x2apic_uv_x.c | 40 +- arch/x86/kernel/cpu/amd.c | 7 +- arch/x86/kernel/cpu/common.c | 7 - arch/x86/kernel/setup.c | 7 + arch/x86/mm/fault.c | 35 +- arch/x86/platform/efi/efi.c | 45 ++- arch/x86/platform/efi/efi_64.c | 5 +- arch/x86/platform/uv/tlb_uv.c | 1484 ++++++++++++++++++++---------------- arch/x86/platform/uv/uv_time.c | 16 +- include/linux/efi.h | 1 + 16 files changed, 2284 insertions(+), 1194 deletions(-)
arch/x86/include/asm/cpufeature.h +1 -1
@@ -125,7 +125,7 @@#define X86_FEATURE_OSXSAVE (4*32+27)/* "" XSAVE enabled in the OS */ #define X86_FEATURE_AVX (4*32+28)/* Advanced Vector Extensions */ #define X86_FEATURE_F16C (4*32+29)/* 16-bit fp conversions */ -#define X86_FEATURE_RDRND (4*32+30)/* The RDRAND instruction */ +#define X86_FEATURE_RDRAND (4*32+30)/* The RDRAND instruction */ #define X86_FEATURE_HYPERVISOR (4*32+31)/* Running on a hypervisor */ /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
arch/x86/include/asm/desc.h +76 -76
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arch/x86/include/asm/mmu.h +2 -2
@@ -11,14 +11,14 @@typedef struct {void *ldt;int size; -struct mutex lock; -void *vdso;#ifdef CONFIG_X86_64 /* True if mm supports a task running in 32 bit compatibility mode. */ unsigned short ia32_compat;#endif +struct mutex lock; +void *vdso; }mm_context_t ;#ifdef CONFIG_SMP
arch/x86/include/asm/uv/uv_bau.h +386 -204
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arch/x86/include/asm/uv/uv_hub.h +58 -13
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arch/x86/include/asm/uv/uv_mmrs.h +822 -190
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arch/x86/kernel/apic/x2apic_uv_x.c +31 -9
@@ -91,6 +91,10 @@ static int __init early_get_pnodeid(void) m_n_config.v =uv_early_read_mmr (UVH_RH_GAM_CONFIG_MMR ); uv_min_hub_revision_id = node_id.s.revision; +if (node_id.s.part_number ==UV2_HUB_PART_NUMBER ) + uv_min_hub_revision_id +=UV2_HUB_REVISION_BASE -1 ; + + uv_hub_info->hub_revision = uv_min_hub_revision_id; pnode = (node_id.s.node_id >>1 ) & ((1 << m_n_config.s.n_skt) -1 );return pnode; }
@@ -112,17 +116,25 @@ static void __init early_get_apic_pnode_shift(void)*/ static void __init uv_set_apicid_hibit (void ) { -union uvh_lb_target_physical_apic_id_mask_u apicid_mask; +union uv1h_lb_target_physical_apic_id_mask_u apicid_mask; - apicid_mask.v =uv_early_read_mmr (UVH_LB_TARGET_PHYSICAL_APIC_ID_MASK ); - uv_apicid_hibits = apicid_mask.s.bit_enables &UV_APICID_HIBIT_MASK ; +if (is_uv1_hub ()) { + apicid_mask.v = +uv_early_read_mmr (UV1H_LB_TARGET_PHYSICAL_APIC_ID_MASK ); + uv_apicid_hibits = + apicid_mask.s1.bit_enables &UV_APICID_HIBIT_MASK ; + } }static int __init uv_acpi_madt_oem_check (char *oem_id,char *oem_table_id) { -int pnodeid; +int pnodeid, is_uv1, is_uv2; -if (!strcmp (oem_id,"SGI" )) { + is_uv1 = !strcmp (oem_id,"SGI" ); + is_uv2 = !strcmp (oem_id,"SGI2" ); +if (is_uv1 || is_uv2) { + uv_hub_info->hub_revision = + is_uv1 ?UV1_HUB_REVISION_BASE :UV2_HUB_REVISION_BASE ; pnodeid =early_get_pnodeid ();early_get_apic_pnode_shift (); x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
@@ -484,12 +496,19 @@ static __init void map_mmr_high(int max_pnode)static __init void map_mmioh_high (int max_pnode) {union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh; -int shift =UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT ; +int shift; mmioh.v =uv_read_local_mmr (UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR ); -if (mmioh.s.enable) -map_high ("MMIOH" , mmioh.s.base, shift, mmioh.s.m_io, +if (is_uv1_hub () && mmioh.s1.enable) { + shift =UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT ; +map_high ("MMIOH" , mmioh.s1.base, shift, mmioh.s1.m_io, + max_pnode, map_uc); + } +if (is_uv2_hub () && mmioh.s2.enable) { + shift =UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT ; +map_high ("MMIOH" , mmioh.s2.base, shift, mmioh.s2.m_io, max_pnode, map_uc); + } }static __init void map_low_mmrs (void )
@@ -736,13 +755,14 @@ void __init uv_system_init(void)unsigned long mmr_base, present, paddr;unsigned short pnode_mask, pnode_io_mask; +printk (KERN_INFO "UV: Found %s hub\n" ,is_uv1_hub () ?"UV1" :"UV2" );map_low_mmrs (); m_n_config.v =uv_read_local_mmr (UVH_RH_GAM_CONFIG_MMR ); m_val = m_n_config.s.m_skt; n_val = m_n_config.s.n_skt; mmioh.v =uv_read_local_mmr (UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR ); - n_io = mmioh.s.n_io; + n_io =is_uv1_hub () ? mmioh.s1.n_io : mmioh.s2.n_io; mmr_base =uv_read_local_mmr (UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR ) & ~UV_MMR_ENABLE ;
@@ -811,6 +831,8 @@ void __init uv_system_init(void)*/ uv_cpu_hub_info (cpu)->pnode_mask = pnode_mask;uv_cpu_hub_info (cpu)->apic_pnode_shift = uvh_apicid.s.pnode_shift; +uv_cpu_hub_info (cpu)->hub_revision = uv_hub_info->hub_revision; + pnode =uv_apicid_to_pnode (apicid); blade =boot_pnode_to_blade (pnode); lcpu = uv_blade_info[blade].nr_possible_cpus;
arch/x86/kernel/cpu/amd.c +5 -2
@@ -612,8 +612,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) }#endif -/* As a rule processors have APIC timer running in deep C states */ -if (c->x86 >0xf && !cpu_has_amd_erratum (amd_erratum_400)) +/* +* Family 0x12 and above processors have APIC timer +* running in deep C states. +*/ +if (c->x86 >0x11 )set_cpu_cap (c,X86_FEATURE_ARAT );/*
arch/x86/kernel/cpu/common.c +0 -7
@@ -477,13 +477,6 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)if (smp_num_siblings <=1 ) goto out; -if (smp_num_siblings > nr_cpu_ids) { -pr_warning ("CPU: Unsupported number of siblings %d" , - smp_num_siblings); - smp_num_siblings =1 ; -return ; - } - index_msb =get_count_order (smp_num_siblings); c->phys_proc_id = apic->phys_pkg_id (c->initial_apicid, index_msb);
arch/x86/kernel/setup.c +7 -0
@@ -910,6 +910,13 @@ void __init setup_arch(char **cmdline_p) memblock.current_limit =get_max_mapped ();memblock_x86_fill (); +/* +* The EFI specification says that boot service code won't be called +* after ExitBootServices(). This is, in fact, a lie. +*/ +if (efi_enabled) +efi_reserve_boot_services (); +/* preallocate 4k for mptable mpc */ early_reserve_e820_mpc_new ();
arch/x86/mm/fault.c +20 -15
@@ -823,16 +823,30 @@ do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,force_sig_info_fault (SIGBUS , code, address, tsk, fault); } -static noinline void +static noinline intmm_fault_error (struct pt_regs *regs,unsigned long error_code,unsigned long address,unsigned int fault) { +/* +* Pagefault was interrupted by SIGKILL. We have no reason to +* continue pagefault. +*/ +if (fatal_signal_pending (current)) { +if (!(fault &VM_FAULT_RETRY )) +up_read (¤t->mm->mmap_sem); +if (!(error_code &PF_USER )) +no_context (regs, error_code, address); +return 1 ; + } +if (!(fault &VM_FAULT_ERROR )) +return 0 ; +if (fault &VM_FAULT_OOM ) {/* Kernel mode? Handle exceptions or die: */ if (!(error_code &PF_USER )) {up_read (¤t->mm->mmap_sem);no_context (regs, error_code, address); -return ; +return 1 ; }out_of_memory (regs, error_code, address);
@@ -843,6 +857,7 @@ mm_fault_error(struct pt_regs *regs, unsigned long error_code,else BUG (); } +return 1 ; }static int spurious_fault_check (unsigned long error_code,pte_t *pte)
@@ -1133,19 +1148,9 @@ good_area:*/ fault =handle_mm_fault (mm, vma, address, flags); -if (unlikely (fault &VM_FAULT_ERROR )) { -mm_fault_error (regs, error_code, address, fault); -return ; - } - -/* -* Pagefault was interrupted by SIGKILL. We have no reason to -* continue pagefault. -*/ -if ((fault &VM_FAULT_RETRY ) &&fatal_signal_pending (current)) { -if (!(error_code &PF_USER )) -no_context (regs, error_code, address); -return ; +if (unlikely (fault & (VM_FAULT_RETRY |VM_FAULT_ERROR ))) { +if (mm_fault_error (regs, error_code, address, fault)) +return ; }/*
arch/x86/platform/efi/efi.c +44 -1
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arch/x86/platform/efi/efi_64.c +3 -2
@@ -49,10 +49,11 @@ static void __init early_code_mapping_set_exec(int executable)if (!(__supported_pte_mask & _PAGE_NX))return ; -/* Make EFI runtime service code area executable */ +/* Make EFI service code area executable */ for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { md = p; -if (md->type ==EFI_RUNTIME_SERVICES_CODE ) +if (md->type ==EFI_RUNTIME_SERVICES_CODE || + md->type ==EFI_BOOT_SERVICES_CODE )efi_set_executable (md, executable); } }
arch/x86/platform/uv/tlb_uv.c +816 -668
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