perf_event: fix Ming's Intel NHM/WSM/SNB uncore PMU patch

PATCH In review Stephane Eranian 2 participants 3 messages Aug 31, 2011 – Sep 1, 2011

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x86 perf events

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Stephane Eranian

author

2011-08-31 12:41 UTC #0 lore raw

PATCH 1/1 perf_event: fix Ming's Intel NHM/WSM/SNB uncore PMU patch

The following patch sits on top of Lin Ming's patch which adds support for Intel uncore PMU on NHM/WSM/SNB. The patch series was posted on LKML in July 2011.

The patches fixes:
- nhm_uncore_pmu_enable_all() to also enabled the fixed uncore counters
- uncore_pmu_add() to schedule for the actual max number of generic counters
- fixed the NHM/WSM vs. SNB MSRs for the fixed counter, they are swapped

The patch adds the following improvement:
- add an event group validation function, to check if a group can ever be schedule. This way, the behavior is consistent with core PMU event groups.

Signed-off-by Stephane Eranian <[email protected]>

---

arch/x86/include/asm/msr-index.h +5 -2

index e250977..283f292 100644
@@ -426,8 +426,11 @@
 
 /* Intel Nehalem/Westmere/SandyBridge uncore performance counters */
 #define MSR_UNCORE_PERF_GLOBAL_CTRL	0x00000391
-#define MSR_UNCORE_FIXED_CTR_CTRL	0x00000394
-#define MSR_UNCORE_FIXED_CTR0		0x00000395
+#define MSR_NHM_UNCORE_FIXED_CTR0	0x00000394
+#define MSR_NHM_UNCORE_FIXED_CTR_CTRL	0x00000395
+
+#define MSR_SNB_UNCORE_FIXED_CTR0	0x00000395
+#define MSR_SNB_UNCORE_FIXED_CTR_CTRL	0x00000394
 
 #define MSR_NHM_UNCORE_PMC0		0x000003b0
 #define MSR_NHM_UNCORE_PERFEVTSEL0	0x000003c0

arch/x86/kernel/cpu/perf_event_intel_uncore.c +53 -5

103 lines not on this page · raw message

arch/x86/kernel/cpu/perf_event_intel_uncore.h +2 -0

index c7392aa..79f3d19 100644
@@ -61,4 +61,6 @@ struct intel_uncore_pmu {
 	void		(*hw_config)(struct perf_event *event);
 	int		cntval_bits;
 	int		cntval_bits_fixed;
+	int		fixed_config_base;
+	int		fixed_event_base;
 };

Lin Ming

2011-09-01 12:41 UTC #1 lore raw

Quoted 9 lines · Stephane Eranian

The following patch sits on top of Lin Ming's patch which adds support for Intel uncore PMU on NHM/WSM/SNB. The patch series was posted on LKML in July 2011.
The patches fixes:
- nhm_uncore_pmu_enable_all() to also enabled the fixed uncore counters
- uncore_pmu_add() to schedule for the actual max number of generic counters
- fixed the NHM/WSM vs. SNB MSRs for the fixed counter, they are swapped

Quoted 5 lines

The patch adds the following improvement:
- add an event group validation function, to check if a group can ever be schedule. This way, the behavior is consistent with core PMU event groups.
Signed-off-by Stephane Eranian <[email protected]>

Can I merge this patch into my series with these change logs and your signed-off-by?

Thanks,
Lin Ming

Stephane Eranian

author

2011-09-01 12:45 UTC #2 lore raw

Quoted 10 lines · Lin Ming

Quoted 9 lines · Stephane Eranian
The following patch sits on top of Lin Ming's patch which adds support for Intel uncore PMU on NHM/WSM/SNB. The patch series was posted on LKML in July 2011.
The patches fixes:
- nhm_uncore_pmu_enable_all() to also enabled the fixed uncore counters
- uncore_pmu_add() to schedule for the actual max number of generic counters
- fixed the NHM/WSM vs. SNB MSRs for the fixed counter, they are swapped

Quoted 9 lines

Quoted 5 lines
The patch adds the following improvement:
- add an event group validation function, to check if a group can ever be schedule. This way, the behavior is consistent with core PMU event groups.
Signed-off-by Stephane Eranian <[email protected]>
Can I merge this patch into my series with these change logs and your signed-off-by?

Yes.

Quoted 4 lines

Thanks,
Lin Ming