ARM Realview PCIX preparation
Subsystems (2)
v3 cover ARM Realview PCIX preparation
This is a resend of some patches that were posted before.
The following series implements the preparatory work for adding PCI support to the ARM Realview family of boards.
---
Colin Tuckley (3):
RM Realview PCIX board file changes
ARM Realview PCIX IRQ include file changes
ARM Realview PCIX map include file changes
arch/arm/mach-realview/include/mach/board-pb11mp.h | 11 ---- arch/arm/mach-realview/include/mach/board-pba8.h | 11 ---- arch/arm/mach-realview/include/mach/board-pbx.h | 11 ---- arch/arm/mach-realview/include/mach/hardware.h | 53 ++++++++++++++++++++ arch/arm/mach-realview/include/mach/io.h | 18 ++++++- arch/arm/mach-realview/include/mach/irqs-pb11mp.h | 11 ++++ arch/arm/mach-realview/include/mach/irqs-pba8.h | 7 ++- arch/arm/mach-realview/include/mach/irqs-pbx.h | 7 ++- arch/arm/mach-realview/include/mach/platform.h | 15 +----- arch/arm/mach-realview/realview_pb11mp.c | 18 +++++++ arch/arm/mach-realview/realview_pba8.c | 18 +++++-- arch/arm/mach-realview/realview_pbx.c | 16 +++++- 12 files changed, 140 insertions(+), 56 deletions(-)
Signature · 1 line
Colin
PATCH v3 1/3 ARM Realview PCIX map include file changes
This patch adds the memory map PCI support to the include files for the Realview Northbridge based boards.
---
arch/arm/mach-realview/include/mach/board-pb11mp.h | 11 ---- arch/arm/mach-realview/include/mach/board-pba8.h | 11 ---- arch/arm/mach-realview/include/mach/board-pbx.h | 11 ---- arch/arm/mach-realview/include/mach/hardware.h | 53 ++++++++++++++++++++ arch/arm/mach-realview/include/mach/io.h | 18 ++++++- arch/arm/mach-realview/include/mach/platform.h | 15 +----- 6 files changed, 72 insertions(+), 47 deletions(-)
arch/arm/mach-realview/include/mach/board-pb11mp.h +0 -11
@@ -62,17 +62,6 @@#define REALVIEW_PB11MP_SYS_PLD_CTRL1 0x74/* -* PB11MPCore PCI regions -*/ -#define REALVIEW_PB11MP_PCI_BASE 0x90040000/* PCI-X Unit base */ -#define REALVIEW_PB11MP_PCI_IO_BASE 0x90050000/* IO Region on AHB */ -#define REALVIEW_PB11MP_PCI_MEM_BASE 0xA0000000/* MEM Region on AHB */ - -#define REALVIEW_PB11MP_PCI_BASE_SIZE 0x10000/* 16 Kb */ -#define REALVIEW_PB11MP_PCI_IO_SIZE 0x1000/* 4 Kb */ -#define REALVIEW_PB11MP_PCI_MEM_SIZE 0x20000000/* 512 MB */ - -/* * Testchip peripheral and fpga gic regions */ #define REALVIEW_TC11MP_SCU_BASE 0x1F000000/* IRQ, Test chip */
arch/arm/mach-realview/include/mach/board-pba8.h +0 -11
@@ -59,15 +59,4 @@#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74 -/* -* PBA8 PCI regions -*/ -#define REALVIEW_PBA8_PCI_BASE 0x90040000/* PCI-X Unit base */ -#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000/* IO Region on AHB */ -#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000/* MEM Region on AHB */ - -#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000/* 16 Kb */ -#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000/* 4 Kb */ -#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000/* 512 MB */ -#endif /* __ASM_ARCH_BOARD_PBA8_H */
arch/arm/mach-realview/include/mach/board-pbx.h +0 -11
@@ -70,17 +70,6 @@#define REALVIEW_PBX_SYS_PLD_CTRL1 0x74/* -* PBX PCI regions -*/ -#define REALVIEW_PBX_PCI_BASE 0x90040000/* PCI-X Unit base */ -#define REALVIEW_PBX_PCI_IO_BASE 0x90050000/* IO Region on AHB */ -#define REALVIEW_PBX_PCI_MEM_BASE 0xA0000000/* MEM Region on AHB */ - -#define REALVIEW_PBX_PCI_BASE_SIZE 0x10000/* 16 Kb */ -#define REALVIEW_PBX_PCI_IO_SIZE 0x1000/* 4 Kb */ -#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000/* 512 MB */ - -/* * Core tile identification (REALVIEW_SYS_PROCID) */ #define REALVIEW_PBX_PROC_MASK 0xFF000000
arch/arm/mach-realview/include/mach/hardware.h +53 -0
59 lines not on this page · raw message
arch/arm/mach-realview/include/mach/io.h +17 -1
@@ -20,9 +20,25 @@#ifndef __ASM_ARM_ARCH_IO_H#define __ASM_ARM_ARCH_IO_H +#include <asm/mach-types.h> +#include <mach/hardware.h> +#define IO_SPACE_LIMIT 0xffffffff -#define __io (a) __typesafe_io(a) +static inline void __iomem *__io (unsigned long addr) +{ +#ifdef CONFIG_PCI +/* check for PCI I/O space */ +if (addr >=REALVIEW_PB_PCI_IO_BASE && addr <=REALVIEW_PB_PCI_IO_LIMIT ) +return (void __iomem *)((addr -REALVIEW_PB_PCI_IO_BASE ) +REALVIEW_PCI_IO_VBASE ); +else +return (void __iomem *)addr; +#else +return (void __iomem *)addr; +#endif +} + +#define __io (a) __io(a)#define __mem_pci (a) (a)#endif
arch/arm/mach-realview/include/mach/platform.h +2 -13
@@ -77,6 +77,7 @@#define REALVIEW_SYS_BOOTCS_OFFSET 0x58#define REALVIEW_SYS_24MHz_OFFSET 0x5C#define REALVIEW_SYS_MISC_OFFSET 0x60 +#define REALVIEW_SYS_PCI_STAT_OFFSET 0x6C#define REALVIEW_SYS_IOSEL_OFFSET 0x70#define REALVIEW_SYS_PROCID_OFFSET 0x84#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
@@ -111,6 +112,7 @@#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET) +#define REALVIEW_SYS_PCI_STAT (REALVIEW_SYS_BASE + REALVIEW_SYS_PCI_STAT_OFFSET)#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
@@ -174,19 +176,6 @@#define REALVIEW_DMC_BASE 0x10018000/* DMC configuration */ #define REALVIEW_DMAC_BASE 0x10030000/* DMA controller */ -/* PCI space */ -#define REALVIEW_PCI_BASE 0x41000000/* PCI Interface */ -#define REALVIEW_PCI_CFG_BASE 0x42000000 -#define REALVIEW_PCI_MEM_BASE0 0x44000000 -#define REALVIEW_PCI_MEM_BASE1 0x50000000 -#define REALVIEW_PCI_MEM_BASE2 0x60000000 -/* Sizes of above maps */ -#define REALVIEW_PCI_BASE_SIZE 0x01000000 -#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000 -#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000/* 32Mb */ -#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000/* 256Mb */ -#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000/* 256Mb */ -#define REALVIEW_SDRAM67_BASE 0x70000000/* SDRAM banks 6 and 7 */ #define REALVIEW_LT_BASE 0x80000000/* Logic Tile expansion */
PATCH v3 1/3 ARM Realview PCIX map include file changes
Quoted 5 lines · Colin Tuckley
This patch adds the memory map PCI support to the include files for the Realview Northbridge based boards.
Signed-off-by Colin Tuckley <[email protected]>Acked-by Catalin Marinas <[email protected]>
Hi Colin,
I think we've discussed this before. I think it's good to have PCI support enabled in realview, but please do the PIO window properly.
Quoted 6 lines
arch/arm/mach-realview/include/mach/hardware.h +2
-0+/* +* PCI space physical addresses and sizes
arch/arm/mach-realview/include/mach/hardware.h line 46
Quoted 10 lines
arch/arm/mach-realview/include/mach/hardware.h +10
-0+*/ +#define REALVIEW_PB_PCI_BASE 0x90040000/* PCI-X Unit base */ +#define REALVIEW_PB_PCI_BASE_SIZE 0x00010000/* 4 Kb + 60Kb reserved */ +#define REALVIEW_PB_PCI_IO_BASE 0x90050000/* IO Region on AHB */ +#define REALVIEW_PB_PCI_IO_SIZE 0x00010000/* 64 Kb */ +#define REALVIEW_PB_PCI_IO_LIMIT (REALVIEW_PB_PCI_IO_BASE + REALVIEW_PB_PCI_IO_SIZE - 1) +#define REALVIEW_PB_PCI_MEM_BASE 0xA0000000/* MEM Region on AHB */ +#define REALVIEW_PB_PCI_MEM_SIZE 0x20000000/* 512 MB */ + +#define REALVIEW_ISSP_REG_BASE 0x100E3000
As you write here, the I/O window size is 64KB, which is totally normal for PCI buses.
arch/arm/mach-realview/include/mach/hardware.h line 57
Quoted 10 lines
arch/arm/mach-realview/include/mach/hardware.h +10
-0+#ifdef CONFIG_PCI +#if !defined(__ASSEMBLY__) +static inline unsigned int pcibios_min_io (void ) +{ +if (machine_is_realview_pb11mp () ||machine_is_realview_pba8 () || +machine_is_realview_pbx ()) +return REALVIEW_PB_PCI_IO_BASE ; +else +return 0 ; +}
pcibios_min_io should be 0x1000 as a constant, in order to get the ISA addresses out of the way, but there is no need to make it board dependent.
arch/arm/mach-realview/include/mach/hardware.h line 67
Quoted 9 lines
arch/arm/mach-realview/include/mach/hardware.h +9
-0+static inline unsigned int pcibios_min_mem (void ) +{ +if (machine_is_realview_pb11mp () ||machine_is_realview_pba8 () || +machine_is_realview_pbx ()) +return REALVIEW_PB_PCI_MEM_BASE ; +else +return 0 ; +} +#endif
Just hardcode this to REALVIEW_PB_PCI_MEM_BASE
arch/arm/mach-realview/include/mach/io.h line 26
Quoted 12 lines
arch/arm/mach-realview/include/mach/io.h +3
-0@@ -20,9 +20,25 @@#ifndef __ASM_ARM_ARCH_IO_H#define __ASM_ARM_ARCH_IO_H +#include <asm/mach-types.h> +#include <mach/hardware.h> +#define IO_SPACE_LIMIT 0xffffffff
The IO_SPACE_LIMIT should match the REALVIEW_PB_PCI_IO_BASE above.
arch/arm/mach-realview/include/mach/io.h line 39
Quoted 13 lines
arch/arm/mach-realview/include/mach/io.h +12
-1-#define __io (a) __typesafe_io(a) +static inline void __iomem *__io (unsigned long addr) +{ +#ifdef CONFIG_PCI +/* check for PCI I/O space */ +if (addr >=REALVIEW_PB_PCI_IO_BASE && addr <=REALVIEW_PB_PCI_IO_LIMIT ) +return (void __iomem *)((addr -REALVIEW_PB_PCI_IO_BASE ) +REALVIEW_PCI_IO_VBASE ); +else +return (void __iomem *)addr; +#else +return (void __iomem *)addr; +#endif +}
And there is no need to do these tricks when you only have a single PCI bus. Just define the PIO window to be based on zero and 64K in size, and hardcode that, to end up with
#define __io(a) (REALVIEW_PCI_IO_VBASE + (a & IO_SPACE_LIMIT))
Arnd
PATCH v3 1/3 ARM Realview PCIX map include file changes
Quoted 8 lines · Arnd Bergmann
Quoted 8 lines
arch/arm/mach-realview/include/mach/io.h +0
-0@@ -20,9 +20,25 @@#ifndef __ASM_ARM_ARCH_IO_H#define __ASM_ARM_ARCH_IO_H
Quoted 7 lines
arch/arm/mach-realview/include/mach/io.h line 26
Quoted 4 lines
arch/arm/mach-realview/include/mach/io.h +3
-0+#include <asm/mach-types.h> +#include <mach/hardware.h> +#define IO_SPACE_LIMIT 0xffffffffThe
IO_SPACE_LIMITshould match theREALVIEW_PB_PCI_IO_BASEabove.
This obviously should be REALVIEW_PB_PCI_IO_SIZE.
Arnd
PATCH v3 1/3 ARM Realview PCIX map include file changes
In reply to Arnd BergmannColin,
Please can you answer Arnd's concerns. He's right that these points have been brought up before, they've also been discussed on the list a number of times with regards to other platforms too.
Note that Arnd sent a follow-up email to the one below correcting a small mistake in his comments.
Thanks.
Quoted 101 lines · Arnd Bergmann
Quoted 5 lines · Colin Tuckley
This patch adds the memory map PCI support to the include files for the Realview Northbridge based boards.
Signed-off-by Colin Tuckley <[email protected]>Acked-by Catalin Marinas <[email protected]>Hi Colin,
I think we've discussed this before. I think it's good to have PCI support enabled in realview, but please do the PIO window properly.
Quoted 6 lines
arch/arm/mach-realview/include/mach/hardware.h +2
-0+/* +* PCI space physical addresses and sizes arch/arm/mach-realview/include/mach/hardware.h line 46
Quoted 10 lines
arch/arm/mach-realview/include/mach/hardware.h +10
-0+*/ +#define REALVIEW_PB_PCI_BASE 0x90040000/* PCI-X Unit base */ +#define REALVIEW_PB_PCI_BASE_SIZE 0x00010000/* 4 Kb + 60Kb reserved */ +#define REALVIEW_PB_PCI_IO_BASE 0x90050000/* IO Region on AHB */ +#define REALVIEW_PB_PCI_IO_SIZE 0x00010000/* 64 Kb */ +#define REALVIEW_PB_PCI_IO_LIMIT (REALVIEW_PB_PCI_IO_BASE + REALVIEW_PB_PCI_IO_SIZE - 1) +#define REALVIEW_PB_PCI_MEM_BASE 0xA0000000/* MEM Region on AHB */ +#define REALVIEW_PB_PCI_MEM_SIZE 0x20000000/* 512 MB */ + +#define REALVIEW_ISSP_REG_BASE 0x100E3000As you write here, the I/O window size is 64KB, which is totally normal for PCI buses.
arch/arm/mach-realview/include/mach/hardware.h line 57
Quoted 10 lines
arch/arm/mach-realview/include/mach/hardware.h +10
-0+#ifdef CONFIG_PCI +#if !defined(__ASSEMBLY__) +static inline unsigned int pcibios_min_io (void ) +{ +if (machine_is_realview_pb11mp () ||machine_is_realview_pba8 () || +machine_is_realview_pbx ()) +return REALVIEW_PB_PCI_IO_BASE ; +else +return 0 ; +}
pcibios_min_ioshould be0x1000as a constant, in order to get the ISA addresses out of the way, but there is no need to make it board dependent.arch/arm/mach-realview/include/mach/hardware.h line 67
Quoted 9 lines
arch/arm/mach-realview/include/mach/hardware.h +9
-0+static inline unsigned int pcibios_min_mem (void ) +{ +if (machine_is_realview_pb11mp () ||machine_is_realview_pba8 () || +machine_is_realview_pbx ()) +return REALVIEW_PB_PCI_MEM_BASE ; +else +return 0 ; +} +#endif Just hardcode this to
REALVIEW_PB_PCI_MEM_BASEarch/arm/mach-realview/include/mach/io.h line 26
Quoted 12 lines
arch/arm/mach-realview/include/mach/io.h +3
-0@@ -20,9 +20,25 @@#ifndef __ASM_ARM_ARCH_IO_H#define __ASM_ARM_ARCH_IO_H +#include <asm/mach-types.h> +#include <mach/hardware.h> +#define IO_SPACE_LIMIT 0xffffffffThe
IO_SPACE_LIMITshould match theREALVIEW_PB_PCI_IO_BASEabove.arch/arm/mach-realview/include/mach/io.h line 39
Quoted 13 lines
arch/arm/mach-realview/include/mach/io.h +12
-1-#define __io (a) __typesafe_io(a) +static inline void __iomem *__io (unsigned long addr) +{ +#ifdef CONFIG_PCI +/* check for PCI I/O space */ +if (addr >=REALVIEW_PB_PCI_IO_BASE && addr <=REALVIEW_PB_PCI_IO_LIMIT ) +return (void __iomem *)((addr -REALVIEW_PB_PCI_IO_BASE ) +REALVIEW_PCI_IO_VBASE ); +else +return (void __iomem *)addr; +#else +return (void __iomem *)addr; +#endif +}And there is no need to do these tricks when you only have a single PCI bus. Just define the PIO window to be based on zero and 64K in size, and hardcode that, to end up with
#define
__io(a)(REALVIEW_PCI_IO_VBASE+ (a &IO_SPACE_LIMIT))Arnd
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v3 1/3 ARM Realview PCIX map include file changes
Quoted 5 lines
-----Original Message-----
from Russell King - ARM Linux
Subject: Re: [PATCH 1/3 v3] ARM Realview PCIX map include file changesPlease can you answer Arnd's concerns.
I'm looking at his comments incl the correction.
I'm about to move house and so I'm intermittently on holiday for the next couple of weeks so things might be delayed slightly. If you want to take the patches as they are and we can fix them later then that's ok by me - or maybe Arnd can do it if he sees it as urgent. I'll be validating his ideas on the hardware whatever happens.
Colin
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
PATCH v3 1/3 ARM Realview PCIX map include file changes
In reply to Arnd BergmannQuoted 3 lines
-----Original Message-----
From: Arnd Bergmann [mailto:arnd at arndb.de]
Subject: Re: [PATCH 1/3 v3] ARM Realview PCIX map include file changes
Sorry it's taken a while to get back to you on this.
Quoted 3 lines
I think we've discussed this before. I think it's good to have PCI support enabled in realview, but please do the PIO window properly.
I think Catalin wrote that bit originally.
Quoted 6 lines
Review
Quoted 1 line
(quoted diff) +0
-0
b/arch/arm/mach-realview/include/mach/hardware.hAs you write here, the I/O window size is 64KB, which is totally normal for PCI buses.
Quoted 14 lines
arch/arm/mach-realview/include/mach/hardware.h line 57
Quoted 10 lines
arch/arm/mach-realview/include/mach/hardware.h +10
-0+#ifdef CONFIG_PCI +#if !defined(__ASSEMBLY__) +static inline unsigned int pcibios_min_io (void ) +{ +if (machine_is_realview_pb11mp () ||machine_is_realview_pba8 () || +machine_is_realview_pbx ()) +return REALVIEW_PB_PCI_IO_BASE ; +else +return 0 ; +}
pcibios_min_ioshould be0x1000as a constant, in order to get the ISA addresses out of the way, but there is no need to make it board dependent.
REALVIEW_PB_PCI_IO_BASE is currently 0x90050000, which works, so why would I change pcibios_min_io to 0x1000 ?
Quoted 12 lines
arch/arm/mach-realview/include/mach/hardware.h line 67
Quoted 10 lines
arch/arm/mach-realview/include/mach/hardware.h +9
-0+static inline unsigned int pcibios_min_mem (void ) +{ +if (machine_is_realview_pb11mp () ||machine_is_realview_pba8 () || +machine_is_realview_pbx ()) +return REALVIEW_PB_PCI_MEM_BASE ; +else +return 0 ; +} +#endif Just hardcode this to
REALVIEW_PB_PCI_MEM_BASE
OK.
Quoted 3 lines
Quoted 1 line
#define
IO_SPACE_LIMIT0xffffffffThe
IO_SPACE_LIMITshould match theREALVIEW_PB_PCI_IO_SIZEabove.
Agreed.
Quoted 20 lines
arch/arm/mach-realview/include/mach/io.h
Quoted 6 lines
arch/arm/mach-realview/include/mach/io.h +5
-1-#define __io (a) __typesafe_io(a) +static inline void __iomem *__io (unsigned long addr) +{ +#ifdef CONFIG_PCI +/* check for PCI I/O space */ + if (addr >= REALVIEW_PB_PCI_IO_BASE && addr <=
REALVIEW_PB_PCI_IO_LIMIT)Quoted 1 line
+ return (void
__iomem*)((addr -REALVIEW_PB_PCI_IO_BASE) +
REALVIEW_PCI_IO_VBASE);arch/arm/mach-realview/include/mach/io.h line 39
Quoted 6 lines
arch/arm/mach-realview/include/mach/io.h +6
-0+ else + return (void __iomem *)addr; +#else +return (void __iomem *)addr; +#endif +}And there is no need to do these tricks when you only have a single PCI bus. Just define the PIO window to be based on zero and 64K in size, and hardcode that, to end up with
Quoted 1 line
#define
__io(a)(REALVIEW_PCI_IO_VBASE+ (a &IO_SPACE_LIMIT))
I tried this, the kernel fails to boot! Can you explain how you think your version works please?
Colin
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
PATCH v3 1/3 ARM Realview PCIX map include file changes
Quoted 6 lines · Colin Tuckley
Quoted 3 lines
pcibios_min_ioshould be0x1000as a constant, in order to get the ISA addresses out of the way, but there is no need to make it board dependent.
REALVIEW_PB_PCI_IO_BASEis currently0x90050000, which works, so why would I changepcibios_min_ioto0x1000?
All the points in this email all go together.
This is how it works:
1. The PCI IO window is _supposed_ to be 64K in size.
2. "pcibios_min_io" sets the minimum offset into the PCI IO window which PCI IO BARs should be assigned. It is assumed that a PCI IO BAR value of 0 corresponds with the virtual base address of this window.
3. inb() et.al. take the PCI IO offset and _not_ the physical address nor the virtual address of the desired access.
This is so that existing drivers - including VGA card drivers - can work. There are many PCI cards which require accesses to specific IO locations not listed in their BARs for initialization etc.
Moreover, we're trying to work towards having a single fixed 64k PCI IO virtual mapping across all platforms (so that this shows up at the same virtual address no matter what platform.) Not having this is a blocker to the multi-platform activity which Linaro is tasked with.
PATCH v3 1/3 ARM Realview PCIX map include file changes
Quoted 5 lines
-----Original Message-----
From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
Subject: Re: [PATCH 1/3 v3] ARM Realview PCIX map include file changesAll the points in this email all go together.
Ah, that wasn't clear from the original email - I was making the changes incrementally and testing as I went.
Quoted 3 lines
This is how it works:
1. The PCI IO window is _supposed_ to be 64K in size.
Yes, that bit was obvious after a bit of thought. I suspect the original value was just a cut 'n paste error.
Quoted 7 lines
2. "
pcibios_min_io" sets the minimum offset into the PCI IO window which
PCI IO BARs should be assigned. It is assumed that a PCI IO BAR
value
of 0 corresponds with the virtual base address of this window.
3.inb()et.al. take the PCI IO offset and _not_ the physical address nor the virtual address of the desired access.
That seems sensible.
However, after changing both __io() and pcibios_min_io as Arnd suggested the boot still hangs after " Uncompressing Linux... done, booting the kernel."
I did notice that there seems to have been some code changes and refactoring in the pci sub-system between 3.1 and 2.6.38 where I was testing before. Are there any significant changes I should be aware of?
Colin
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
PATCH v3 1/3 ARM Realview PCIX map include file changes
Quoted 16 lines · Colin Tuckley
Ah, that wasn't clear from the original email - I was making the changes incrementally and testing as I went.
Quoted 3 lines
This is how it works:
1. The PCI IO window is supposed to be 64K in size.
Yes, that bit was obvious after a bit of thought. I suspect the original value was just a cut 'n paste error.
Quoted 7 lines
2. "
pcibios_min_io" sets the minimum offset into the PCI IO window which
PCI IO BARs should be assigned. It is assumed that a PCI IO BAR
value
of 0 corresponds with the virtual base address of this window.
3.inb()et.al. take the PCI IO offset and not the physical address nor the virtual address of the desired access.
Quoted 4 lines
That seems sensible.
However, after changing both
__io()andpcibios_min_ioas Arnd suggested the boot still hangs after " Uncompressing Linux... done, booting the kernel."
No idea. If you send me the full patch, I'll have a look if I can spot something odd. I can very much recommend debugging this in qemu, which should support booting your kernels and provide you a gdb interface to see what's going on.
I noticed that the original code (without your patch) describes a 4KB I/O space window. Maybe there is a hardware limitation and you actually have to set PCIBIOS_MIN_IO to zero and IO_SPACE_LIMIT to 0xFFF. This would however be a fairly unusual hw quirk.
Quoted 4 lines
I did notice that there seems to have been some code changes and refactoring in the pci sub-system between 3.1 and 2.6.38 where I was testing before. Are there any significant changes I should be aware of?
Nothing major, no. There are always patches going in there, but the fundamental bits stay very stable.
Arnd
PATCH v3 1/3 ARM Realview PCIX map include file changes
In reply to Colin TuckleyQuoted 22 lines · Colin Tuckley
Quoted 5 lines
-----Original Message-----
From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
Subject: Re: [PATCH 1/3 v3] ARM Realview PCIX map include file changesAll the points in this email all go together.
Ah, that wasn't clear from the original email - I was making the changes incrementally and testing as I went.
Quoted 3 lines
This is how it works:
1. The PCI IO window is _supposed_ to be 64K in size.
Yes, that bit was obvious after a bit of thought. I suspect the original value was just a cut 'n paste error.
Quoted 7 lines
2. "
pcibios_min_io" sets the minimum offset into the PCI IO window which
? ?PCI IO BARs should be assigned. ?It is assumed that a PCI IO BAR value
? ?of 0 corresponds with the virtual base address of this window.
3.inb()et.al. take the PCI IO offset and _not_ the physical address nor the virtual address of the desired access.
Quoted 3 lines
That seems sensible.
However, after changing both
__io()andpcibios_min_ioas Arnd suggested the boot still hangs after " Uncompressing Linux... done, booting the kernel."
I haven't followed the patch series in detail but the __io() is also used by __io_address() in the RealView code and the former is just expected to do some type casting. By doing some arithmetic on the pointer, the static mappings for various peripherals (GIC etc.) are wrong.
So if you convert __io() as per Arnd's suggestion, make sure that __io_address() is redefined, something like below:
#define __io_address(n) __typesafe_io(IO_ADDRESS(n))
Alternatively we could leave __io() as in the original kernel and define RealView specific in*/out* macros.
Signature · 1 line
Catalin
PATCH v3 1/3 ARM Realview PCIX map include file changes
Quoted 8 lines · Catalin Marinas
Quoted 1 line
However, after changing both
__io()andpcibios_min_ioas Arnd suggested the boot still hangs after " Uncompressing Linux... done, booting the kernel."I haven't followed the patch series in detail but the
__io()is also used by__io_address()in the RealView code and the former is just expected to do some type casting. By doing some arithmetic on the pointer, the static mappings for various peripherals (GIC etc.) are wrong.
Quoted 4 lines
So if you convert
__io()as per Arnd's suggestion, make sure that__io_address()is redefined, something like below:#define
__io_address(n)__typesafe_io(IO_ADDRESS(n))
Ah, right. That definitely explains why it would not boot.
Quoted 2 lines
Alternatively we could leave
__io()as in the original kernel and define RealView specific in*/out* macros.
I wouldn't recommend that, since that would just have to be reverted as we get closer to having a single zimage across platforms. Your suggested fix above should be enough.
Arnd
PATCH v3 2/3 ARM Realview PCIX IRQ include file changes
In reply to Colin TuckleyThis patch adds the Interrupt definitions for the PCI support on the Realview boards.
---
arch/arm/mach-realview/include/mach/irqs-pb11mp.h | 11 +++++++++++ arch/arm/mach-realview/include/mach/irqs-pba8.h | 7 ++++++- arch/arm/mach-realview/include/mach/irqs-pbx.h | 7 ++++++- 3 files changed, 23 insertions(+), 2 deletions(-)
arch/arm/mach-realview/include/mach/irqs-pb11mp.h +11 -0
@@ -95,6 +95,17 @@#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30)/* Touchscreen pen */ #define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31)/* Touchscreen keypad */ +/* These PCI/PCIe IRQ definitions are here as placeholders +* The PCI code actually calculates the irq used at runtime */ +#define IRQ_PB11MP_PCI0 (IRQ_PB11MP_GIC_START + 50) +#define IRQ_PB11MP_PCI1 (IRQ_PB11MP_GIC_START + 51) +#define IRQ_PB11MP_PCI2 (IRQ_PB11MP_GIC_START + 52) +#define IRQ_PB11MP_PCI3 (IRQ_PB11MP_GIC_START + 53) +#define IRQ_PB11MP_PCIE0 (IRQ_PB11MP_GIC_START + 54) +#define IRQ_PB11MP_PCIE1 (IRQ_PB11MP_GIC_START + 55) +#define IRQ_PB11MP_PCIE2 (IRQ_PB11MP_GIC_START + 56) +#define IRQ_PB11MP_PCIE3 (IRQ_PB11MP_GIC_START + 57) +#define IRQ_PB11MP_SMC -1#define IRQ_PB11MP_SCTL -1
arch/arm/mach-realview/include/mach/irqs-pba8.h +6 -1
@@ -61,11 +61,16 @@#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47)/* Cortex-A8 PMU */ -/* ... */ +/* These PCI/PCIe IRQ definitions are here as placeholders +* The PCI code actually calculates the irq used at runtime */ #define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53) +#define IRQ_PBA8_PCIE0 (IRQ_PBA8_GIC_START + 54) +#define IRQ_PBA8_PCIE1 (IRQ_PBA8_GIC_START + 55) +#define IRQ_PBA8_PCIE2 (IRQ_PBA8_GIC_START + 56) +#define IRQ_PBA8_PCIE3 (IRQ_PBA8_GIC_START + 57)#define IRQ_PBA8_SMC -1#define IRQ_PBA8_SCTL -1
arch/arm/mach-realview/include/mach/irqs-pbx.h +6 -1
@@ -76,11 +76,16 @@#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 46)#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 47) -/* ... */ +/* These PCI/PCIe IRQ definitions are here as placeholders +* The PCI code actually calculates the irq used at runtime */ #define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53) +#define IRQ_PBX_PCIE0 (IRQ_PBX_GIC_START + 54) +#define IRQ_PBX_PCIE1 (IRQ_PBX_GIC_START + 55) +#define IRQ_PBX_PCIE2 (IRQ_PBX_GIC_START + 56) +#define IRQ_PBX_PCIE3 (IRQ_PBX_GIC_START + 57)#define IRQ_PBX_SMC -1#define IRQ_PBX_SCTL -1
PATCH v3 3/3 RM Realview PCIX board file changes
In reply to Colin TuckleyThis patch adds the PCI support to the board files for the Realview Northbridge boards.
---
arch/arm/mach-realview/realview_pb11mp.c | 18 ++++++++++++++++++ arch/arm/mach-realview/realview_pba8.c | 18 ++++++++++++++---- arch/arm/mach-realview/realview_pbx.c | 16 +++++++++++++--- 3 files changed, 45 insertions(+), 7 deletions(-)
arch/arm/mach-realview/realview_pb11mp.c +18 -0
@@ -95,6 +95,24 @@ static struct map_desc realview_pb11mp_io_desc[] __initdata = { .length = SZ_8K, .type = MT_DEVICE, }, +#ifdef CONFIG_PCI + { + .virtual = (unsigned long)PCIX_UNIT_BASE, + .pfn = __phys_to_pfn(REALVIEW_PB_PCI_BASE), + .length = REALVIEW_PB_PCI_BASE_SIZE, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)REALVIEW_PCI_IO_VBASE, + .pfn = __phys_to_pfn(REALVIEW_PB_PCI_IO_BASE), + .length = REALVIEW_PB_PCI_IO_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IO_ADDRESS(REALVIEW_ISSP_REG_BASE), + .pfn = __phys_to_pfn(REALVIEW_ISSP_REG_BASE), + .length = SZ_4K, + .type = MT_DEVICE, + }, +#endif #ifdef CONFIG_DEBUG_LL { .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
arch/arm/mach-realview/realview_pba8.c +14 -4
@@ -79,10 +79,20 @@ static struct map_desc realview_pba8_io_desc[] __initdata = { }, #ifdef CONFIG_PCI { - .virtual = PCIX_UNIT_BASE, - .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE), - .length = REALVIEW_PBA8_PCI_BASE_SIZE, - .type = MT_DEVICE + .virtual = (unsigned long)PCIX_UNIT_BASE, + .pfn = __phys_to_pfn(REALVIEW_PB_PCI_BASE), + .length = REALVIEW_PB_PCI_BASE_SIZE, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)REALVIEW_PCI_IO_VBASE, + .pfn = __phys_to_pfn(REALVIEW_PB_PCI_IO_BASE), + .length = REALVIEW_PB_PCI_IO_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IO_ADDRESS(REALVIEW_ISSP_REG_BASE), + .pfn = __phys_to_pfn(REALVIEW_ISSP_REG_BASE), + .length = SZ_4K, + .type = MT_DEVICE, }, #endif #ifdef CONFIG_DEBUG_LL
arch/arm/mach-realview/realview_pbx.c +13 -3
@@ -80,9 +80,19 @@ static struct map_desc realview_pbx_io_desc[] __initdata = { }, #ifdef CONFIG_PCI { - .virtual = PCIX_UNIT_BASE, - .pfn = __phys_to_pfn(REALVIEW_PBX_PCI_BASE), - .length = REALVIEW_PBX_PCI_BASE_SIZE, + .virtual = (unsigned long)PCIX_UNIT_BASE, + .pfn = __phys_to_pfn(REALVIEW_PB_PCI_BASE), + .length = REALVIEW_PB_PCI_BASE_SIZE, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)REALVIEW_PCI_IO_VBASE, + .pfn = __phys_to_pfn(REALVIEW_PB_PCI_IO_BASE), + .length = REALVIEW_PB_PCI_IO_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IO_ADDRESS(REALVIEW_ISSP_REG_BASE), + .pfn = __phys_to_pfn(REALVIEW_ISSP_REG_BASE), + .length = SZ_4K, .type = MT_DEVICE, }, #endif