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kvm: support TSC deadline MSR with subsection

PATCH In review Marcelo Tosatti 2 participants 4 messages Oct 5, 2011 – Oct 13, 2011 KVM

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Marcelo Tosatti

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#0 lore raw

PATCH 1/1 kvm: support TSC deadline MSR with subsection

Jinsong, please test this qemu-kvm patch by migrating a guest which is currently using TSC deadline timer. Using subsections avoids breaking migration to older qemu versions when the guest does not make use of TSC deadline feature.

-----

From: Liu, Jinsong <[email protected]>

KVM add emulation of lapic tsc deadline timer for guest. This patch is co-operation work at qemu side.

Use subsections to save/restore the field (mtosatti).

Signed-off-by Liu, Jinsong <[email protected]>
target-i386/cpu.h +2 -0
index ae36489..29412dc 100644
@@ -283,6 +283,7 @@
 #define MSR_IA32_APICBASE_BSP           (1<<8)
 #define MSR_IA32_APICBASE_ENABLE        (1<<11)
 #define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
+#define MSR_IA32_TSCDEADLINE            0x6e0
 
 #define MSR_MTRRcap			0xfe
 #define MSR_MTRRcap_VCNT		8

@@ -687,6 +688,7 @@ typedef struct CPUX86State {
     uint64_t async_pf_en_msr;
 
     uint64_t tsc;
+    uint64_t tsc_deadline;
 
     uint64_t mcg_status;
target-i386/kvm.c +14 -0
index b6eef04..90a6ffb 100644
@@ -59,6 +59,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
 
 static bool has_msr_star;
 static bool has_msr_hsave_pa;
+static bool has_msr_tsc_deadline;
 static bool has_msr_async_pf_en;
 static int lm_capable_kernel;
 

@@ -568,6 +569,10 @@ static int kvm_get_supported_msrs(KVMState *s)
                     has_msr_hsave_pa = true;
                     continue;
                 }
+                if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
+                    has_msr_tsc_deadline = true;
+                    continue;
+                }
             }
         }
 

@@ -881,6 +886,9 @@ static int kvm_put_msrs(CPUState *env, int level)
     if (has_msr_hsave_pa) {
         kvm_msr_entry_set(&msrs[n++], MSR_VM_HSAVE_PA, env->vm_hsave);
     }
+    if (has_msr_tsc_deadline) {
+        kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
+    }
 #ifdef TARGET_X86_64
     if (lm_capable_kernel) {
         kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);

@@ -1127,6 +1135,9 @@ static int kvm_get_msrs(CPUState *env)
     if (has_msr_hsave_pa) {
         msrs[n++].index = MSR_VM_HSAVE_PA;
     }
+    if (has_msr_tsc_deadline) {
+        msrs[n++].index = MSR_IA32_TSCDEADLINE;
+    }
 
     if (!env->tsc_valid) {
         msrs[n++].index = MSR_IA32_TSC;

@@ -1195,6 +1206,9 @@ static int kvm_get_msrs(CPUState *env)
         case MSR_IA32_TSC:
             env->tsc = msrs[i].data;
             break;
+        case MSR_IA32_TSCDEADLINE:
+            env->tsc_deadline = msrs[i].data;
+            break;
         case MSR_VM_HSAVE_PA:
             env->vm_hsave = msrs[i].data;
             break;
target-i386/machine.c +21 -0
index 9aca8e0..176d372 100644
@@ -310,6 +310,24 @@ static const VMStateDescription vmstate_fpop_ip_dp = {
     }
 };
 
+static bool tscdeadline_needed(void *opaque)
+{
+    CPUState *env = opaque;
+
+    return env->tsc_deadline != 0;
+}
+
+static const VMStateDescription vmstate_msr_tscdeadline = {
+    .name = "cpu/msr_tscdeadline",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField []) {
+        VMSTATE_UINT64(tsc_deadline, CPUState),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static const VMStateDescription vmstate_cpu = {
     .name = "cpu",
     .version_id = CPU_SAVE_VERSION,

@@ -420,6 +438,9 @@ static const VMStateDescription vmstate_cpu = {
         } , {
             .vmsd = &vmstate_fpop_ip_dp,
             .needed = fpop_ip_dp_needed,
+        }, {
+            .vmsd = &vmstate_msr_tscdeadline,
+            .needed = tscdeadline_needed,
         } , {
             /* empty */
         }
#1 lore raw

Marcelo,

I just test guest migration from v13 to v12, it failed w/ info
savevm: unsupported version 13 for 'cpu' v12
load of migration failed

v13 is new qemu-kvm with tsc deadline timer co-work patch, v12 is old qemu-kvm.

Quoted 5 lines · Marcelo Tosatti

Jinsong, please test this qemu-kvm patch by migrating a guest which is currently using TSC deadline timer. Using subsections avoids breaking migration to older qemu versions when the guest does not make use of TSC deadline feature.

Is subsection used to avoid breaking migration to older qemu?

Thanks,
Jinsong

author
#2 lore raw
Quoted 7 lines · Jinsong

Marcelo,

I just test guest migration from v13 to v12, it failed w/ info
savevm: unsupported version 13 for 'cpu' v12
load of migration failed

v13 is new qemu-kvm with tsc deadline timer co-work patch, v12 is old qemu-kvm.

You should try the patch in the first message in this thread, which is a replacement for the original tsc deadline timer patch.

Quoted 9 lines
Quoted 5 lines · Marcelo Tosatti

Jinsong, please test this qemu-kvm patch by migrating a guest which is currently using TSC deadline timer. Using subsections avoids breaking migration to older qemu versions when the guest does not make use of TSC deadline feature.

Is subsection used to avoid breaking migration to older qemu?

Yes.

#3 lore raw
Quoted 7 lines · Marcelo Tosatti
Quoted 6 lines · Jinsong

Marcelo,

I just test guest migration from v13 to v12, it failed w/ info
savevm: unsupported version 13 for 'cpu' v12
load of migration failed

Quoted 5 lines
Quoted 2 lines

v13 is new qemu-kvm with tsc deadline timer co-work patch, v12 is old qemu-kvm.

You should try the patch in the first message in this thread, which is a replacement for the original tsc deadline timer patch.

Sorry, I didn't notice your modification.
Just test the modified version, it worked OK when migrate from new qemu (w/ tsc deadline timer patch) to old qemu.

Thanks,
Jinsong

=========================
From: Liu, Jinsong <[email protected]>

KVM add emulation of lapic tsc deadline timer for guest. This patch is co-operation work at qemu side.

Use subsections to save/restore the field (mtosatti).

Signed-off-by Liu, Jinsong <[email protected]>
target-i386/cpu.h +2 -0
index ae36489..29412dc 100644
@@ -283,6 +283,7 @@
 #define MSR_IA32_APICBASE_BSP           (1<<8)
 #define MSR_IA32_APICBASE_ENABLE        (1<<11)
 #define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
+#define MSR_IA32_TSCDEADLINE            0x6e0
 
 #define MSR_MTRRcap			0xfe
 #define MSR_MTRRcap_VCNT		8

@@ -687,6 +688,7 @@ typedef struct CPUX86State {
     uint64_t async_pf_en_msr;
 
     uint64_t tsc;
+    uint64_t tsc_deadline;
 
     uint64_t mcg_status;
target-i386/kvm.c +14 -0
index b6eef04..90a6ffb 100644
@@ -59,6 +59,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
 
 static bool has_msr_star;
 static bool has_msr_hsave_pa;
+static bool has_msr_tsc_deadline;
 static bool has_msr_async_pf_en;
 static int lm_capable_kernel;
 

@@ -568,6 +569,10 @@ static int kvm_get_supported_msrs(KVMState *s)
                     has_msr_hsave_pa = true;
                     continue;
                 }
+                if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
+                    has_msr_tsc_deadline = true;
+                    continue;
+                }
             }
         }
 

@@ -881,6 +886,9 @@ static int kvm_put_msrs(CPUState *env, int level)
     if (has_msr_hsave_pa) {
         kvm_msr_entry_set(&msrs[n++], MSR_VM_HSAVE_PA, env->vm_hsave);
     }
+    if (has_msr_tsc_deadline) {
+        kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
+    }
 #ifdef TARGET_X86_64
     if (lm_capable_kernel) {
         kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);

@@ -1127,6 +1135,9 @@ static int kvm_get_msrs(CPUState *env)
     if (has_msr_hsave_pa) {
         msrs[n++].index = MSR_VM_HSAVE_PA;
     }
+    if (has_msr_tsc_deadline) {
+        msrs[n++].index = MSR_IA32_TSCDEADLINE;
+    }
 
     if (!env->tsc_valid) {
         msrs[n++].index = MSR_IA32_TSC;

@@ -1195,6 +1206,9 @@ static int kvm_get_msrs(CPUState *env)
         case MSR_IA32_TSC:
             env->tsc = msrs[i].data;
             break;
+        case MSR_IA32_TSCDEADLINE:
+            env->tsc_deadline = msrs[i].data;
+            break;
         case MSR_VM_HSAVE_PA:
             env->vm_hsave = msrs[i].data;
             break;
target-i386/machine.c +21 -0
index 9aca8e0..176d372 100644
@@ -310,6 +310,24 @@ static const VMStateDescription vmstate_fpop_ip_dp = {
     }
 };
 
+static bool tscdeadline_needed(void *opaque)
+{
+    CPUState *env = opaque;
+
+    return env->tsc_deadline != 0;
+}
+
+static const VMStateDescription vmstate_msr_tscdeadline = {
+    .name = "cpu/msr_tscdeadline",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField []) {
+        VMSTATE_UINT64(tsc_deadline, CPUState),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static const VMStateDescription vmstate_cpu = {
     .name = "cpu",
     .version_id = CPU_SAVE_VERSION,

@@ -420,6 +438,9 @@ static const VMStateDescription vmstate_cpu = {
         } , {
             .vmsd = &vmstate_fpop_ip_dp,
             .needed = fpop_ip_dp_needed,
+        }, {
+            .vmsd = &vmstate_msr_tscdeadline,
+            .needed = tscdeadline_needed,
         } , {
             /* empty */
         }