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arm: omap4: hsmmc: pbias fixes

PATCH New Balaji T K 2 participants 4 messages Oct 3, 2011 – Oct 6, 2011

Subsystems (4)
Arm (32-bit) Arm sub-architectures MMC, SD and SDIO OMAP2+ support
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Balaji T K

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#0 lore raw

v2 cover arm: omap4: hsmmc: pbias fixes

MMC1 pbias and speed control fix for SDMMC1 extended I/O cell Rebase to git://github.com/tmlind/linux.git fixes

	commit 122a98589349fe3388ffb7b996b54614951c934a
	Author: Tapani Utriainen <[email protected]>
	Date:   Fri Sep 30 11:05:56 2011 -0700

	    ARM: OMAP: irq: loop counter fix in omap_init_irq()

Balaji T K (2):
arm: omap4: hsmmc: Fix Pbias configuration on regulator OFF
arm: omap4: hsmmc: configure SDMMC1_DR0 properly

 arch/arm/mach-omap2/hsmmc.c |   16 +++-------------
 1 files changed, 3 insertions(+), 13 deletions(-)
author
#1 lore raw

PATCH v2 1/2 arm: omap4: hsmmc: Fix Pbias configuration on regulator OFF

MMC1 data line IO's are powered down in before set regulator function. IO's should not be powered ON when regulator is OFF.
Keep the IO's in power pown mode after regulator OFF otherwise VMODE_ERROR interrupt is generated due to mismatch in input (regulator) voltage and MMC IO drive voltage.
Delete incorrect comments which are not applicable for OMAP4.

Signed-off-by Balaji T K <[email protected]>
Signed-off-by Kishore Kadiyala <[email protected]>
Reported-by Viswanath Puttagunta <[email protected]>

---
v2:
update description

 arch/arm/mach-omap2/hsmmc.c |   14 ++------------
 1 files changed, 2 insertions(+), 12 deletions(-)
arch/arm/mach-omap2/hsmmc.c +2 -12
index 097a42d..9cc2eb7 100644
@@ -129,15 +129,11 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
 	 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
 	 * card with Vcc regulator (from twl4030 or whatever).  OMAP has both
 	 * 1.8V and 3.0V modes, controlled by the PBIAS register.
-	 *
-	 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
-	 * is most naturally TWL VSIM; those pins also use PBIAS.
-	 *
-	 * FIXME handle VMMC1A as needed ...
 	 */
 	reg = omap4_ctrl_pad_readl(control_pbias_offset);
 	reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-		OMAP4_MMC1_PWRDNZ_MASK);
+		OMAP4_MMC1_PWRDNZ_MASK |
+		OMAP4_MMC1_PBIASLITE_VMODE_MASK);
 	omap4_ctrl_pad_writel(reg, control_pbias_offset);
 }
 

@@ -172,12 +168,6 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
 			reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
 			omap4_ctrl_pad_writel(reg, control_pbias_offset);
 		}
-	} else {
-		reg = omap4_ctrl_pad_readl(control_pbias_offset);
-		reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-			OMAP4_MMC1_PWRDNZ_MASK |
-			OMAP4_MMC1_PBIASLITE_VMODE_MASK);
-		omap4_ctrl_pad_writel(reg, control_pbias_offset);
 	}
 }
Signature · 1 line
1.7.0.4
author
#2 lore raw

PATCH v2 2/2 arm: omap4: hsmmc: configure SDMMC1_DR0 properly

In reply to Balaji T K

Fix the typo, instead it should be SDMMC1
USBC1 is not related to MMC1 I/Os

Signed-off-by Balaji T K <[email protected]>
---
 arch/arm/mach-omap2/hsmmc.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/hsmmc.c +1 -1
index 9cc2eb7..1a9bc52 100644
@@ -495,7 +495,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
 			OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK);
 		reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK |
 			OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK);
-		reg |= (OMAP4_USBC1_DR0_SPEEDCTRL_MASK|
+		reg |= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK |
 			OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK |
 			OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK);
 		omap4_ctrl_pad_writel(reg, control_mmc1);
Signature · 1 line
1.7.0.4
maintainer
#3 lore raw

v2 cover arm: omap4: hsmmc: pbias fixes

In reply to Balaji T K
Quoted 9 lines · Balaji T K

MMC1 pbias and speed control fix for SDMMC1 extended I/O cell Rebase to git://github.com/tmlind/linux.git fixes

	commit 122a98589349fe3388ffb7b996b54614951c934a
	Author: Tapani Utriainen <[email protected]>
	Date:   Fri Sep 30 11:05:56 2011 -0700

	    ARM: OMAP: irq: loop counter fix in omap_init_irq()
Quoted 3 lines

Balaji T K (2):
arm: omap4: hsmmc: Fix Pbias configuration on regulator OFF
arm: omap4: hsmmc: configure SDMMC1_DR0 properly

Thanks adding both to fixes-part2 branch.

Regards,

Tony