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Per SoC descriptor

PATCH Superseded Marc Zyngier 3 participants 15 messages Oct 10, 2011 – Oct 13, 2011

Subsystems (8)

v5 of 7 Superseded Latest is v7 →

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#0 lore raw

v5 cover Per SoC descriptor

This patch series introduces a per-soc descriptor which should, in the end, contain most of the SoC specific operations.

This first patch series introduces the arm_soc_desc structure, adds per-soc SMP and CPU hotplug operations, and converts all SMP platform to this new scheme.

Patches against next-20111007. Tested on VExpress (A5 and A15), RealView EB-11MP, OMAP4 (Panda) and Tegra2 (Harmony).

Changelog:

#1 lore raw

PATCH v5 1/10 ARM: SoC: Introduce per SoC descriptor

The ARM core code expects the various SoCs to hide their implementation differences behind a well established API. The various sub-arch-specific bit are often either at the machine descriptor level, or provided at link time by the sub-arch code.

The SoC descriptor is a container that holds the SoC specific bits that can be moved away from the machine descriptor as well as an indirection point for the global symbols (SMP and CPU hotplug support, for example).

This patch introduce this SoC descriptor, with the only field being the name of the SoC.

Cc Arnd Bergmann <[email protected]>
Cc Nicolas Pitre <[email protected]>
---
 arch/arm/include/asm/mach/arch.h |    2 ++
 arch/arm/include/asm/soc.h       |   19 +++++++++++++++++++
 arch/arm/kernel/setup.c          |    7 +++++++
 3 files changed, 28 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/soc.h
arch/arm/include/asm/mach/arch.h +2 -0
index 7d19425..a366432 100644
@@ -13,6 +13,7 @@
 struct tag;
 struct meminfo;
 struct sys_timer;
+struct arm_soc_desc;
 
 struct machine_desc {
 	unsigned int		nr;		/* architecture number	*/
@@ -34,6 +35,7 @@ struct machine_desc {
 	unsigned int		reserve_lp1 :1;	/* never has lp1	*/
 	unsigned int		reserve_lp2 :1;	/* never has lp2	*/
 	unsigned int		soft_reboot :1;	/* soft reboot		*/
+	struct arm_soc_desc	*soc;		/* SoC descriptor	*/
 	void			(*fixup)(struct tag *, char **,
 					 struct meminfo *);
 	void			(*reserve)(void);/* reserve mem blocks	*/
arch/arm/include/asm/soc.h new file +19 -0
new file mode 100644
index 0000000..2d73e35
@@ -0,0 +1,19 @@
+/*
+ *  linux/arch/arm/include/asm/soc.h
+ *
+ *  Copyright (C) 2011 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_SOC_H
+#define __ASM_ARM_SOC_H
+
+struct arm_soc_desc {
+	const char			*name;
+};
+
+#endif	/* __ASM_ARM_SOC_H */
arch/arm/kernel/setup.c +7 -0
index d399777..c1814e9 100644
@@ -45,6 +45,7 @@
 #include <asm/cachetype.h>
 #include <asm/tlbflush.h>
 #include <asm/system.h>
+#include <asm/soc.h>
 
 #include <asm/prom.h>
 #include <asm/mach/arch.h>
@@ -140,6 +141,7 @@ static const char *cpu_name;
 static const char *machine_name;
 static char __initdata cmd_line[COMMAND_LINE_SIZE];
 struct machine_desc *machine_desc __initdata;
+static const struct arm_soc_desc *soc_desc __initdata;
 
 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
 static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
@@ -913,6 +915,11 @@ void __init setup_arch(char **cmdline_p)
 		mdesc = setup_machine_tags(machine_arch_type);
 	machine_desc = mdesc;
 	machine_name = mdesc->name;
+	if (mdesc->soc) {
+		soc_desc = mdesc->soc;
+		pr_info("SoC: %s\n", soc_desc->name);
+	} else
+		soc_desc = NULL;
 
 	if (mdesc->soft_reboot)
 		reboot_setup("s");
Signature · 1 line
1.7.0.4
#2 lore raw

PATCH v5 2/10 ARM: SoC: Add per SoC SMP and CPU hotplug operations

In reply to Marc Zyngier

Populate the SoC descriptor structure with the SMP and CPU hotplug operations. To allow the kernel to continue building, the platform hooks are defined as weak symbols which are overrided by the platform code. Once all platforms are converted, the "weak" attribute will be removed and the function made static.

Cc Arnd Bergmann <[email protected]>
Cc Nicolas Pitre <[email protected]>
---
 arch/arm/include/asm/soc.h |   45 ++++++++++++++++++++++++++++
 arch/arm/kernel/setup.c    |    1 +
 arch/arm/kernel/smp.c      |   69 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 115 insertions(+), 0 deletions(-)
arch/arm/include/asm/soc.h +45 -0
index 2d73e35..1bcc58c 100644
@@ -12,8 +12,53 @@
 #ifndef __ASM_ARM_SOC_H
 #define __ASM_ARM_SOC_H
 
+struct task_struct;
+
+struct arm_soc_smp_init_ops {
+	/*
+	 * Setup the set of possible CPUs (via set_cpu_possible)
+	 */
+	void (*smp_init_cpus)(void);
+	/*
+	 * Initialize cpu_possible map, and enable coherency
+	 */
+	void (*smp_prepare_cpus)(unsigned int max_cpus);
+};
+
+struct arm_soc_smp_ops {
+	/*
+	 * Perform platform specific initialisation of the specified CPU.
+	 */
+	void (*smp_secondary_init)(unsigned int cpu);
+	/*
+	 * Boot a secondary CPU, and assign it the specified idle task.
+	 * This also gives us the initial stack to use for this CPU.
+	 */
+	int  (*smp_boot_secondary)(unsigned int cpu, struct task_struct *idle);
+#ifdef CONFIG_HOTPLUG_CPU
+	int  (*cpu_kill)(unsigned int cpu);
+	void (*cpu_die)(unsigned int cpu);
+	int  (*cpu_disable)(unsigned int cpu);
+#endif
+};
+
 struct arm_soc_desc {
 	const char			*name;
+#ifdef CONFIG_SMP
+	struct arm_soc_smp_init_ops	*smp_init_ops;
+	struct arm_soc_smp_ops		*smp_ops;
+#endif
 };
 
+#ifdef CONFIG_SMP
+#define soc_smp_init_ops(ops)		.smp_init_ops = &(ops),
+#define soc_smp_ops(ops)		.smp_ops = &(ops),
+extern void soc_smp_ops_register(struct arm_soc_smp_init_ops *,
+				 struct arm_soc_smp_ops *);
+#else
+#define soc_smp_init_ops(ops)		/* empty */
+#define soc_smp_ops(ops)		/* empty */
+#define soc_smp_ops_register(a,b)	do {} while(0)
+#endif
+
 #endif	/* __ASM_ARM_SOC_H */
arch/arm/kernel/setup.c +1 -0
index c1814e9..ca9bab6 100644
@@ -918,6 +918,7 @@ void __init setup_arch(char **cmdline_p)
 	if (mdesc->soc) {
 		soc_desc = mdesc->soc;
 		pr_info("SoC: %s\n", soc_desc->name);
+		soc_smp_ops_register(soc_desc->smp_init_ops, soc_desc->smp_ops);
 	} else
 		soc_desc = NULL;
 
arch/arm/kernel/smp.c +69 -0

84 lines not on this page · raw message

Signature · 1 line
1.7.0.4
#3 lore raw

PATCH v5 3/10 ARM: SoC: convert VExpress/RealView to SoC descriptor

In reply to Marc Zyngier

Convert both Realview and VExpress to use the SoC descriptor to provide their SMP and CPU hotplug operation.

Cc Arnd Bergmann <[email protected]>
Cc Nicolas Pitre <[email protected]>
---
 arch/arm/mach-realview/core.c                  |    7 +++++++
 arch/arm/mach-realview/core.h                  |    9 +++++++++
 arch/arm/mach-realview/hotplug.c               |    6 +++---
 arch/arm/mach-realview/platsmp.c               |   24 ++++++++++++++++++++----
 arch/arm/mach-realview/realview_eb.c           |    1 +
 arch/arm/mach-realview/realview_pb1176.c       |    1 +
 arch/arm/mach-realview/realview_pb11mp.c       |    1 +
 arch/arm/mach-realview/realview_pba8.c         |    1 +
 arch/arm/mach-realview/realview_pbx.c          |    1 +
 arch/arm/mach-vexpress/core.h                  |   10 ++++++++++
 arch/arm/mach-vexpress/hotplug.c               |    6 +++---
 arch/arm/mach-vexpress/platsmp.c               |   24 ++++++++++++++++++++----
 arch/arm/mach-vexpress/v2m.c                   |    9 +++++++++
 arch/arm/plat-versatile/include/plat/platsmp.h |   14 ++++++++++++++
 arch/arm/plat-versatile/platsmp.c              |    4 ++--
 15 files changed, 102 insertions(+), 16 deletions(-)
 create mode 100644 arch/arm/plat-versatile/include/plat/platsmp.h
arch/arm/mach-realview/core.c +7 -0
index d5ed5d4..e84e6b2 100644
@@ -33,6 +33,7 @@
 #include <linux/clkdev.h>
 #include <linux/mtd/physmap.h>
 
+#include <asm/soc.h>
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -533,3 +534,9 @@ void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
 	meminfo->nr_banks = 1;
 #endif
 }
+
+struct arm_soc_desc realview_soc_desc __initdata = {
+	.name		= "ARM RealView Platform",
+	soc_smp_init_ops(realview_soc_smp_init_ops)
+	soc_smp_ops(realview_soc_smp_ops)
+};
arch/arm/mach-realview/core.h +9 -0
index 47259c8..a262e4e 100644
@@ -27,6 +27,7 @@
 
 #include <asm/setup.h>
 #include <asm/leds.h>
+#include <asm/soc.h>
 
 #define AMBA_DEVICE(name,busid,base,plat)			\
 static struct amba_device name##_device = {			\
@@ -67,4 +68,12 @@ extern void realview_fixup(struct tag *tags, char **from,
 			   struct meminfo *meminfo);
 extern void (*realview_reset)(char);
 
+extern struct arm_soc_desc		realview_soc_desc;
+extern struct arm_soc_smp_init_ops	realview_soc_smp_init_ops;
+extern struct arm_soc_smp_ops		realview_soc_smp_ops;
+
+extern int  realview_cpu_kill(unsigned int cpu);
+extern void realview_cpu_die(unsigned int cpu);
+extern int  realview_cpu_disable(unsigned int cpu);
+
 #endif
arch/arm/mach-realview/hotplug.c +3 -3
index ac1aed2..c8adf5c 100644
@@ -87,7 +87,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 	}
 }
 
-int platform_cpu_kill(unsigned int cpu)
+int realview_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
@@ -97,7 +97,7 @@ int platform_cpu_kill(unsigned int cpu)
  *
  * Called with IRQs disabled
  */
-void platform_cpu_die(unsigned int cpu)
+void realview_cpu_die(unsigned int cpu)
 {
 	int spurious = 0;
 
@@ -117,7 +117,7 @@ void platform_cpu_die(unsigned int cpu)
 		pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int realview_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-realview/platsmp.c +20 -4
index 4ae943b..92be3eb 100644
@@ -18,14 +18,15 @@
 #include <asm/mach-types.h>
 #include <asm/smp_scu.h>
 #include <asm/unified.h>
+#include <asm/soc.h>
 
 #include <mach/board-eb.h>
 #include <mach/board-pb11mp.h>
 #include <mach/board-pbx.h>
 
-#include "core.h"
+#include <plat/platsmp.h>
 
-extern void versatile_secondary_startup(void);
+#include "core.h"
 
 static void __iomem *scu_base_addr(void)
 {
@@ -44,7 +45,7 @@ static void __iomem *scu_base_addr(void)
  * Initialise the CPU possible map early - this describes the CPUs
  * which may be present or become present in the system.
  */
-void __init smp_init_cpus(void)
+static void __init realview_smp_init_cpus(void)
 {
 	void __iomem *scu_base = scu_base_addr();
 	unsigned int i, ncores;
@@ -66,7 +67,7 @@ void __init smp_init_cpus(void)
 	set_smp_cross_call(gic_raise_softirq);
 }
 
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
 {
 
 	scu_enable(scu_base_addr());
@@ -80,3 +81,18 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 	__raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)),
 		     __io_address(REALVIEW_SYS_FLAGSSET));
 }
+
+struct arm_soc_smp_init_ops realview_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= realview_smp_init_cpus,
+	.smp_prepare_cpus	= realview_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops realview_soc_smp_ops __initdata = {
+	.smp_secondary_init	= versatile_secondary_init,
+	.smp_boot_secondary	= versatile_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= realview_cpu_kill,
+	.cpu_die		= realview_cpu_die,
+	.cpu_disable		= realview_cpu_disable,
+#endif
+};
arch/arm/mach-realview/realview_eb.c +1 -0
index 026c66a..427e44e 100644
@@ -464,6 +464,7 @@ static void __init realview_eb_init(void)
 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
+	.soc		= &realview_soc_desc,
 	.fixup		= realview_fixup,
 	.map_io		= realview_eb_map_io,
 	.init_early	= realview_init_early,
arch/arm/mach-realview/realview_pb1176.c +1 -0
index 7ead14f..99ea1c0 100644
@@ -358,6 +358,7 @@ static void __init realview_pb1176_init(void)
 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
+	.soc		= &realview_soc_desc,
 	.fixup		= realview_pb1176_fixup,
 	.map_io		= realview_pb1176_map_io,
 	.init_early	= realview_init_early,
arch/arm/mach-realview/realview_pb11mp.c +1 -0
index 671ad6d..6cb8318 100644
@@ -361,6 +361,7 @@ static void __init realview_pb11mp_init(void)
 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
+	.soc		= &realview_soc_desc,
 	.fixup		= realview_fixup,
 	.map_io		= realview_pb11mp_map_io,
 	.init_early	= realview_init_early,
arch/arm/mach-realview/realview_pba8.c +1 -0
index cbf22df..3db72c5 100644
@@ -311,6 +311,7 @@ static void __init realview_pba8_init(void)
 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
+	.soc		= &realview_soc_desc,
 	.fixup		= realview_fixup,
 	.map_io		= realview_pba8_map_io,
 	.init_early	= realview_init_early,
arch/arm/mach-realview/realview_pbx.c +1 -0
index 63c4114..bea4212 100644
@@ -394,6 +394,7 @@ static void __init realview_pbx_init(void)
 MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
+	.soc		= &realview_soc_desc,
 	.fixup		= realview_pbx_fixup,
 	.map_io		= realview_pbx_map_io,
 	.init_early	= realview_init_early,
arch/arm/mach-vexpress/core.h +10 -0
index f439715..bd9065a 100644
@@ -17,3 +17,13 @@ struct amba_device name##_device = {		\
 	.irq		= IRQ_##base,		\
 	/* .dma		= DMA_##base,*/		\
 }
+
+struct arm_soc_smp_init_ops;
+struct arm_soc_smp_ops;
+
+extern struct arm_soc_smp_init_ops	vexpress_soc_smp_init_ops;
+extern struct arm_soc_smp_ops		vexpress_soc_smp_ops;
+
+extern int  vexpress_cpu_kill(unsigned int cpu);
+extern void vexpress_cpu_die(unsigned int cpu);
+extern int  vexpress_cpu_disable(unsigned int cpu);
arch/arm/mach-vexpress/hotplug.c +3 -3
index 813ee08..08e5e42 100644
@@ -83,7 +83,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 	}
 }
 
-int platform_cpu_kill(unsigned int cpu)
+int vexpress_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
@@ -93,7 +93,7 @@ int platform_cpu_kill(unsigned int cpu)
  *
  * Called with IRQs disabled
  */
-void platform_cpu_die(unsigned int cpu)
+void vexpress_cpu_die(unsigned int cpu)
 {
 	int spurious = 0;
 
@@ -113,7 +113,7 @@ void platform_cpu_die(unsigned int cpu)
 		pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int vexpress_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-vexpress/platsmp.c +20 -4
index 2b5f7ac..523d226 100644
@@ -13,25 +13,26 @@
 #include <linux/smp.h>
 #include <linux/io.h>
 
+#include <asm/soc.h>
 #include <asm/unified.h>
 
 #include <mach/motherboard.h>
 #define V2M_PA_CS7 0x10000000
 
-#include "core.h"
+#include <plat/platsmp.h>
 
-extern void versatile_secondary_startup(void);
+#include "core.h"
 
 /*
  * Initialise the CPU possible map early - this describes the CPUs
  * which may be present or become present in the system.
  */
-void __init smp_init_cpus(void)
+static void __init vexpress_smp_init_cpus(void)
 {
 	ct_desc->init_cpu_map();
 }
 
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init vexpress_smp_prepare_cpus(unsigned int max_cpus)
 {
 	/*
 	 * Initialise the present map, which describes the set of CPUs
@@ -49,3 +50,18 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 	writel(BSYM(virt_to_phys(versatile_secondary_startup)),
 		MMIO_P2V(V2M_SYS_FLAGSSET));
 }
+
+struct arm_soc_smp_init_ops vexpress_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= vexpress_smp_init_cpus,
+	.smp_prepare_cpus	= vexpress_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops vexpress_soc_smp_ops __initdata = {
+	.smp_secondary_init	= versatile_secondary_init,
+	.smp_boot_secondary	= versatile_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= vexpress_cpu_kill,
+	.cpu_die		= vexpress_cpu_die,
+	.cpu_disable		= vexpress_cpu_disable,
+#endif
+};
arch/arm/mach-vexpress/v2m.c +9 -0
index 1fafc32..47bca2a 100644
@@ -16,6 +16,7 @@
 #include <linux/mtd/physmap.h>
 
 #include <asm/mach-types.h>
+#include <asm/soc.h>
 #include <asm/sizes.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -28,6 +29,7 @@
 #include <mach/motherboard.h>
 
 #include <plat/sched_clock.h>
+#include <plat/platsmp.h>
 
 #include "core.h"
 
@@ -442,8 +444,15 @@ static void __init v2m_init(void)
 	ct_desc->init_tile();
 }
 
+static struct arm_soc_desc vexpress_soc_desc __initdata = {
+	.name		= "ARM VE Platform",
+	soc_smp_init_ops(vexpress_soc_smp_init_ops)
+	soc_smp_ops(vexpress_soc_smp_ops)
+};
+
 MACHINE_START(VEXPRESS, "ARM-Versatile Express")
 	.atag_offset	= 0x100,
+	.soc		= &vexpress_soc_desc,
 	.map_io		= v2m_map_io,
 	.init_early	= v2m_init_early,
 	.init_irq	= v2m_init_irq,
arch/arm/plat-versatile/include/plat/platsmp.h new file +14 -0
new file mode 100644
index 0000000..50fb830
@@ -0,0 +1,14 @@
+/*
+ *  linux/arch/arm/plat-versatile/include/plat/platsmp.h
+ *
+ *  Copyright (C) 2011 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+extern void versatile_secondary_startup(void);
+extern void versatile_secondary_init(unsigned int cpu);
+extern int  versatile_boot_secondary(unsigned int cpu, struct task_struct *idle);
arch/arm/plat-versatile/platsmp.c +2 -2
index 92f18d3..d403022 100644
@@ -39,7 +39,7 @@ static void __cpuinit write_pen_release(int val)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __cpuinit platform_secondary_init(unsigned int cpu)
+void __cpuinit versatile_secondary_init(unsigned int cpu)
 {
 	/*
 	 * if any interrupts are already enabled for the primary
@@ -61,7 +61,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	spin_unlock(&boot_lock);
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	unsigned long timeout;
 
Signature · 1 line
1.7.0.4
#4 lore raw

PATCH v5 4/10 ARM: SoC: convert OMAP4 to SoC descriptor

In reply to Marc Zyngier

Convert OMAP4 to use the SoC descriptor to provide its SMP and CPU hotplug operations.

Tested on both Panda and IGEPv2 (MULTI_OMAP kernel)

---
 arch/arm/mach-omap2/board-4430sdp.c             |    1 +
 arch/arm/mach-omap2/board-omap4panda.c          |    1 +
 arch/arm/mach-omap2/include/mach/omap4-common.h |   14 +++++++++++++
 arch/arm/mach-omap2/omap-hotplug.c              |    6 ++--
 arch/arm/mach-omap2/omap-smp.c                  |   24 +++++++++++++++++++---
 arch/arm/mach-omap2/omap4-common.c              |    7 ++++++
 6 files changed, 46 insertions(+), 7 deletions(-)
arch/arm/mach-omap2/board-4430sdp.c +1 -0
index 4d0c8b9..c404c5b 100644
@@ -986,6 +986,7 @@ static void __init omap_4430sdp_map_io(void)
 MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
 	/* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
 	.atag_offset	= 0x100,
+	.soc		= &omap4_soc_desc,
 	.reserve	= omap_reserve,
 	.map_io		= omap_4430sdp_map_io,
 	.init_early	= omap4430_init_early,
arch/arm/mach-omap2/board-omap4panda.c +1 -0
index 201c0c2..42d6168 100644
@@ -579,6 +579,7 @@ static void __init omap4_panda_map_io(void)
 MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
 	/* Maintainer: David Anders - Texas Instruments Inc */
 	.atag_offset	= 0x100,
+	.soc		= &omap4_soc_desc,
 	.reserve	= omap_reserve,
 	.map_io		= omap4_panda_map_io,
 	.init_early	= omap4430_init_early,
arch/arm/mach-omap2/include/mach/omap4-common.h +14 -0
index e4bd876..1db7941 100644
@@ -39,5 +39,19 @@ extern void omap_secondary_startup(void);
 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
 extern void omap_auxcoreboot_addr(u32 cpu_addr);
 extern u32 omap_read_auxcoreboot0(void);
+
+extern int  omap4_cpu_kill(unsigned int cpu);
+extern void omap4_cpu_die(unsigned int cpu);
+extern int  omap4_cpu_disable(unsigned int cpu);
+
+struct arm_soc_smp_init_ops;
+struct arm_soc_smp_ops;
+
+extern struct arm_soc_smp_init_ops	omap4_soc_smp_init_ops;
+extern struct arm_soc_smp_ops		omap4_soc_smp_ops;
 #endif
+
+struct arm_soc_desc;
+extern struct arm_soc_desc		omap4_soc_desc;
+
 #endif
arch/arm/mach-omap2/omap-hotplug.c +3 -3
index 4976b93..40982c6 100644
@@ -21,7 +21,7 @@
 #include <asm/cacheflush.h>
 #include <mach/omap4-common.h>
 
-int platform_cpu_kill(unsigned int cpu)
+int omap4_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
@@ -30,7 +30,7 @@ int platform_cpu_kill(unsigned int cpu)
  * platform-specific code to shutdown a CPU
  * Called with IRQs disabled
  */
-void platform_cpu_die(unsigned int cpu)
+void omap4_cpu_die(unsigned int cpu)
 {
 	flush_cache_all();
 	dsb();
@@ -57,7 +57,7 @@ void platform_cpu_die(unsigned int cpu)
 	}
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int omap4_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-omap2/omap-smp.c +20 -4
index ce65e93..061ed7f 100644
@@ -23,6 +23,7 @@
 #include <asm/cacheflush.h>
 #include <asm/hardware/gic.h>
 #include <asm/smp_scu.h>
+#include <asm/soc.h>
 #include <mach/hardware.h>
 #include <mach/omap4-common.h>
 
@@ -31,7 +32,7 @@ static void __iomem *scu_base;
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit omap4_secondary_init(unsigned int cpu)
 {
 	/*
 	 * If any interrupts are already enabled for the primary
@@ -47,7 +48,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	spin_unlock(&boot_lock);
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	/*
 	 * Set synchronisation state between this boot processor
@@ -98,7 +99,7 @@ static void __init wakeup_secondary(void)
  * Initialise the CPU possible map early - this describes the CPUs
  * which may be present or become present in the system.
  */
-void __init smp_init_cpus(void)
+static void __init omap4_smp_init_cpus(void)
 {
 	unsigned int i, ncores;
 
@@ -123,7 +124,7 @@ void __init smp_init_cpus(void)
 	set_smp_cross_call(gic_raise_softirq);
 }
 
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
 {
 
 	/*
@@ -133,3 +134,18 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 	scu_enable(scu_base);
 	wakeup_secondary();
 }
+
+struct arm_soc_smp_init_ops omap4_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= omap4_smp_init_cpus,
+	.smp_prepare_cpus	= omap4_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops omap4_soc_smp_ops __initdata = {
+	.smp_secondary_init	= omap4_secondary_init,
+	.smp_boot_secondary	= omap4_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= omap4_cpu_kill,
+	.cpu_die		= omap4_cpu_die,
+	.cpu_disable		= omap4_cpu_disable,
+#endif
+};
arch/arm/mach-omap2/omap4-common.c +7 -0
index 35ac3e5..de39fd4 100644
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 
+#include <asm/soc.h>
 #include <asm/hardware/gic.h>
 #include <asm/hardware/cache-l2x0.h>
 
@@ -111,3 +112,9 @@ static int __init omap_l2_cache_init(void)
 }
 early_initcall(omap_l2_cache_init);
 #endif
+
+struct arm_soc_desc omap4_soc_desc __initdata = {
+	.name		= "TI OMAP4",
+	soc_smp_init_ops(omap4_soc_smp_init_ops)
+	soc_smp_ops(omap4_soc_smp_ops)
+};
Signature · 1 line
1.7.0.4
#5 lore raw

PATCH v5 5/10 ARM: SoC: convert Tegra to SoC descriptor

In reply to Marc Zyngier

Convert Tegra to use the SoC descriptor to provide its SMP and CPU hotplug operations.

Tested on Harmony.

---
 arch/arm/mach-tegra/board-dt.c        |    2 ++
 arch/arm/mach-tegra/board-harmony.c   |    2 ++
 arch/arm/mach-tegra/board-paz00.c     |    2 ++
 arch/arm/mach-tegra/board-seaboard.c  |    4 ++++
 arch/arm/mach-tegra/board-trimslice.c |    2 ++
 arch/arm/mach-tegra/common.c          |    8 ++++++++
 arch/arm/mach-tegra/common.h          |   11 +++++++++++
 arch/arm/mach-tegra/hotplug.c         |    6 +++---
 arch/arm/mach-tegra/platsmp.c         |   26 ++++++++++++++++++++++----
 9 files changed, 56 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/mach-tegra/common.h
arch/arm/mach-tegra/board-dt.c +2 -0
index 9f47e04..0b3f937 100644
@@ -44,6 +44,7 @@
 #include "board-harmony.h"
 #include "clock.h"
 #include "devices.h"
+#include "common.h"
 
 void harmony_pinmux_init(void);
 void seaboard_pinmux_init(void);
@@ -111,6 +112,7 @@ static const char * tegra_dt_board_compat[] = {
 
 DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
 	.map_io		= tegra_map_common_io,
+	.soc		= &tegra_soc_desc,
 	.init_early	= tegra_init_early,
 	.init_irq	= tegra_init_irq,
 	.timer		= &tegra_timer,
arch/arm/mach-tegra/board-harmony.c +2 -0
index f0bdc5e..f2ef94f 100644
@@ -43,6 +43,7 @@
 #include "clock.h"
 #include "devices.h"
 #include "gpio-names.h"
+#include "common.h"
 
 static struct plat_serial8250_port debug_uart_platform_data[] = {
 	{
@@ -183,6 +184,7 @@ static void __init tegra_harmony_init(void)
 
 MACHINE_START(HARMONY, "harmony")
 	.atag_offset	= 0x100,
+	.soc		= &tegra_soc_desc,
 	.fixup		= tegra_harmony_fixup,
 	.map_io         = tegra_map_common_io,
 	.init_early	= tegra_init_early,
arch/arm/mach-tegra/board-paz00.c +2 -0
index 602f8dd..63595f0 100644
@@ -43,6 +43,7 @@
 #include "clock.h"
 #include "devices.h"
 #include "gpio-names.h"
+#include "common.h"
 
 static struct plat_serial8250_port debug_uart_platform_data[] = {
 	{
@@ -186,6 +187,7 @@ static void __init tegra_paz00_init(void)
 
 MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
 	.atag_offset	= 0x100,
+	.soc		= &tegra_soc_desc,
 	.fixup		= tegra_paz00_fixup,
 	.map_io         = tegra_map_common_io,
 	.init_early	= tegra_init_early,
arch/arm/mach-tegra/board-seaboard.c +4 -0
index bf13ea3..dfd9c95 100644
@@ -40,6 +40,7 @@
 #include "clock.h"
 #include "devices.h"
 #include "gpio-names.h"
+#include "common.h"
 
 static struct plat_serial8250_port debug_uart_platform_data[] = {
 	{
@@ -281,6 +282,7 @@ static void __init tegra_wario_init(void)
 
 MACHINE_START(SEABOARD, "seaboard")
 	.atag_offset    = 0x100,
+	.soc		= &tegra_soc_desc,
 	.map_io         = tegra_map_common_io,
 	.init_early     = tegra_init_early,
 	.init_irq       = tegra_init_irq,
@@ -290,6 +292,7 @@ MACHINE_END
 
 MACHINE_START(KAEN, "kaen")
 	.atag_offset    = 0x100,
+	.soc		= &tegra_soc_desc,
 	.map_io         = tegra_map_common_io,
 	.init_early     = tegra_init_early,
 	.init_irq       = tegra_init_irq,
@@ -299,6 +302,7 @@ MACHINE_END
 
 MACHINE_START(WARIO, "wario")
 	.atag_offset    = 0x100,
+	.soc		= &tegra_soc_desc,
 	.map_io         = tegra_map_common_io,
 	.init_early     = tegra_init_early,
 	.init_irq       = tegra_init_irq,
arch/arm/mach-tegra/board-trimslice.c +2 -0
index e008c0e..16cfc39 100644
@@ -38,6 +38,7 @@
 #include "clock.h"
 #include "devices.h"
 #include "gpio-names.h"
+#include "common.h"
 
 #include "board-trimslice.h"
 
@@ -173,6 +174,7 @@ static void __init tegra_trimslice_init(void)
 
 MACHINE_START(TRIMSLICE, "trimslice")
 	.atag_offset	= 0x100,
+	.soc		= &tegra_soc_desc,
 	.fixup		= tegra_trimslice_fixup,
 	.map_io         = tegra_map_common_io,
 	.init_early	= tegra_init_early,
arch/arm/mach-tegra/common.c +8 -0
index d5e3f89..9f796bf 100644
@@ -22,6 +22,7 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 
+#include <asm/soc.h>
 #include <asm/hardware/cache-l2x0.h>
 
 #include <mach/iomap.h>
@@ -30,6 +31,7 @@
 #include "board.h"
 #include "clock.h"
 #include "fuse.h"
+#include "common.h"
 
 void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
 
@@ -81,3 +83,9 @@ void __init tegra_init_early(void)
 	tegra_clk_init_from_table(common_clk_init_table);
 	tegra_init_cache();
 }
+
+struct arm_soc_desc tegra_soc_desc __initdata = {
+	.name		= "NVIDIA Tegra",
+	soc_smp_init_ops(tegra_soc_smp_init_ops)
+	soc_smp_ops(tegra_soc_smp_ops)
+};
arch/arm/mach-tegra/common.h new file +11 -0
new file mode 100644
index 0000000..e4c214d
@@ -0,0 +1,11 @@
+struct arm_soc_desc;
+extern struct arm_soc_desc tegra_soc_desc;
+
+struct arm_soc_smp_init_ops;
+struct arm_soc_smp_ops;
+extern struct arm_soc_smp_init_ops	tegra_soc_smp_init_ops;
+extern struct arm_soc_smp_ops		tegra_soc_smp_ops;
+
+extern int  tegra_cpu_kill(unsigned int cpu);
+extern void tegra_cpu_die(unsigned int cpu);
+extern int  tegra_cpu_disable(unsigned int cpu);
arch/arm/mach-tegra/hotplug.c +3 -3
index f329404..7319f5f 100644
@@ -86,7 +86,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 	}
 }
 
-int platform_cpu_kill(unsigned int cpu)
+int tegra_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
@@ -96,7 +96,7 @@ int platform_cpu_kill(unsigned int cpu)
  *
  * Called with IRQs disabled
  */
-void platform_cpu_die(unsigned int cpu)
+void tegra_cpu_die(unsigned int cpu)
 {
 	int spurious = 0;
 
@@ -116,7 +116,7 @@ void platform_cpu_die(unsigned int cpu)
 		pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int tegra_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-tegra/platsmp.c +22 -4
index 0886cbc..f18b07d 100644
@@ -23,9 +23,12 @@
 #include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/smp_scu.h>
+#include <asm/soc.h>
 
 #include <mach/iomap.h>
 
+#include "common.h"
+
 extern void tegra_secondary_startup(void);
 
 static DEFINE_SPINLOCK(boot_lock);
@@ -38,7 +41,7 @@ static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
 #define CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR \
 	(IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x344)
 
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit tegra_secondary_init(unsigned int cpu)
 {
 	/*
 	 * if any interrupts are already enabled for the primary
@@ -54,7 +57,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	spin_unlock(&boot_lock);
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit tegra_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	unsigned long old_boot_vector;
 	unsigned long boot_vector;
@@ -110,7 +113,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  * Initialise the CPU possible map early - this describes the CPUs
  * which may be present or become present in the system.
  */
-void __init smp_init_cpus(void)
+static void __init tegra_smp_init_cpus(void)
 {
 	unsigned int i, ncores = scu_get_core_count(scu_base);
 
@@ -126,8 +129,23 @@ void __init smp_init_cpus(void)
 	set_smp_cross_call(gic_raise_softirq);
 }
 
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
 {
 
 	scu_enable(scu_base);
 }
+
+struct arm_soc_smp_init_ops tegra_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= tegra_smp_init_cpus,
+	.smp_prepare_cpus	= tegra_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops tegra_soc_smp_ops __initdata = {
+	.smp_secondary_init	= tegra_secondary_init,
+	.smp_boot_secondary	= tegra_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= tegra_cpu_kill,
+	.cpu_die		= tegra_cpu_die,
+	.cpu_disable		= tegra_cpu_disable,
+#endif
+};
Signature · 1 line
1.7.0.4
#6 lore raw

PATCH v5 6/10 ARM: SoC: convert Exynos4 to SoC descriptor

In reply to Marc Zyngier

Convert Exynos4 to use the SoC descriptor to provide its SMP and CPU hotplug operations.

---
 arch/arm/mach-exynos4/core.h                |   14 ++++++++++++++
 arch/arm/mach-exynos4/cpu.c                 |    8 ++++++++
 arch/arm/mach-exynos4/hotplug.c             |    8 +++++---
 arch/arm/mach-exynos4/mach-armlex4210.c     |    3 +++
 arch/arm/mach-exynos4/mach-nuri.c           |    3 +++
 arch/arm/mach-exynos4/mach-origen.c         |    3 +++
 arch/arm/mach-exynos4/mach-smdk4x12.c       |    4 ++++
 arch/arm/mach-exynos4/mach-smdkv310.c       |    4 ++++
 arch/arm/mach-exynos4/mach-universal_c210.c |    3 +++
 arch/arm/mach-exynos4/platsmp.c             |   25 +++++++++++++++++++++----
 10 files changed, 68 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/mach-exynos4/core.h
arch/arm/mach-exynos4/core.h new file +14 -0
new file mode 100644
index 0000000..e20c239
@@ -0,0 +1,14 @@
+#ifndef __EXYNOS4_CORE_H
+#define __EXYNOS4_CORE_H
+
+#include <asm/soc.h>
+
+extern struct arm_soc_smp_init_ops	exynos4_soc_smp_init_ops;
+extern struct arm_soc_smp_ops		exynos4_soc_smp_ops;
+extern struct arm_soc_desc		exynos4_soc_desc;
+
+extern int  exynos4_cpu_kill(unsigned int cpu);
+extern void exynos4_cpu_die(unsigned int cpu);
+extern int  exynos4_cpu_disable(unsigned int cpu);
+
+#endif /* __EXYNOS4_CORE_H */
arch/arm/mach-exynos4/cpu.c +8 -0
index 5b1765b..6662a66 100644
@@ -33,6 +33,8 @@
 #include <mach/regs-irq.h>
 #include <mach/regs-pmu.h>
 
+#include "core.h"
+
 unsigned int gic_bank_offset __read_mostly;
 
 extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
@@ -291,3 +293,9 @@ int __init exynos4_init(void)
 
 	return sysdev_register(&exynos4_sysdev);
 }
+
+struct arm_soc_desc exynos4_soc_desc __initdata = {
+	.name		= "Samsung EXYNOS4",
+	soc_smp_init_ops(exynos4_soc_smp_init_ops)
+	soc_smp_ops(exynos4_soc_smp_ops)
+};
arch/arm/mach-exynos4/hotplug.c +5 -3
index da70e7e..15fe884 100644
@@ -19,6 +19,8 @@
 
 #include <mach/regs-pmu.h>
 
+#include "core.h"
+
 extern volatile int pen_release;
 
 static inline void cpu_enter_lowpower(void)
@@ -93,7 +95,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 	}
 }
 
-int platform_cpu_kill(unsigned int cpu)
+int exynos4_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
@@ -103,7 +105,7 @@ int platform_cpu_kill(unsigned int cpu)
  *
  * Called with IRQs disabled
  */
-void platform_cpu_die(unsigned int cpu)
+void exynos4_cpu_die(unsigned int cpu)
 {
 	int spurious = 0;
 
@@ -123,7 +125,7 @@ void platform_cpu_die(unsigned int cpu)
 		pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int exynos4_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-exynos4/mach-armlex4210.c +3 -0
index f0ca6c1..8c82c6b 100644
@@ -28,6 +28,8 @@
 
 #include <mach/map.h>
 
+#include "core.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define ARMLEX4210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
 				 S3C2410_UCON_RXILEVEL |	\
@@ -208,6 +210,7 @@ static void __init armlex4210_machine_init(void)
 MACHINE_START(ARMLEX4210, "ARMLEX4210")
 	/* Maintainer: Alim Akhtar <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= armlex4210_map_io,
 	.init_machine	= armlex4210_machine_init,
arch/arm/mach-exynos4/mach-nuri.c +3 -0
index 2204911..923edc2 100644
@@ -48,6 +48,8 @@
 
 #include <mach/map.h>
 
+#include "core.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define NURI_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
 				 S3C2410_UCON_RXILEVEL |	\
@@ -1187,6 +1189,7 @@ static void __init nuri_machine_init(void)
 MACHINE_START(NURI, "NURI")
 	/* Maintainer: Kyungmin Park <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= nuri_map_io,
 	.init_machine	= nuri_machine_init,
arch/arm/mach-exynos4/mach-origen.c +3 -0
index 71db848..818258e 100644
@@ -42,6 +42,8 @@
 
 #include <mach/map.h>
 
+#include "core.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define ORIGEN_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
 				 S3C2410_UCON_RXILEVEL |	\
@@ -672,6 +674,7 @@ static void __init origen_machine_init(void)
 MACHINE_START(ORIGEN, "ORIGEN")
 	/* Maintainer: JeongHyeon Kim <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= origen_map_io,
 	.init_machine	= origen_machine_init,
arch/arm/mach-exynos4/mach-smdk4x12.c +4 -0
index fcf2e0e..052b2cb 100644
@@ -36,6 +36,8 @@
 
 #include <mach/map.h>
 
+#include "core.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDK4X12_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
 				 S3C2410_UCON_RXILEVEL |	\
@@ -285,6 +287,7 @@ static void __init smdk4x12_machine_init(void)
 MACHINE_START(SMDK4212, "SMDK4212")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= smdk4x12_map_io,
 	.init_machine	= smdk4x12_machine_init,
@@ -295,6 +298,7 @@ MACHINE_START(SMDK4412, "SMDK4412")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	/* Maintainer: Changhwan Youn <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= smdk4x12_map_io,
 	.init_machine	= smdk4x12_machine_init,
arch/arm/mach-exynos4/mach-smdkv310.c +4 -0
index cec2afa..525b042 100644
@@ -43,6 +43,8 @@
 
 #include <mach/map.h>
 
+#include "core.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKV310_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
 				 S3C2410_UCON_RXILEVEL |	\
@@ -373,6 +375,7 @@ MACHINE_START(SMDKV310, "SMDKV310")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	/* Maintainer: Changhwan Youn <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= smdkv310_map_io,
 	.init_machine	= smdkv310_machine_init,
@@ -383,6 +386,7 @@ MACHINE_END
 MACHINE_START(SMDKC210, "SMDKC210")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= smdkv310_map_io,
 	.init_machine	= smdkv310_machine_init,
arch/arm/mach-exynos4/mach-universal_c210.c +3 -0
index a023faa..0c94673 100644
@@ -47,6 +47,8 @@
 #include <media/s5p_fimc.h>
 #include <media/m5mols.h>
 
+#include "core.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define UNIVERSAL_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
 				 S3C2410_UCON_RXILEVEL |	\
@@ -1061,6 +1063,7 @@ static void __init universal_machine_init(void)
 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
 	/* Maintainer: Kyungmin Park <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &exynos4_soc_desc,
 	.init_irq	= exynos4_init_irq,
 	.map_io		= universal_map_io,
 	.init_machine	= universal_machine_init,
arch/arm/mach-exynos4/platsmp.c +21 -4
index e698604..56377d2 100644
@@ -32,6 +32,8 @@
 
 #include <plat/cpu.h>
 
+#include "core.h"
+
 extern unsigned int gic_bank_offset;
 extern void exynos4_secondary_startup(void);
 
@@ -90,7 +92,7 @@ static void __cpuinit exynos4_gic_secondary_init(void)
 	__raw_writel(1, cpu_base + GIC_CPU_CTRL);
 }
 
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit exynos4_secondary_init(unsigned int cpu)
 {
 	/*
 	 * if any interrupts are already enabled for the primary
@@ -114,7 +116,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	set_cpu_online(cpu, true);
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit exynos4_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	unsigned long timeout;
 
@@ -189,7 +191,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  * which may be present or become present in the system.
  */
 
-void __init smp_init_cpus(void)
+static void __init exynos4_smp_init_cpus(void)
 {
 	void __iomem *scu_base = scu_base_addr();
 	unsigned int i, ncores;
@@ -211,7 +213,7 @@ void __init smp_init_cpus(void)
 	set_smp_cross_call(gic_raise_softirq);
 }
 
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init exynos4_smp_prepare_cpus(unsigned int max_cpus)
 {
 
 	scu_enable(scu_base_addr());
@@ -225,3 +227,18 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 	__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
 			CPU1_BOOT_REG);
 }
+
+struct arm_soc_smp_init_ops exynos4_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= exynos4_smp_init_cpus,
+	.smp_prepare_cpus	= exynos4_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops exynos4_soc_smp_ops __initdata = {
+	.smp_secondary_init	= exynos4_secondary_init,
+	.smp_boot_secondary	= exynos4_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= exynos4_cpu_kill,
+	.cpu_die		= exynos4_cpu_die,
+	.cpu_disable		= exynos4_cpu_disable,
+#endif
+};
Signature · 1 line
1.7.0.4
#7 lore raw

PATCH v5 7/10 ARM: SoC: convert MSM SMP to SoC descriptor

In reply to Marc Zyngier

Convert MSM SMP platforms to use the SoC descriptor to provide their SMP and CPU hotplug operations.

---
 arch/arm/mach-msm/Makefile        |    2 +-
 arch/arm/mach-msm/board-msm8960.c |    3 +++
 arch/arm/mach-msm/board-msm8x60.c |    7 +++++++
 arch/arm/mach-msm/core.c          |   17 +++++++++++++++++
 arch/arm/mach-msm/core.h          |    9 +++++++++
 arch/arm/mach-msm/hotplug.c       |    8 +++++---
 arch/arm/mach-msm/platsmp.c       |   24 ++++++++++++++++++++----
 7 files changed, 62 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/mach-msm/core.c
 create mode 100644 arch/arm/mach-msm/core.h
arch/arm/mach-msm/Makefile +1 -1
index 4ad3969..cba9355 100644
@@ -1,5 +1,5 @@
 obj-y += io.o idle.o timer.o
-obj-y += clock.o
+obj-y += clock.o core.o
 obj-$(CONFIG_DEBUG_FS) += clock-debug.o
 
 obj-$(CONFIG_MSM_VIC) += irq-vic.o
arch/arm/mach-msm/board-msm8960.c +3 -0
index b04468e..c811e29 100644
@@ -30,6 +30,7 @@
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 
+#include "core.h"
 #include "devices.h"
 
 static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
@@ -94,6 +95,7 @@ static void __init msm8960_rumi3_init(void)
 }
 
 MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
+	.soc = &msm_soc_desc,
 	.fixup = msm8960_fixup,
 	.reserve = msm8960_reserve,
 	.map_io = msm8960_map_io,
@@ -103,6 +105,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
 MACHINE_END
 
 MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
+	.soc = &msm_soc_desc,
 	.fixup = msm8960_fixup,
 	.reserve = msm8960_reserve,
 	.map_io = msm8960_map_io,
arch/arm/mach-msm/board-msm8x60.c +7 -0
index 4ad2afb..a4bd858 100644
@@ -28,6 +28,8 @@
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 
+#include "core.h"
+
 static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag,
 			 char **cmdline, struct meminfo *mi)
 {
@@ -115,6 +117,7 @@ static const char *msm8x60_fluid_match[] __initdata = {
 #endif /* CONFIG_OF */
 
 MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
+	.soc = &msm_soc_desc,
 	.fixup = msm8x60_fixup,
 	.reserve = msm8x60_reserve,
 	.map_io = msm8x60_map_io,
@@ -124,6 +127,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
 MACHINE_END
 
 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
+	.soc = &msm_soc_desc,
 	.fixup = msm8x60_fixup,
 	.reserve = msm8x60_reserve,
 	.map_io = msm8x60_map_io,
@@ -133,6 +137,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
 MACHINE_END
 
 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
+	.soc = &msm_soc_desc,
 	.fixup = msm8x60_fixup,
 	.reserve = msm8x60_reserve,
 	.map_io = msm8x60_map_io,
@@ -142,6 +147,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
 MACHINE_END
 
 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
+	.soc = &msm_soc_desc,
 	.fixup = msm8x60_fixup,
 	.reserve = msm8x60_reserve,
 	.map_io = msm8x60_map_io,
@@ -153,6 +159,7 @@ MACHINE_END
 #ifdef CONFIG_OF
 /* TODO: General device tree support for all MSM. */
 DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
+	.soc = &msm_soc_desc,
 	.fixup = msm8x60_fixup,
 	.reserve = msm8x60_reserve,
 	.map_io = msm8x60_map_io,
arch/arm/mach-msm/core.c new file +17 -0
new file mode 100644
index 0000000..390cde7
@@ -0,0 +1,17 @@
+/*
+ *  Copyright (C) 2011 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include "core.h"
+
+struct arm_soc_desc msm_soc_desc __initdata = {
+	.name		= "Qualcomm MSM",
+	soc_smp_init_ops(msm_soc_smp_init_ops)
+	soc_smp_ops(msm_soc_smp_ops)
+};
arch/arm/mach-msm/core.h new file +9 -0
new file mode 100644
index 0000000..e8394dd
@@ -0,0 +1,9 @@
+#include <asm/soc.h>
+
+extern struct arm_soc_smp_init_ops	msm_soc_smp_init_ops;
+extern struct arm_soc_smp_ops		msm_soc_smp_ops;
+extern struct arm_soc_desc		msm_soc_desc;
+
+extern int  msm_cpu_kill(unsigned int cpu);
+extern void msm_cpu_die(unsigned int cpu);
+extern int  msm_cpu_disable(unsigned int cpu);
arch/arm/mach-msm/hotplug.c +5 -3
index 41c252d..eef1b30 100644
@@ -12,6 +12,8 @@
 
 #include <asm/cacheflush.h>
 
+#include "core.h"
+
 extern volatile int pen_release;
 
 static inline void cpu_enter_lowpower(void)
@@ -56,7 +58,7 @@ static inline void platform_do_lowpower(unsigned int cpu)
 	}
 }
 
-int platform_cpu_kill(unsigned int cpu)
+int msm_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
@@ -66,7 +68,7 @@ int platform_cpu_kill(unsigned int cpu)
  *
  * Called with IRQs disabled
  */
-void platform_cpu_die(unsigned int cpu)
+void msm_cpu_die(unsigned int cpu)
 {
 	/*
 	 * we're ready for shutdown now, so do it
@@ -81,7 +83,7 @@ void platform_cpu_die(unsigned int cpu)
 	cpu_leave_lowpower();
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int msm_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-msm/platsmp.c +20 -4
index e3375ee..4902c16 100644
@@ -24,6 +24,7 @@
 #include <mach/msm_iomap.h>
 
 #include "scm-boot.h"
+#include "core.h"
 
 #define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0
 #define SCSS_CPU1CORE_RESET 0xD80
@@ -47,7 +48,7 @@ static inline int get_core_count(void)
 	return ((read_cpuid_id() >> 4) & 3) + 1;
 }
 
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit msm_secondary_init(unsigned int cpu)
 {
 	/* Configure edge-triggered PPIs */
 	writel(GIC_PPI_EDGE_MASK, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
@@ -92,7 +93,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
 				  "address\n");
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	unsigned long timeout;
 	static int cold_boot_done;
@@ -152,7 +153,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  * does not support the ARM SCU, so just set the possible cpu mask to
  * NR_CPUS.
  */
-void __init smp_init_cpus(void)
+static void __init msm_smp_init_cpus(void)
 {
 	unsigned int i, ncores = get_core_count();
 
@@ -162,6 +163,21 @@ void __init smp_init_cpus(void)
         set_smp_cross_call(gic_raise_softirq);
 }
 
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
 {
 }
+
+struct arm_soc_smp_init_ops msm_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= msm_smp_init_cpus,
+	.smp_prepare_cpus	= msm_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops msm_soc_smp_ops __initdata = {
+	.smp_secondary_init	= msm_secondary_init,
+	.smp_boot_secondary	= msm_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= msm_cpu_kill,
+	.cpu_die		= msm_cpu_die,
+	.cpu_disable		= msm_cpu_disable,
+#endif
+};
Signature · 1 line
1.7.0.4
#8 lore raw

PATCH v5 8/10 ARM: SoC: convert ux500 to SoC descriptor

In reply to Marc Zyngier

Convert ux500 platforms to use the SoC descriptor to provide their SMP and CPU hotplug operations.

---
 arch/arm/mach-ux500/board-mop500.c       |    3 +++
 arch/arm/mach-ux500/board-u5500.c        |    1 +
 arch/arm/mach-ux500/hotplug.c            |    8 +++++---
 arch/arm/mach-ux500/include/mach/setup.h |    9 +++++++++
 arch/arm/mach-ux500/platsmp.c            |   23 +++++++++++++++++++----
 5 files changed, 37 insertions(+), 7 deletions(-)
arch/arm/mach-ux500/board-mop500.c +3 -0
index bdd7b80..f0b1a00 100644
@@ -691,6 +691,7 @@ static void __init hrefv60_init_machine(void)
 MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
 	/* Maintainer: Srinidhi Kasagar <[email protected]> */
 	.atag_offset	= 0x100,
+	.soc		= &ux500_soc_desc,
 	.map_io		= u8500_map_io,
 	.init_irq	= ux500_init_irq,
 	/* we re-use nomadik timer here */
@@ -700,6 +701,7 @@ MACHINE_END
 
 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
 	.atag_offset	= 0x100,
+	.soc		= &ux500_soc_desc,
 	.map_io		= u8500_map_io,
 	.init_irq	= ux500_init_irq,
 	.timer		= &ux500_timer,
@@ -708,6 +710,7 @@ MACHINE_END
 
 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
 	.atag_offset	= 0x100,
+	.soc		= &ux500_soc_desc,
 	.map_io		= u8500_map_io,
 	.init_irq	= ux500_init_irq,
 	/* we re-use nomadik timer here */
arch/arm/mach-ux500/board-u5500.c +1 -0
index 82025ba..aeb125a 100644
@@ -146,6 +146,7 @@ static void __init u5500_init_machine(void)
 
 MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
 	.atag_offset	= 0x100,
+	.soc		= &ux500_soc_desc,
 	.map_io		= u5500_map_io,
 	.init_irq	= ux500_init_irq,
 	.timer		= &ux500_timer,
arch/arm/mach-ux500/hotplug.c +5 -3
index 572015e..03424ab 100644
@@ -14,6 +14,8 @@
 
 #include <asm/cacheflush.h>
 
+#include <mach/setup.h>
+
 extern volatile int pen_release;
 
 static inline void platform_do_lowpower(unsigned int cpu)
@@ -33,7 +35,7 @@ static inline void platform_do_lowpower(unsigned int cpu)
 	}
 }
 
-int platform_cpu_kill(unsigned int cpu)
+int ux500_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
@@ -43,13 +45,13 @@ int platform_cpu_kill(unsigned int cpu)
  *
  * Called with IRQs disabled
  */
-void platform_cpu_die(unsigned int cpu)
+void ux500_cpu_die(unsigned int cpu)
 {
 	/* directly enter low power state, skipping secure registers */
 	platform_do_lowpower(cpu);
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int ux500_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-ux500/include/mach/setup.h +9 -0
index a7d363f..e764530 100644
@@ -11,6 +11,7 @@
 #ifndef __ASM_ARCH_SETUP_H
 #define __ASM_ARCH_SETUP_H
 
+#include <asm/soc.h>
 #include <asm/mach/time.h>
 #include <linux/init.h>
 
@@ -50,4 +51,12 @@ extern struct sys_timer ux500_timer;
 	.type		= MT_MEMORY,		\
 }
 
+extern struct arm_soc_smp_init_ops ux500_soc_smp_init_ops;
+extern struct arm_soc_smp_ops ux500_soc_smp_ops;
+extern struct arm_soc_desc ux500_soc_desc;
+
+extern int  ux500_cpu_kill(unsigned int cpu);
+extern void ux500_cpu_die(unsigned int cpu);
+extern int  ux500_cpu_disable(unsigned int cpu);
+
 #endif /*  __ASM_ARCH_SETUP_H */
arch/arm/mach-ux500/platsmp.c +19 -4
index 27e5281..9e9254c 100644
@@ -59,7 +59,7 @@ static void __iomem *scu_base_addr(void)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit ux500_secondary_init(unsigned int cpu)
 {
 	/*
 	 * if any interrupts are already enabled for the primary
@@ -81,7 +81,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	spin_unlock(&boot_lock);
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	unsigned long timeout;
 
@@ -148,7 +148,7 @@ static void __init wakeup_secondary(void)
  * Initialise the CPU possible map early - this describes the CPUs
  * which may be present or become present in the system.
  */
-void __init smp_init_cpus(void)
+static void __init ux500_smp_init_cpus(void)
 {
 	void __iomem *scu_base = scu_base_addr();
 	unsigned int i, ncores;
@@ -170,9 +170,24 @@ void __init smp_init_cpus(void)
 	set_smp_cross_call(gic_raise_softirq);
 }
 
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
 {
 
 	scu_enable(scu_base_addr());
 	wakeup_secondary();
 }
+
+struct arm_soc_smp_init_ops ux500_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= ux500_smp_init_cpus,
+	.smp_prepare_cpus	= ux500_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops ux500_soc_smp_ops __initdata = {
+	.smp_secondary_init	= ux500_secondary_init,
+	.smp_boot_secondary	= ux500_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= ux500_cpu_kill,
+	.cpu_die		= ux500_cpu_die,
+	.cpu_disable		= ux500_cpu_disable,
+#endif
+};
Signature · 1 line
1.7.0.4
#9 lore raw

PATCH v5 9/10 ARM: SoC: convert shmobile sh73a0 to SoC descriptor

In reply to Marc Zyngier

Convert shmobile SMP platform to use the SoC descriptor to provide its SMP and CPU hotplug operations.

Cc Paul Mundt <[email protected]>
Cc Magnus Damm <[email protected]>
---
 arch/arm/mach-shmobile/Makefile              |    2 +-
 arch/arm/mach-shmobile/board-ag5evm.c        |    1 +
 arch/arm/mach-shmobile/hotplug.c             |    8 ++-
 arch/arm/mach-shmobile/include/mach/common.h |    7 +--
 arch/arm/mach-shmobile/include/mach/sh73a0.h |    6 ++
 arch/arm/mach-shmobile/platsmp.c             |   68 --------------------------
 arch/arm/mach-shmobile/setup-sh73a0.c        |    6 ++
 arch/arm/mach-shmobile/smp-sh73a0.c          |   35 ++++++++++++--
 8 files changed, 53 insertions(+), 80 deletions(-)
 delete mode 100644 arch/arm/mach-shmobile/platsmp.c
arch/arm/mach-shmobile/Makefile +1 -1
index 612b270..43754f3 100644
@@ -12,7 +12,7 @@ obj-$(CONFIG_ARCH_SH7372)	+= setup-sh7372.o clock-sh7372.o intc-sh7372.o
 obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
 
 # SMP objects
-smp-y				:= platsmp.o headsmp.o
+smp-y				:= headsmp.o
 smp-$(CONFIG_HOTPLUG_CPU)	+= hotplug.o
 smp-$(CONFIG_LOCAL_TIMERS)	+= localtimer.o
 smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o
arch/arm/mach-shmobile/board-ag5evm.c +1 -0
index 475342b..448f51a 100644
@@ -601,6 +601,7 @@ struct sys_timer ag5evm_timer = {
 
 MACHINE_START(AG5EVM, "ag5evm")
 	.map_io		= ag5evm_map_io,
+	.soc		= &sh73a0_soc_desc,
 	.init_irq	= ag5evm_init_irq,
 	.handle_irq	= shmobile_handle_irq_gic,
 	.init_machine	= ag5evm_init,
arch/arm/mach-shmobile/hotplug.c +5 -3
index 238a0d9..687c8c2 100644
@@ -13,12 +13,14 @@
 #include <linux/errno.h>
 #include <linux/smp.h>
 
-int platform_cpu_kill(unsigned int cpu)
+#include <mach/common.h>
+
+int shmobile_cpu_kill(unsigned int cpu)
 {
 	return 1;
 }
 
-void platform_cpu_die(unsigned int cpu)
+void shmobile_cpu_die(unsigned int cpu)
 {
 	while (1) {
 		/*
@@ -31,7 +33,7 @@ void platform_cpu_die(unsigned int cpu)
 	}
 }
 
-int platform_cpu_disable(unsigned int cpu)
+int shmobile_cpu_disable(unsigned int cpu)
 {
 	/*
 	 * we don't allow CPU 0 to be shutdown (it is still too special
arch/arm/mach-shmobile/include/mach/common.h +3 -4
index c0cdbf9..2283521 100644
@@ -48,9 +48,8 @@ extern void sh73a0_pinmux_init(void);
 extern struct clk sh73a0_extal1_clk;
 extern struct clk sh73a0_extal2_clk;
 
-extern unsigned int sh73a0_get_core_count(void);
-extern void sh73a0_secondary_init(unsigned int cpu);
-extern int sh73a0_boot_secondary(unsigned int cpu);
-extern void sh73a0_smp_prepare_cpus(void);
+extern int shmobile_cpu_kill(unsigned int cpu);
+extern void shmobile_cpu_die(unsigned int cpu);
+extern int shmobile_cpu_disable(unsigned int cpu);
 
 #endif /* __ARCH_MACH_COMMON_H */
arch/arm/mach-shmobile/include/mach/sh73a0.h +6 -0
index b385e97..d22a1a5 100644
@@ -507,4 +507,10 @@ enum {
 	SHDMA_SLAVE_MMCIF_RX,
 };
 
+#include <asm/soc.h>
+
+extern struct arm_soc_smp_init_ops sh73a0_soc_smp_init_ops;
+extern struct arm_soc_smp_ops sh73a0_soc_smp_ops;
+extern struct arm_soc_desc sh73a0_soc_desc;
+
 #endif /* __ASM_SH73A0_H__ */
arch/arm/mach-shmobile/platsmp.c deleted +0 -68

68 lines not on this page · raw message

arch/arm/mach-shmobile/setup-sh73a0.c +6 -0
index e46821c..85ab3e1 100644
@@ -672,3 +672,9 @@ void __init sh73a0_add_early_devices(void)
 	early_platform_add_devices(sh73a0_early_devices,
 				   ARRAY_SIZE(sh73a0_early_devices));
 }
+
+struct arm_soc_desc sh73a0_soc_desc __initdata = {
+	.name		= "Renesas sh73a0",
+	soc_smp_init_ops(sh73a0_soc_smp_init_ops)
+	soc_smp_ops(sh73a0_soc_smp_ops)
+};
arch/arm/mach-shmobile/smp-sh73a0.c +31 -4
index be1ade7..274b9c5 100644
@@ -23,6 +23,7 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <mach/common.h>
+#include <mach/sh73a0.h>
 #include <asm/smp_scu.h>
 #include <asm/smp_twd.h>
 #include <asm/hardware/gic.h>
@@ -55,7 +56,7 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
 	__raw_writel(tmp, scu_base + 8);
 }
 
-unsigned int __init sh73a0_get_core_count(void)
+static unsigned int __init sh73a0_get_core_count(void)
 {
 	void __iomem *scu_base = scu_base_addr();
 
@@ -67,12 +68,12 @@ unsigned int __init sh73a0_get_core_count(void)
 	return scu_get_core_count(scu_base);
 }
 
-void __cpuinit sh73a0_secondary_init(unsigned int cpu)
+static void __cpuinit sh73a0_secondary_init(unsigned int cpu)
 {
 	gic_secondary_init(0);
 }
 
-int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
+static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	cpu = cpu_logical_map(cpu);
 
@@ -87,7 +88,7 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
 	return 0;
 }
 
-void __init sh73a0_smp_prepare_cpus(void)
+static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
 {
 	int cpu = cpu_logical_map(0);
 
@@ -100,3 +101,29 @@ void __init sh73a0_smp_prepare_cpus(void)
 	/* enable cache coherency on CPU0 */
 	modify_scu_cpu_psr(0, 3 << (cpu * 8));
 }
+
+static void __init sh73a0_smp_init_cpus(void)
+{
+	unsigned int ncores = sh73a0_get_core_count();
+	unsigned int i;
+
+	for (i = 0; i < ncores; i++)
+		set_cpu_possible(i, true);
+
+	set_smp_cross_call(gic_raise_softirq);
+}
+
+struct arm_soc_smp_init_ops sh73a0_soc_smp_init_ops __initdata = {
+	.smp_init_cpus		= sh73a0_smp_init_cpus,
+	.smp_prepare_cpus	= sh73a0_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops sh73a0_soc_smp_ops __initdata = {
+	.smp_secondary_init	= sh73a0_secondary_init,
+	.smp_boot_secondary	= sh73a0_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_kill		= shmobile_cpu_kill,
+	.cpu_die		= shmobile_cpu_die,
+	.cpu_disable		= shmobile_cpu_disable,
+#endif
+};
Signature · 1 line
1.7.0.4
#10 lore raw

PATCH v5 10/10 ARM: smp: Make SoC descriptor mandatory for SMP platforms

In reply to Marc Zyngier

Now that all SMP platforms have been converted to the SOC descriptor and its SMP operations, remove the "weak" attribute from the hooks in smp.c, and make the functions static wherever possible.

---
 arch/arm/include/asm/smp.h |   15 ---------------
 arch/arm/kernel/smp.c      |   18 +++++++++---------
 2 files changed, 9 insertions(+), 24 deletions(-)
arch/arm/include/asm/smp.h +0 -15
index 674ebcd..bf25484 100644
@@ -56,16 +56,6 @@ extern int boot_secondary(unsigned int cpu, struct task_struct *);
 asmlinkage void secondary_start_kernel(void);
 
 /*
- * Perform platform specific initialisation of the specified CPU.
- */
-extern void platform_secondary_init(unsigned int cpu);
-
-/*
- * Initialize cpu_possible map, and enable coherency
- */
-extern void platform_smp_prepare_cpus(unsigned int);
-
-/*
  * Logical CPU mapping.
  */
 extern int __cpu_logical_map[NR_CPUS];
@@ -82,15 +72,10 @@ struct secondary_data {
 extern struct secondary_data secondary_data;
 
 extern int __cpu_disable(void);
-extern int platform_cpu_disable(unsigned int cpu);
 
 extern void __cpu_die(unsigned int cpu);
 extern void cpu_die(void);
 
-extern void platform_cpu_die(unsigned int cpu);
-extern int platform_cpu_kill(unsigned int cpu);
-extern void platform_cpu_enable(unsigned int cpu);
-
 extern void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 
arch/arm/kernel/smp.c +9 -9
index f7a9add..c256dd9 100644
@@ -179,25 +179,25 @@ void __init soc_smp_ops_register(struct arm_soc_smp_init_ops *smp_init_ops,
 	}
 }
 
-void __attribute__((weak)) __init smp_init_cpus(void)
+void __init smp_init_cpus(void)
 {
 	if (soc_smp_init_ops && soc_smp_init_ops->smp_init_cpus)
 		soc_smp_init_ops->smp_init_cpus();
 }
 
-void __attribute__((weak)) __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 {
 	if (soc_smp_ops && soc_smp_init_ops->smp_prepare_cpus)
 		soc_smp_init_ops->smp_prepare_cpus(max_cpus);
 }
 
-void __attribute__((weak)) __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit platform_secondary_init(unsigned int cpu)
 {
 	if (soc_smp_ops && soc_smp_ops->smp_secondary_init)
 		soc_smp_ops->smp_secondary_init(cpu);
 }
 
-int __attribute__((weak)) __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
 	if (soc_smp_ops && soc_smp_ops->smp_boot_secondary)
 		return soc_smp_ops->smp_boot_secondary(cpu, idle);
@@ -207,20 +207,20 @@ int __attribute__((weak)) __cpuinit boot_secondary(unsigned int cpu, struct task
 #ifdef CONFIG_HOTPLUG_CPU
 static void percpu_timer_stop(void);
 
-int __attribute__((weak)) __cpuinit platform_cpu_kill(unsigned int cpu)
+static int __cpuinit platform_cpu_kill(unsigned int cpu)
 {
 	if (soc_smp_ops && soc_smp_ops->cpu_kill)
 		return soc_smp_ops->cpu_kill(cpu);
 	return 0;
 }
 
-void __attribute__((weak)) __cpuinit platform_cpu_die(unsigned int cpu)
+static void __cpuinit platform_cpu_die(unsigned int cpu)
 {
 	if (soc_smp_ops && soc_smp_ops->cpu_die)
 		soc_smp_ops->cpu_die(cpu);
 }
 
-int __attribute__((weak)) __cpuinit platform_cpu_disable(unsigned int cpu)
+static int __cpuinit platform_cpu_disable(unsigned int cpu)
 {
 	if (soc_smp_ops && soc_smp_ops->cpu_disable)
 		return soc_smp_ops->cpu_disable(cpu);
@@ -230,7 +230,7 @@ int __attribute__((weak)) __cpuinit platform_cpu_disable(unsigned int cpu)
 /*
  * __cpu_disable runs on the processor to be shutdown.
  */
-int __cpu_disable(void)
+int __cpuinit __cpu_disable(void)
 {
 	unsigned int cpu = smp_processor_id();
 	struct task_struct *p;
@@ -279,7 +279,7 @@ static DECLARE_COMPLETION(cpu_died);
  * called on the thread which is asking for a CPU to be shutdown -
  * waits until shutdown has completed, or it is timed out.
  */
-void __cpu_die(unsigned int cpu)
+void __cpuinit __cpu_die(unsigned int cpu)
 {
 	if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
 		pr_err("CPU%u: cpu didn't die\n", cpu);
Signature · 1 line
1.7.0.4
#11 lore raw

v5 cover Per SoC descriptor

In reply to Marc Zyngier
Quoted 58 lines · Marc Zyngier
 arch/arm/include/asm/mach/arch.h                |    2 +
 arch/arm/include/asm/smp.h                      |   15 -----
 arch/arm/include/asm/soc.h                      |   64 ++++++++++++++++++++
 arch/arm/kernel/setup.c                         |    8 +++
 arch/arm/kernel/smp.c                           |   73 ++++++++++++++++++++++-
 arch/arm/mach-exynos4/core.h                    |   14 ++++
 arch/arm/mach-exynos4/cpu.c                     |    8 +++
 arch/arm/mach-exynos4/hotplug.c                 |    8 ++-
 arch/arm/mach-exynos4/mach-armlex4210.c         |    3 +
 arch/arm/mach-exynos4/mach-nuri.c               |    3 +
 arch/arm/mach-exynos4/mach-origen.c             |    3 +
 arch/arm/mach-exynos4/mach-smdk4x12.c           |    4 +
 arch/arm/mach-exynos4/mach-smdkv310.c           |    4 +
 arch/arm/mach-exynos4/mach-universal_c210.c     |    3 +
 arch/arm/mach-exynos4/platsmp.c                 |   25 +++++++-
 arch/arm/mach-msm/Makefile                      |    2 +-
 arch/arm/mach-msm/board-msm8960.c               |    3 +
 arch/arm/mach-msm/board-msm8x60.c               |    7 ++
 arch/arm/mach-msm/core.c                        |   17 +++++
 arch/arm/mach-msm/core.h                        |    9 +++
 arch/arm/mach-msm/hotplug.c                     |    8 ++-
 arch/arm/mach-msm/platsmp.c                     |   24 ++++++-
 arch/arm/mach-omap2/board-4430sdp.c             |    1 +
 arch/arm/mach-omap2/board-omap4panda.c          |    1 +
 arch/arm/mach-omap2/include/mach/omap4-common.h |   14 ++++
 arch/arm/mach-omap2/omap-hotplug.c              |    6 +-
 arch/arm/mach-omap2/omap-smp.c                  |   24 ++++++-
 arch/arm/mach-omap2/omap4-common.c              |    7 ++
 arch/arm/mach-realview/core.c                   |    7 ++
 arch/arm/mach-realview/core.h                   |    9 +++
 arch/arm/mach-realview/hotplug.c                |    6 +-
 arch/arm/mach-realview/platsmp.c                |   24 ++++++-
 arch/arm/mach-realview/realview_eb.c            |    1 +
 arch/arm/mach-realview/realview_pb1176.c        |    1 +
 arch/arm/mach-realview/realview_pb11mp.c        |    1 +
 arch/arm/mach-realview/realview_pba8.c          |    1 +
 arch/arm/mach-realview/realview_pbx.c           |    1 +
 arch/arm/mach-shmobile/Makefile                 |    2 +-
 arch/arm/mach-shmobile/board-ag5evm.c           |    1 +
 arch/arm/mach-shmobile/hotplug.c                |    8 ++-
 arch/arm/mach-shmobile/include/mach/common.h    |    7 +-
 arch/arm/mach-shmobile/include/mach/sh73a0.h    |    6 ++
 arch/arm/mach-shmobile/platsmp.c                |   68 ---------------------
 arch/arm/mach-shmobile/setup-sh73a0.c           |    6 ++
 arch/arm/mach-shmobile/smp-sh73a0.c             |   35 ++++++++++-
 arch/arm/mach-tegra/board-dt.c                  |    2 +
 arch/arm/mach-tegra/board-harmony.c             |    2 +
 arch/arm/mach-tegra/board-paz00.c               |    2 +
 arch/arm/mach-tegra/board-seaboard.c            |    4 +
 arch/arm/mach-tegra/board-trimslice.c           |    2 +
 arch/arm/mach-tegra/common.c                    |    8 +++
 arch/arm/mach-tegra/common.h                    |   11 ++++
 arch/arm/mach-tegra/hotplug.c                   |    6 +-
 arch/arm/mach-tegra/platsmp.c                   |   26 +++++++-
 arch/arm/mach-ux500/board-mop500.c              |    3 +
 arch/arm/mach-ux500/board-u5500.c               |    1 +
 arch/arm/mach-ux500/hotplug.c                   |    8 ++-
 arch/arm/mach-ux500/include/mach/setup.h        |    9 +++
Quoted 8 lines
 arch/arm/mach-ux500/platsmp.c                   |   23 ++++++-
 arch/arm/mach-vexpress/core.h                   |   10 +++
 arch/arm/mach-vexpress/hotplug.c                |    6 +-
 arch/arm/mach-vexpress/platsmp.c                |   24 ++++++-
 arch/arm/mach-vexpress/v2m.c                    |    9 +++
 arch/arm/plat-versatile/include/plat/platsmp.h  |   14 ++++
 arch/arm/plat-versatile/platsmp.c               |    4 +-
 65 files changed, 569 insertions(+), 149 deletions(-)

This isn't particularly appealing for something that's supposed to be a clean up - it's introducing 400+ new lines of code. It looks like most of this comes from the platform stuff rather than core stuff.

Can't we do any better with this? We really need things to be going in the other direction.

#12 lore raw

v5 cover Per SoC descriptor

Quoted 1 line · Russell King - ARM Linux

On Mon, Oct 10, 2011 at 03:02:12PM +0100, Marc Zyngier wrote:

[...]

Quoted 8 lines
Quoted 1 line
 65 files changed, 569 insertions(+), 149 deletions(-)

This isn't particularly appealing for something that's supposed to be a clean up - it's introducing 400+ new lines of code. It looks like most of this comes from the platform stuff rather than core stuff.

Can't we do any better with this? We really need things to be going in the other direction.

There is definitely room for improvement, by factoring in some common code across platforms. But I see that as a second phase, and started by just moving things to the SoC descriptor, all the code staying mostly the same.

If we agree the method, then I'll start looking at reducing the platform footprint by offering common methods that plug into the SMP ops.

	M.
Signature · 1 line
Jazz is not dead. It just smells funny...
#13 lore raw

v5 cover Per SoC descriptor

Quoted 11 lines · Marc Zyngier
Quoted 1 line · Russell King - ARM Linux

On Mon, Oct 10, 2011 at 03:02:12PM +0100, Marc Zyngier wrote:

[...]

Quoted 6 lines
Quoted 1 line
 65 files changed, 569 insertions(+), 149 deletions(-)

This isn't particularly appealing for something that's supposed to be a clean up - it's introducing 400+ new lines of code. It looks like most of this comes from the platform stuff rather than core stuff.

Quoted 7 lines
Quoted 2 lines

Can't we do any better with this? We really need things to be going in the other direction.

There is definitely room for improvement, by factoring in some common code across platforms. But I see that as a second phase, and started by just moving things to the SoC descriptor, all the code staying mostly the same.

I was meaning without that - what concerns me is the size of increase just to introduce this. It seems needlessly large.

I've also never been convinced by attempts to consolidate the hotplug code - I've said this every time it's been suggested: I believe many platforms just aren't trying to support hotplug CPU properly.

They've just copied the noddy Realview platform version - which is noddy because ARMs platforms tend to have a total lack of power management support on them. The best we can do is put them in a WFI loop waiting to be re-awoken.

Real platforms surely must have better PM support than that, and so copying the Realview implementation does not make sense - it's good to see that _some_ platforms have made an effort, though they still just return from platform_cpu_die(), rather than the intended path of re-awaking via the standard bringup path. The return path from platform_cpu_die() is supposed to be the last-ditch attempt if all else has failed.

Note that doing that _also_ fixes the kexec problem that Will is struggling with - if we can get that sorted we don't need to pen the CPUs in a reserved area of memory while we kexec from one kernel to the next - they can be kept in the boot loader while the kernel is changed.

#14 lore raw

v5 cover Per SoC descriptor

Quoted 15 lines · Russell King - ARM Linux
Quoted 14 lines · Marc Zyngier
Quoted 1 line · Russell King - ARM Linux

On Mon, Oct 10, 2011 at 03:02:12PM +0100, Marc Zyngier wrote:

[...]

Quoted 8 lines
Quoted 1 line
 65 files changed, 569 insertions(+), 149 deletions(-)

This isn't particularly appealing for something that's supposed to be a clean up - it's introducing 400+ new lines of code. It looks like most of this comes from the platform stuff rather than core stuff.

Can't we do any better with this? We really need things to be going in the other direction.

Quoted 7 lines
Quoted 4 lines

There is definitely room for improvement, by factoring in some common code across platforms. But I see that as a second phase, and started by just moving things to the SoC descriptor, all the code staying mostly the same.

I was meaning without that - what concerns me is the size of increase just to introduce this. It seems needlessly large.

I think the main benefit of this series is that it allows the cross-platform consolidation patches to be smaller, which unfortunately is not easy to measure. The idea is that stuff that is currently hardcoded per platform but should better be run-time determined can be moved into a per-soc structure rather than the per-board machine_desc. It would be good to list all this "stuff" to see how much it will eventually be.

A number of things that we discussed about putting here have since been obsoleted by better suggestions (e.g. arch_ioremap, VMALLOC_END, __io, NR_IRQS, ...), but I would hope the tradeoff to still be positive for this patch series.

On a related topic, I wonder how much of the existing machine_desc we would actually be able to move out into a soc_desc, which is something that would immediately save code lines and object size.

If it ends up being just the SMP and CPU-hotplug functions, then the tradeoff is probably negative and we discard the series, but if we expect it to have a postive long-term effect, I would still merge it right away rather than waiting for the series to become long enough to show the benefits in the diffstat.

Quoted 9 lines

I've also never been convinced by attempts to consolidate the hotplug code - I've said this every time it's been suggested: I believe many platforms just aren't trying to support hotplug CPU properly.

They've just copied the noddy Realview platform version - which is noddy because ARMs platforms tend to have a total lack of power management support on them. The best we can do is put them in a WFI loop waiting to be re-awoken.

Quoted 7 lines

Real platforms surely must have better PM support than that, and so copying the Realview implementation does not make sense - it's good to see that _some_ platforms have made an effort, though they still just return from platform_cpu_die(), rather than the intended path of re-awaking via the standard bringup path. The return path from platform_cpu_die() is supposed to be the last-ditch attempt if all else has failed.

Good point, but I think that is another topic:
Given that a bunch of architectures implement the same silly functions, I think it definitely makes sense to consolidate them, even if we know that they should actually be doing something else. By turning these into function pointers, we can at least force platforms to include a line like

.cpu_disable = generic_silly_cpu_disable,

which hopefully leads people to think about why they are using this version.

Arnd