sh: intc: Add IRQ trigger bit field check

PATCH Applied Magnus Damm 2 participants 2 messages Oct 17, 2011 – Oct 28, 2011 SuperH

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Magnus Damm

author

2011-10-17 08:59 UTC #0 lore raw

PATCH 1/1 sh: intc: Add IRQ trigger bit field check

From: Magnus Damm <[email protected]>

R-Mobile SoCs such as sh73a0 include PINT blocks in INTC that come with 2-bit IRQ trigger support. Add code to make sure the bit width is checked so 4-bit only modes like for instance EDGE_BOTH will fail for PINT.

Signed-off-by Magnus Damm <[email protected]>

---

 drivers/sh/intc/chip.c |    9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

drivers/sh/intc/chip.c +7 -2

@@ -202,11 +202,16 @@ static int intc_set_type(struct irq_data
 	if (!value)
 		return -EINVAL;
 
+	value &= ~SENSE_VALID_FLAG;
+
 	ihp = intc_find_irq(d->sense, d->nr_sense, irq);
 	if (ihp) {
+		/* PINT has 2-bit sense registers, should fail on EDGE_BOTH */
+		if (value >= (1 << _INTC_WIDTH(ihp->handle)))
+			return -EINVAL;
+
 		addr = INTC_REG(d, _INTC_ADDR_E(ihp->handle), 0);
-		intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle,
-						    value & ~SENSE_VALID_FLAG);
+		intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, value);
 	}
 
 	return 0;

Paul Mundt

Applied

2011-10-28 06:13 UTC #1 lore raw

Quoted 8 lines · Magnus Damm

From: Magnus Damm <[email protected]>
R-Mobile SoCs such as sh73a0 include PINT blocks in INTC that come with 2-bit IRQ trigger support. Add code to make sure the bit width is checked so 4-bit only modes like for instance EDGE_BOTH will fail for PINT.
Signed-off-by Magnus Damm <[email protected]>

Applied, thanks.