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ARM: mach-shmobile: sh73a0 and AG5EVM PINT support

PATCH New Magnus Damm 1 participant 1 message Oct 17, 2011

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Arm (32-bit) Arm sub-architectures SuperH Arm/RISC-V/Renesas architecture
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PATCH 1/1 ARM: mach-shmobile: sh73a0 and AG5EVM PINT support

From: Magnus Damm <[email protected]>

Support PINT on sh73a0 and AG5EVM using INTC PINT macros.

With this patch applied the AG5EVM ethernet is handled through one of the chained sh73a0 PINT interrupt controllers.

Signed-off-by Magnus Damm <[email protected]>

---

Depends on "[PATCH] ARM: mach-shmobile: Add support for PINT though macros" and on "[PATCH 00/07] ARM: mach-shmobile: External IRQ pin update"

 arch/arm/mach-shmobile/board-ag5evm.c        |   17 ------
 arch/arm/mach-shmobile/include/mach/sh73a0.h |    4 +
 arch/arm/mach-shmobile/intc-sh73a0.c         |   65 ++++++++++++++++++++++++++
 3 files changed, 71 insertions(+), 15 deletions(-)
arch/arm/mach-shmobile/board-ag5evm.c +2 -15
@@ -58,7 +58,7 @@ static struct resource smsc9220_resource
 		.flags		= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start		= gic_spi(33), /* PINT1 */
+		.start		= SH73A0_PINT0_IRQ(2), /* PINTA2 */
 		.flags		= IORESOURCE_IRQ,
 	},
 };

@@ -465,19 +465,6 @@ static void __init ag5evm_map_io(void)
 	shmobile_setup_console();
 }
 
-#define PINTC_ADDR	0xe6900000
-#define PINTER0A	(PINTC_ADDR + 0xa0)
-#define PINTCR0A	(PINTC_ADDR + 0xb0)
-
-void __init ag5evm_init_irq(void)
-{
-	sh73a0_init_irq();
-
-	/* setup PINT: enable PINTA2 as active low */
-	__raw_writel(__raw_readl(PINTER0A) | (1<<29), PINTER0A);
-	__raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
-}
-
 #define DSI0PHYCR	0xe615006c
 
 static void __init ag5evm_init(void)

@@ -611,7 +598,7 @@ struct sys_timer ag5evm_timer = {
 
 MACHINE_START(AG5EVM, "ag5evm")
 	.map_io		= ag5evm_map_io,
-	.init_irq	= ag5evm_init_irq,
+	.init_irq	= sh73a0_init_irq,
 	.handle_irq	= shmobile_handle_irq_gic,
 	.init_machine	= ag5evm_init,
 	.timer		= &ag5evm_timer,
arch/arm/mach-shmobile/include/mach/sh73a0.h +4 -0
@@ -507,4 +507,8 @@ enum {
 	SHDMA_SLAVE_MMCIF_RX,
 };
 
+/* PINT interrupts are located at Linux IRQ 768 and up */
+#define SH73A0_PINT0_IRQ(irq) ((irq) + 768)
+#define SH73A0_PINT1_IRQ(irq) ((irq) + 800)
+
 #endif /* __ASM_SH73A0_H__ */
arch/arm/mach-shmobile/intc-sh73a0.c +65 -0

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