Remove inline arch_reset definitions from system.h

index 832888d..6838bd4 100644
@@ -108,6 +108,7 @@ extern int cpu_architecture(void);
 extern void cpu_init(void);
 
 void arm_machine_restart(char mode, const char *cmd);
+extern void (*arm_arch_reset)(char mode, const char *cmd);
 extern void (*arm_pm_restart)(char str, const char *cmd);
 
 #define UDBG_UNDEFINED	(1 << 0)

index 1a347f4..13e68c5 100644
@@ -117,7 +117,8 @@ void arm_machine_restart(char mode, const char *cmd)
 	/*
 	 * Now call the architecture specific reboot code.
 	 */
-	arch_reset(mode, cmd);
+	if (arm_arch_reset)
+		arm_arch_reset(mode, cmd);
 
 	/*
 	 * Whoops - the architecture was unable to reboot.

@@ -128,6 +129,11 @@ void arm_machine_restart(char mode, const char *cmd)
 	while (1);
 }
 
+static void temporary_arm_arch_reset(char mode, const char *cmd)
+{
+	arch_reset(mode, cmd);
+}
+
 /*
  * Function pointers to optional machine specific functions
  */

@@ -137,6 +143,9 @@ EXPORT_SYMBOL(pm_power_off);
 void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart;
 EXPORT_SYMBOL_GPL(arm_pm_restart);
 
+void (*arm_arch_reset)(char mode, const char *cmd) = temporary_arm_arch_reset;
+EXPORT_SYMBOL_GPL(arm_arch_reset);
+
 static void do_nothing(void *unused)
 {
 }

index 984014b..62a3c3d 100644
@@ -100,7 +100,7 @@ extern void __show_regs(struct pt_regs *);
 extern int __pure cpu_architecture(void);
 extern void cpu_init(void);
 
-void arm_machine_restart(char mode, const char *cmd);
+void setup_restart(char mode);
 extern void (*arm_pm_restart)(char str, const char *cmd);
 
 #define UDBG_UNDEFINED	(1 << 0)

index fd08140..ba91ec4 100644
@@ -92,7 +92,7 @@ static int __init hlt_setup(char *__unused)
 __setup("nohlt", nohlt_setup);
 __setup("hlt", hlt_setup);
 
-void arm_machine_restart(char mode, const char *cmd)
+void setup_restart(char mode)
 {
 	/* Disable interrupts first */
 	local_irq_disable();

@@ -113,19 +113,15 @@ void arm_machine_restart(char mode, const char *cmd)
 
 	/* Push out any further dirty data, and ensure cache is empty */
 	flush_cache_all();
+}
+EXPORT_SYMBOL_GPL(setup_restart);
 
-	/*
-	 * Now call the architecture specific reboot code.
-	 */
-	arch_reset(mode, cmd);
+static void default_restart(char mode, const char *cmd)
+{
+	setup_restart(mode);
 
-	/*
-	 * Whoops - the architecture was unable to reboot.
-	 * Tell the user!
-	 */
-	mdelay(1000);
-	printk("Reboot failed -- System halted\n");
-	while (1);
+	/* Now call the architecture specific reboot code. */
+	arch_reset(mode, cmd);
 }
 
 /*

@@ -134,7 +130,7 @@ void arm_machine_restart(char mode, const char *cmd)
 void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
 
-void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart;
+void (*arm_pm_restart)(char mode, const char *cmd) = default_restart;
 EXPORT_SYMBOL_GPL(arm_pm_restart);
 
 static void do_nothing(void *unused)

@@ -250,7 +246,15 @@ void machine_power_off(void)
 void machine_restart(char *cmd)
 {
 	machine_shutdown();
+
 	arm_pm_restart(reboot_mode, cmd);
+
+	/* Give a grace period for failure to restart of 1s */
+	mdelay(1000);
+
+	/* Whoops - the platform was unable to reboot. Tell the user! */
+	printk("Reboot failed -- System halted\n");
+	while (1);
 }
 
 void __show_regs(struct pt_regs *regs)

index bfc6844..d16da6a 100644
@@ -16,6 +16,7 @@
 #include <linux/pm.h>
 
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 

@@ -311,7 +312,7 @@ static struct at91_gpio_bank at91cap9_gpio[] = {
 	}
 };
 
-static void at91cap9_reset(void)
+static void at91cap9_reset(char mode, const char *cmd)
 {
 	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }

@@ -333,7 +334,7 @@ static void __init at91cap9_map_io(void)
 
 static void __init at91cap9_initialize(void)
 {
-	at91_arch_reset = at91cap9_reset;
+	arm_arch_reset = at91cap9_reset;
 	pm_power_off = at91cap9_poweroff;
 	at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
 

index f73302d..4497e81 100644
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/at91rm9200.h>

@@ -286,7 +287,7 @@ static struct at91_gpio_bank at91rm9200_gpio[] = {
 	}
 };
 
-static void at91rm9200_reset(void)
+static void at91rm9200_reset(char mode, const char *cmd)
 {
 	/*
 	 * Perform a hardware reset with the use of the Watchdog timer.

@@ -307,7 +308,7 @@ static void __init at91rm9200_map_io(void)
 
 static void __init at91rm9200_initialize(void)
 {
-	at91_arch_reset = at91rm9200_reset;
+	arm_arch_reset = at91rm9200_reset;
 	at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
 			| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
 			| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)

index cb397be..2f5e4c1 100644
@@ -14,6 +14,7 @@
 #include <linux/pm.h>
 
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/cpu.h>

@@ -317,7 +318,7 @@ static void __init at91sam9260_map_io(void)
 
 static void __init at91sam9260_initialize(void)
 {
-	at91_arch_reset = at91sam9_alt_reset;
+	arm_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9260_poweroff;
 	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
 			| (1 << AT91SAM9260_ID_IRQ2);

index 6c8e3b5..b7b0625 100644
@@ -14,6 +14,7 @@
 #include <linux/pm.h>
 
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/cpu.h>

@@ -286,7 +287,7 @@ static void __init at91sam9261_map_io(void)
 
 static void __init at91sam9261_initialize(void)
 {
-	at91_arch_reset = at91sam9_alt_reset;
+	arm_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9261_poweroff;
 	at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
 			| (1 << AT91SAM9261_ID_IRQ2);

index 044f3c9..42b7380 100644
@@ -14,6 +14,7 @@
 #include <linux/pm.h>
 
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/at91sam9263.h>

@@ -303,7 +304,7 @@ static void __init at91sam9263_map_io(void)
 
 static void __init at91sam9263_initialize(void)
 {
-	at91_arch_reset = at91sam9_alt_reset;
+	arm_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9263_poweroff;
 	at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 

index e04c5fb..d13929c 100644
@@ -14,6 +14,7 @@
 #include <linux/pm.h>
 
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/at91sam9g45.h>

@@ -301,7 +302,7 @@ static struct at91_gpio_bank at91sam9g45_gpio[] = {
 	}
 };
 
-static void at91sam9g45_reset(void)
+static void at91sam9g45_reset(char mode, const char *cmd)
 {
 	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }

@@ -323,7 +324,7 @@ static void __init at91sam9g45_map_io(void)
 
 static void __init at91sam9g45_initialize(void)
 {
-	at91_arch_reset = at91sam9g45_reset;
+	arm_arch_reset = at91sam9g45_reset;
 	pm_power_off = at91sam9g45_poweroff;
 	at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 

index a238105..f556331 100644
@@ -13,6 +13,7 @@
 #include <linux/pm.h>
 
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/cpu.h>

@@ -292,7 +293,7 @@ static void __init at91sam9rl_map_io(void)
 
 static void __init at91sam9rl_initialize(void)
 {
-	at91_arch_reset = at91sam9_alt_reset;
+	arm_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9rl_poweroff;
 	at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 

index 938b34f..c15c9bb 100644
@@ -57,7 +57,7 @@ extern void at91_irq_suspend(void);
 extern void at91_irq_resume(void);
 
 /* reset */
-extern void at91sam9_alt_reset(void);
+extern void at91sam9_alt_reset(char mode, const char *cmd);
 
  /* GPIO */
 #define AT91RM9200_PQFP		3	/* AT91RM9200 PQFP package has 3 banks */

@@ -71,5 +71,4 @@ struct at91_gpio_bank {
 extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
 extern void __init at91_gpio_irq_setup(void);
 
-extern void (*at91_arch_reset)(void);
 extern int at91_extern_irq;

index 36af14b..079eb12 100644
@@ -47,13 +47,8 @@ static inline void arch_idle(void)
 #endif
 }
 
-void (*at91_arch_reset)(void);
-
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/* call the CPU-specific reset function */
-	if (at91_arch_reset)
-		(at91_arch_reset)();
 }
 
 #endif

index a604b9e..4b90876 100644
@@ -49,7 +49,7 @@ HW_DECLARE_SPINLOCK(gpio)
 #endif
 
 /* sysctl */
-int bcmring_arch_warm_reboot;	/* do a warm reboot on hard reset */
+static int bcmring_arch_warm_reboot;	/* do a warm reboot on hard reset */
 
 static struct ctl_table_header *bcmring_sysctl_header;
 

@@ -105,6 +105,29 @@ static struct platform_device *devices[] __initdata = {
 	&pmu_device,
 };
 
+static void bcmring_arch_reset(char mode, const char *cmd)
+{
+	printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
+
+	if (mode == 'h') {
+		/* Reboot configured in proc entry */
+		if (bcmring_arch_warm_reboot) {
+			printk("warm reset\n");
+			/* Issue Warm reset (do not reset ethernet switch, keep alive) */
+			chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
+		} else {
+			/* Force reset of everything */
+			printk("force reset\n");
+			chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
+		}
+	} else {
+		/* Force reset of everything */
+		printk("force reset\n");
+		chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
+	}
+}
+
+
 /****************************************************************************
 *
 *   Called from the customize_machine function in arch/arm/kernel/setup.c

@@ -116,7 +139,7 @@ static struct platform_device *devices[] __initdata = {
 *****************************************************************************/
 static void __init bcmring_init_machine(void)
 {
-
+	arm_arch_reset = bcmring_arch_reset;
 	bcmring_sysctl_header = register_sysctl_table(bcmring_sysctl_reboot);
 
 	/* Enable spread spectrum */

index 38b3706..6cd872d 100644
@@ -22,8 +22,6 @@
 
 #include <mach/csp/chipcHw_inline.h>
 
-extern int bcmring_arch_warm_reboot;
-
 static inline void arch_idle(void)
 {
 	cpu_do_idle();

@@ -31,24 +29,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
-
-	if (mode == 'h') {
-		/* Reboot configured in proc entry */
-		if (bcmring_arch_warm_reboot) {
-			printk("warm reset\n");
-			/* Issue Warm reset (do not reset ethernet switch, keep alive) */
-			chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
-		} else {
-			/* Force reset of everything */
-			printk("force reset\n");
-			chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-		}
-	} else {
-		/* Force reset of everything */
-		printk("force reset\n");
-		chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-	}
 }
 
 #endif

index f916cd7..9982deb 100644
@@ -34,7 +34,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	cpu_reset(0);
 }
 
 #endif

new file mode 100644
index 0000000..030d758
@@ -0,0 +1,23 @@
+/*
+ * arch/arm/mach-clps711x/system.c
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
+
+#include <asm/system.h>
+#include <asm/hardware/clps7111.h>
+
+static void clps711x_arch_reset(char mode, const char *cmd)
+{
+	cpu_reset(0);
+}
+
+static int __init clps711x_arch_reset_init(void)
+{
+	arm_arch_reset = clps711x_arch_reset;
+	return 0;
+}
+
+arch_initcall(clps711x_arch_reset_init);

index 3e7d149..e19bda7 100644
@@ -167,6 +167,8 @@ static struct platform_device *cns3420_pdevs[] __initdata = {
 	&cns3xxx_usb_ohci_device,
 };
 
+extern void cns3xxx_arch_reset(char mode, const char *cmd);
+
 static void __init cns3420_init(void)
 {
 	cns3xxx_l2x0_init();

@@ -176,6 +178,7 @@ static void __init cns3420_init(void)
 	cns3xxx_ahci_init();
 	cns3xxx_sdhci_init();
 
+	arm_arch_reset = cns3xxx_arch_reset;
 	pm_power_off = cns3xxx_power_off;
 }
 

index 4f16c9b..092d774 100644
@@ -23,6 +23,8 @@ static inline void arch_idle(void)
 	cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
+static inline void arch_reset(char mode, const char *cmd)
+{
+}
 
 #endif

index 0c04678..a3e01f9 100644
@@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block)
 }
 EXPORT_SYMBOL(cns3xxx_pwr_soft_rst);
 
-void arch_reset(char mode, const char *cmd)
+void cns3xxx_arch_reset(char mode, const char *cmd)
 {
 	/*
 	 * To reset, we hit the on-board reset register

index 1d25573..b0b1560 100644
@@ -71,6 +71,12 @@ static int __init davinci_init_id(struct davinci_soc_info *soc_info)
 	return -EINVAL;
 }
 
+static void davinci_arch_reset(char mode, const char *cmd)
+{
+	if (davinci_soc_info.reset)
+		davinci_soc_info.reset(davinci_soc_info.reset_device);
+}
+
 void __init davinci_common_init(struct davinci_soc_info *soc_info)
 {
 	int ret;

@@ -97,6 +103,8 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
 	if (!davinci_soc_info.reset)
 		davinci_soc_info.reset = davinci_watchdog_reset;
 
+	arm_arch_reset = davinci_arch_reset;
+
 	/*
 	 * We want to check CPU revision early for cpu_is_xxxx() macros.
 	 * IO space mapping must be initialized before we can do that.

index e65629c..6bd1dc0 100644
@@ -20,8 +20,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	if (davinci_soc_info.reset)
-		davinci_soc_info.reset(davinci_soc_info.reset_device);
 }
 
 #endif /* __ASM_ARCH_SYSTEM_H */

index a9e0dae..975f6f1 100644
@@ -273,6 +273,22 @@ void __init dove_sdio1_init(void)
 	platform_device_register(&dove_sdio1);
 }
 
+static void dove_arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * Enable soft reset to assert RSTOUTn.
+	 */
+	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+	/*
+	 * Assert soft reset.
+	 */
+	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+	while (1)
+		;
+}
+
 void __init dove_init(void)
 {
 	int tclk;

@@ -282,6 +298,8 @@ void __init dove_init(void)
 	printk(KERN_INFO "Dove 88AP510 SoC, ");
 	printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
 
+	arm_arch_reset = dove_arch_reset;
+
 #ifdef CONFIG_CACHE_TAUROS2
 	tauros2_init();
 #endif

index 356afda..ce3e749 100644
@@ -18,19 +18,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/*
-	 * Enable soft reset to assert RSTOUTn.
-	 */
-	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-	/*
-	 * Assert soft reset.
-	 */
-	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-	while (1)
-		;
 }
 
-
 #endif

index 087bc77..c4d243f 100644
@@ -271,8 +271,14 @@ static struct platform_device *ebsa110_devices[] = {
 	&am79c961_device,
 };
 
+static void ebsa110_arch_reset(char mode, const char *cmd)
+{
+	cpu_reset(0x80000000);
+}
+
 static int __init ebsa110_init(void)
 {
+	arm_arch_reset = ebsa110_arch_reset;
 	return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
 }
 

index 9a26245..574e633 100644
@@ -34,6 +34,8 @@ static inline void arch_idle(void)
 	asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
 }
 
-#define arch_reset(mode, cmd)	cpu_reset(0x80000000)
+static inline void arch_reset(char mode, const char *cmd)
+{
+}
 
 #endif

index c60f081..5841c1d 100644
@@ -904,3 +904,25 @@ void __init ep93xx_init_devices(void)
 	platform_device_register(&ep93xx_ohci_device);
 	platform_device_register(&ep93xx_leds);
 }
+
+static void ep93xx_arch_reset(char mode, const char *cmd)
+{
+	local_irq_disable();
+
+	/*
+	 * Set then clear the SWRST bit to initiate a software reset
+	 */
+	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
+	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
+
+	while (1)
+		;
+}
+
+static int __init ep93xx_arch_reset_init(void)
+{
+	arm_arch_reset = ep93xx_arch_reset;
+	return 0;
+}
+
+arch_initcall(ep93xx_arch_reset_init);

index 6d661fe..ce48083 100644
@@ -11,14 +11,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	local_irq_disable();
-
-	/*
-	 * Set then clear the SWRST bit to initiate a software reset
-	 */
-	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
-	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
-
-	while (1)
-		;
 }

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index 4d9c1f8..7df8e48 100644
@@ -30,8 +30,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	__raw_writel(RESET_GLOBAL | RESET_CPU1,
-		     IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_RESET);
 }
 
 #endif /* __MACH_SYSTEM_H */

new file mode 100644
index 0000000..f1bba7f
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-gemini/system.c
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
+#include <mach/global_reg.h>
+#include <asm/system.h>
+
+static void gemini_arch_reset(char mode, const char *cmd)
+{
+	__raw_writel(RESET_GLOBAL | RESET_CPU1,
+		     IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_RESET);
+}
+
+static int __init gemini_arch_reset_init(void)
+{
+	arm_arch_reset = gemini_arch_reset;
+	return 0;
+}
+arch_initcall(gemini_arch_reset_init);

index 51d4e44..1ad66f2 100644
@@ -242,3 +242,15 @@ void __init h720x_map_io(void)
 {
 	iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc));
 }
+
+static void h720x_arch_reset(char mode, const char *cmd)
+{
+	CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
+}
+
+static int __init h720x_arch_reset_init(void)
+{
+	arm_arch_reset = h720x_arch_reset;
+	return 0;
+}
+arch_initcall(h720x_arch_reset_init);

index a708d24..4c2fba9 100644
@@ -27,7 +27,6 @@ static void arch_idle(void)
 
 static __inline__ void arch_reset(char mode, const char *cmd)
 {
-	CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
 }
 
 #endif

index 77315b9..86f09cb 100644
@@ -149,6 +149,15 @@ void __init integrator_init_early(void)
 	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 }
 
+static void integrator_arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * To reset, we hit the on-board reset register
+	 * in the system FPGA
+	 */
+	cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
+}
+
 static int __init integrator_init(void)
 {
 	int i;

@@ -158,6 +167,8 @@ static int __init integrator_init(void)
 		amba_device_register(d, &iomem_resource);
 	}
 
+	arm_arch_reset = integrator_arch_reset;
+
 	return 0;
 }
 

index e1551b8..6e5adbf 100644
@@ -34,11 +34,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/*
-	 * To reset, we hit the on-board reset register
-	 * in the system FPGA
-	 */
-	cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
 }
 
 #endif

index d0c66ef..6b9bba7 100644
@@ -15,13 +15,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/*
-	 * Reset the internal bus (warning both cores are reset)
-	 */
-	write_wdtcr(IOP_WDTCR_EN_ARM);
-	write_wdtcr(IOP_WDTCR_EN);
-	write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
-	write_wdtcr(0x1000);
-
-	for(;;);
 }

index a5b9897..58388da 100644
@@ -367,6 +367,19 @@ void __init iop13xx_map_io(void)
 	iotable_init(iop13xx_std_desc, ARRAY_SIZE(iop13xx_std_desc));
 }
 
+static void iop13xx_arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * Reset the internal bus (warning both cores are reset)
+	 */
+	write_wdtcr(IOP_WDTCR_EN_ARM);
+	write_wdtcr(IOP_WDTCR_EN);
+	write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
+	write_wdtcr(0x1000);
+
+	for(;;);
+}
+
 static int init_uart;
 static int init_i2c;
 static int init_adma;

@@ -517,6 +530,7 @@ void __init iop13xx_platform_init(void)
 #endif
 
 	platform_add_devices(iop13xx_devices, plat_idx);
+	arm_arch_reset = iop13xx_arch_reset;
 }
 
 static int __init iop13xx_init_uart_setup(char *str)

index a4b808f..094714d 100644
@@ -18,17 +18,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	local_irq_disable();
-
-	if (machine_is_n2100()) {
-		gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
-		gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
-		while (1)
-			;
-	}
-
-	*IOP3XX_PCSR = 0x30;
-
-	/* Jump into ROM at address 0 */
-	cpu_reset(0);
 }

new file mode 100644
index 0000000..3df8dfe
@@ -0,0 +1,33 @@
+/*
+ * arch/arm/mach-iop32x/reset.c
+ */
+#include <linux/init.h>
+#include <asm/mach-types.h>
+#include <asm/proc-fns.h>
+#include <asm/system.h>
+#include <asm/hardware/iop3xx.h>
+#include <mach/n2100.h>
+
+static void iop32x_arch_reset(char mode, const char *cmd)
+{
+	local_irq_disable();
+
+	if (machine_is_n2100()) {
+		gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
+		gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
+		while (1)
+			;
+	}
+
+	*IOP3XX_PCSR = 0x30;
+
+	/* Jump into ROM at address 0 */
+	cpu_reset(0);
+}
+
+static int __init iop32x_arch_reset_init(void)
+{
+	arm_arch_reset = iop32x_arch_reset;
+	return 0;
+}
+arch_initcall(iop32x_arch_reset_init);

index f192a34..df98c56 100644
@@ -16,8 +16,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	*IOP3XX_PCSR = 0x30;
-
-	/* Jump into ROM at address 0 */
-	cpu_reset(0);
 }

new file mode 100644
index 0000000..9d71166
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-iop33x/reset.c
+ */
+
+#include <linux/init.h>
+#include <asm/proc-fns.h>
+#include <asm/system.h>
+#include <asm/hardware/iop3xx.h>
+
+static void iop33x_arch_reset(char mode, const char *cmd)
+{
+	*IOP3XX_PCSR = 0x30;
+
+	/* Jump into ROM at address 0 */
+	cpu_reset(0);
+}
+
+static int __init iop33x_arch_reset_init(void)
+{
+	arm_arch_reset = iop33x_arch_reset;
+	return 0;
+}
+
+arch_initcall(iop33x_arch_reset_init);

index 036edc0e..e2a24a0 100644
@@ -296,7 +296,7 @@ static void __init voiceblue_init(void)
 	omap_writeb(0x00, OMAP_LPG1_LCR);
 	omap_writeb(0x00, OMAP_LPG1_PMR);	/* Disable clock */
 
-	arch_reset = voiceblue_reset;
+	arm_arch_reset = voiceblue_reset;
 }
 
 MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")

index 870886a..d3b54da 100644
@@ -15,8 +15,10 @@
 
 #include <asm/tlb.h>
 #include <asm/mach/map.h>
+#include <asm/system.h>
 #include <plat/mux.h>
 #include <plat/tc.h>
+#include <plat/system.h>
 
 #include "clock.h"
 

@@ -140,6 +142,8 @@ void __init omap1_init_common_hw(void)
 	omap1_clk_init();
 
 	omap1_mux_init();
+
+	arm_arch_reset = omap1_arch_reset;
 }
 
 /*

index ad951ee..a5ed979 100644
@@ -21,5 +21,3 @@ void omap1_arch_reset(char mode, const char *cmd)
 
 	omap_writew(1, ARM_RSTCT1);
 }
-
-void (*arch_reset)(char, const char *) = omap1_arch_reset;

index 2ce1ce6..b94e1a2 100644
@@ -31,6 +31,7 @@
 #include <plat/sram.h>
 #include <plat/sdrc.h>
 #include <plat/serial.h>
+#include <plat/system.h>
 
 #include "clock2xxx.h"
 #include "clock3xxx.h"

@@ -44,6 +45,8 @@
 #include <plat/omap_hwmod.h>
 #include <plat/multi.h>
 
+#include "prcm-common.h"
+
 /*
  * The machine specific code may provide the extra mapping besides the
  * default mapping provided here.

@@ -358,7 +361,9 @@ void __init omap2_init_common_infrastructure(void)
 		omap44xx_hwmod_init();
 	} else {
 		pr_err("Could not init hwmod data - unknown SoC\n");
-        }
+	}
+
+	arm_arch_reset = omap_prcm_arch_reset;
 
 	/* Set the default postsetup state for all hwmods */
 #ifdef CONFIG_PM_RUNTIME

index 2e40a5c..ad3ac5c 100644
@@ -58,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void)
 EXPORT_SYMBOL(omap_prcm_get_reset_sources);
 
 /* Resets clock rates and reboots the system. Only called from system.h */
-static void omap_prcm_arch_reset(char mode, const char *cmd)
+void omap_prcm_arch_reset(char mode, const char *cmd)
 {
 	s16 prcm_offs = 0;
 

@@ -109,8 +109,6 @@ static void omap_prcm_arch_reset(char mode, const char *cmd)
 	omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
 }
 
-void (*arch_reset)(char, const char *) = omap_prcm_arch_reset;
-
 /**
  * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
  * @reg: physical address of module IDLEST register

index c5fa9e9..ac32d88 100644
@@ -12,6 +12,10 @@ static inline void arch_idle(void)
 	cpu_do_idle();
 }
 
-extern void (*arch_reset)(char, const char *);
+/* To be removed in a future ARM-wide cleanup */
+static inline void arch_reset(char mode, const char *cmd) {}
+
+extern void omap1_arch_reset(char mode, const char *cmd);
+extern void omap_prcm_arch_reset(char mode, const char *cmd);
 
 #endif

index 4068166..59e987f 100644
@@ -28,6 +28,7 @@
 
 #include <asm/types.h>
 #include <asm/setup.h>
+#include <asm/mach-types.h>
 #include <asm/memory.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>

@@ -514,3 +515,40 @@ void __init ixp2000_init_irq(void)
 	}
 }
 
+static void ixp2000_arch_reset(char mode, const char *cmd)
+{
+	local_irq_disable();
+
+	/*
+	 * Reset flash banking register so that we are pointing at
+	 * RedBoot bank.
+	 */
+	if (machine_is_ixdp2401()) {
+		ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+					((0 >> IXDP2X01_FLASH_WINDOW_BITS)
+						| IXDP2X01_CPLD_FLASH_INTERN));
+		ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
+	}
+
+	/*
+	 * On IXDP2801 we need to write this magic sequence to the CPLD
+	 * to cause a complete reset of the CPU and all external devices
+	 * and move the flash bank register back to 0.
+	 */
+	if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
+		unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
+
+		reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
+		ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
+		ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
+	}
+
+	ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
+}
+
+static int __init ixp2000_arch_reset_init(void)
+{
+	arm_arch_reset = ixp2000_arch_reset;
+	return 0;
+}
+arch_initcall(ixp2000_arch_reset_init);

index de37099..d79c7ad 100644
@@ -9,9 +9,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
 	cpu_do_idle();

@@ -19,31 +16,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	local_irq_disable();
-
-	/*
-	 * Reset flash banking register so that we are pointing at
-	 * RedBoot bank.
-	 */
-	if (machine_is_ixdp2401()) {
-		ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
-					((0 >> IXDP2X01_FLASH_WINDOW_BITS)
-						| IXDP2X01_CPLD_FLASH_INTERN));
-		ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
-	}
-
-	/*
-	 * On IXDP2801 we need to write this magic sequence to the CPLD
-	 * to cause a complete reset of the CPU and all external devices
-	 * and move the flash bank register back to 0.
-	 */
-	if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
-		unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
-
-		reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
-		ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
-		ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
-	}
-
-	ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
 }

index a1bee33..e72c089 100644
@@ -32,6 +32,7 @@
 #include <asm/types.h>
 #include <asm/setup.h>
 #include <asm/memory.h>
+#include <asm/mach-types.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/system.h>

@@ -439,8 +440,22 @@ static struct platform_device *ixp23xx_devices[] __initdata = {
 	&ixp23xx_uart,
 };
 
+static void ixp23xx_arch_reset(char mode, const char *cmd)
+{
+	/* First try machine specific support */
+	if (machine_is_ixdp2351()) {
+		*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
+		(void) *IXDP2351_CPLD_RESET1_REG;
+		*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
+	}
+
+	/* Use on-chip reset capability */
+	*IXP23XX_RESET0 |= IXP23XX_RST_ALL;
+}
+
 void __init ixp23xx_sys_init(void)
 {
 	*IXP23XX_EXP_UNIT_FUSE |= 0xf;
 	platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
+	arm_arch_reset = ixp23xx_arch_reset;
 }

index 8920ff2..4569003 100644
@@ -8,9 +8,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
 #if 0

@@ -21,13 +18,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/* First try machine specific support */
-	if (machine_is_ixdp2351()) {
-		*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
-		(void) *IXDP2351_CPLD_RESET1_REG;
-		*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
-	}
-
-	/* Use on-chip reset capability */
-	*IXP23XX_RESET0 |= IXP23XX_RST_ALL;
 }

index 0777257..9e38334 100644
@@ -375,6 +375,26 @@ static struct platform_device *ixp46x_devices[] __initdata = {
 unsigned long ixp4xx_exp_bus_size;
 EXPORT_SYMBOL(ixp4xx_exp_bus_size);
 
+static void ixp4xx_arch_reset(char mode, const char *cmd)
+{
+	if ( 1 && mode == 's') {
+		/* Jump into ROM at address 0 */
+		cpu_reset(0);
+	} else {
+		/* Use on-chip reset capability */
+
+		/* set the "key" register to enable access to
+		 * "timer" and "enable" registers
+		 */
+		*IXP4XX_OSWK = IXP4XX_WDT_KEY;
+
+		/* write 0 to the timer register for an immediate reset */
+		*IXP4XX_OSWT = 0;
+
+		*IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
+	}
+}
+
 void __init ixp4xx_sys_init(void)
 {
 	ixp4xx_exp_bus_size = SZ_16M;

@@ -397,6 +417,8 @@ void __init ixp4xx_sys_init(void)
 
 	printk("IXP4xx: Using %luMiB expansion bus window size\n",
 			ixp4xx_exp_bus_size >> 20);
+
+	arm_arch_reset = ixp4xx_arch_reset;
 }
 
 /*

index 54c0af7..ed5964c 100644
@@ -9,8 +9,6 @@
  *
  */
 
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
 	/* ixp4xx does not implement the XScale PWRMODE register,

@@ -24,21 +22,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	if ( 1 && mode == 's') {
-		/* Jump into ROM at address 0 */
-		cpu_reset(0);
-	} else {
-		/* Use on-chip reset capability */
-
-		/* set the "key" register to enable access to
-		 * "timer" and "enable" registers
-		 */
-		*IXP4XX_OSWK = IXP4XX_WDT_KEY;
-
-		/* write 0 to the timer register for an immediate reset */
-		*IXP4XX_OSWT = 0;
-
-		*IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
-	}
 }
-

index f3248cf..5fcfbde 100644
@@ -448,6 +448,22 @@ static void __init kirkwood_l2_init(void)
 #endif
 }
 
+static void kirkwood_arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * Enable soft reset to assert RSTOUTn.
+	 */
+	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+	/*
+	 * Assert soft reset.
+	 */
+	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+	while (1)
+		;
+}
+
 void __init kirkwood_init(void)
 {
 	printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",

@@ -478,6 +494,7 @@ void __init kirkwood_init(void)
 #ifdef CONFIG_KEXEC 
 	kexec_reinit = kirkwood_enable_pcie;
 #endif
+	arm_arch_reset = kirkwood_arch_reset;
 }
 
 static int __init kirkwood_clock_gate(void)

index 7568e95..f094431 100644
@@ -9,8 +9,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
 	cpu_do_idle();

@@ -18,18 +16,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/*
-	 * Enable soft reset to assert RSTOUTn.
-	 */
-	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-	/*
-	 * Assert soft reset.
-	 */
-	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-	while (1)
-		;
 }
 
 

index fb1dda9..b73ee70 100644
@@ -14,9 +14,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/regs-timer.h>
-
 static void arch_idle(void)
 {
 	/*

@@ -27,22 +24,8 @@ static void arch_idle(void)
 
 }
 
-static void arch_reset(char mode, const char *cmd)
+static inline void arch_reset(char mode, const char *cmd)
 {
-	unsigned int reg;
-
-	if (mode == 's')
-		cpu_reset(0);
-
-	/* disable timer0 */
-	reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
-	__raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
-
-	/* enable watchdog mode */
-	__raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
-
-	/* re-enable timer0 */
-	__raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
 }
 
 #endif

new file mode 100644
index 0000000..911eb95
@@ -0,0 +1,33 @@
+/*
+ * arch/arm/mach-ks8695/reset.c
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/proc-fns.h>
+#include <mach/regs-timer.h>
+
+static void ks8695_arch_reset(char mode, const char *cmd)
+{
+	unsigned int reg;
+
+	if (mode == 's')
+		cpu_reset(0);
+
+	/* disable timer0 */
+	reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
+	__raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+
+	/* enable watchdog mode */
+	__raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
+
+	/* re-enable timer0 */
+	__raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+}
+
+static int __init ks8695_arch_reset_init(void)
+{
+	arm_arch_reset = ks8695_arch_reset;
+	return 0;
+}
+arch_initcall(ks8695_arch_reset_init);

index 205b2db..200bd51 100644
@@ -311,3 +311,33 @@ void __init lpc32xx_map_io(void)
 {
 	iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
 }
+
+static void lpc32xx_arch_reset(char mode, const char *cmd)
+{
+	switch (mode) {
+	case 's':
+	case 'h':
+		printk(KERN_CRIT "RESET: Rebooting system\n");
+
+		/* Disable interrupts */
+		local_irq_disable();
+
+		lpc32xx_watchdog_reset();
+		break;
+
+	default:
+		/* Do nothing */
+		break;
+	}
+
+	/* Wait for watchdog to reset system */
+	while (1)
+		;
+}
+
+static int __init lpc32xx_arch_reset_init(void)
+{
+	arm_arch_reset = lpc32xx_arch_reset;
+	return 0;
+}
+arch_initcall(lpc32xx_arch_reset_init);

index df3b0de..9c6cc0c 100644
@@ -26,27 +26,6 @@ static void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	extern void lpc32xx_watchdog_reset(void);
-
-	switch (mode) {
-	case 's':
-	case 'h':
-		printk(KERN_CRIT "RESET: Rebooting system\n");
-
-		/* Disable interrupts */
-		local_irq_disable();
-
-		lpc32xx_watchdog_reset();
-		break;
-
-	default:
-		/* Do nothing */
-		break;
-	}
-
-	/* Wait for watchdog to reset system */
-	while (1)
-		;
 }
 
 #endif

index 0ec0ca8..1d3df64 100644
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 
 #include <asm/page.h>
+#include <asm/proc-fns.h>
 #include <asm/mach/map.h>
 #include <mach/addr-map.h>
 #include <mach/cputype.h>

@@ -45,3 +46,18 @@ void __init mmp_map_io(void)
 	/* this is early, initialize mmp_chip_id here */
 	mmp_chip_id = __raw_readl(MMP_CHIPID);
 }
+
+static void mmp_arch_reset(char mode, const char *cmd)
+{
+	if (cpu_is_pxa168())
+		cpu_reset(0xffff0000);
+	else
+		cpu_reset(0);
+}
+
+static int __init mmp_arch_reset_init(void)
+{
+	arm_arch_reset = mmp_arch_reset;
+	return 0;
+}
+arch_initcall(mmp_arch_reset_init);

index 1a8a25e..b09c19a 100644
@@ -18,9 +18,5 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	if (cpu_is_pxa168())
-		cpu_reset(0xffff0000);
-	else
-		cpu_reset(0);
 }
 #endif /* __ASM_MACH_SYSTEM_H */

index 23d3980..c3d5dd4 100644
@@ -375,6 +375,22 @@ static int __init is_l2_writethrough(void)
 	return !!(readl(CPU_CONTROL) & L2_WRITETHROUGH);
 }
 
+static void mv78xx0_arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * Enable soft reset to assert RSTOUTn.
+	 */
+	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+	/*
+	 * Assert soft reset.
+	 */
+	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+	while (1)
+		;
+}
+
 void __init mv78xx0_init(void)
 {
 	int core_index;

@@ -400,4 +416,5 @@ void __init mv78xx0_init(void)
 #ifdef CONFIG_CACHE_FEROCEON_L2
 	feroceon_l2_init(is_l2_writethrough());
 #endif
+	arm_arch_reset = mv78xx0_arch_reset;
 }

index 66e7ce4..1a41dc5 100644
@@ -18,18 +18,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/*
-	 * Enable soft reset to assert RSTOUTn.
-	 */
-	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-	/*
-	 * Assert soft reset.
-	 */
-	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-	while (1)
-		;
 }
 
 

index d2e83f4..ab6590b 100644
@@ -19,10 +19,4 @@ void arch_idle(void);
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	for (;;) ;  /* depends on IPC w/ other core */
 }
-
-/* low level hardware reset hook -- for example, hitting the
- * PSHOLD line on the PMIC to hard reset the system
- */
-extern void (*msm_hw_reset_hook)(void);

index 657be73..4f0e919 100644
@@ -1029,8 +1029,14 @@ static struct platform_driver msm_smd_driver = {
 	},
 };
 
+static void msm_arch_reset(char mode, const char *cmd)
+{
+	for (;;) ;  /* depends on IPC w/ other core */
+}
+
 static int __init msm_smd_init(void)
 {
+	arm_arch_reset = msm_arch_reset;
 	return platform_driver_register(&msm_smd_driver);
 }
 

index 0e42823..bcd8989 100644
@@ -22,6 +22,8 @@ static inline void arch_idle(void)
 	cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
+static inline void arch_reset(char mode, const char *cmd)
+{
+}
 
 #endif /* __MACH_MXS_SYSTEM_H__ */

index 20ec3bd..add6428 100644
@@ -42,7 +42,7 @@ static void __iomem *mxs_clkctrl_reset_addr;
 /*
  * Reset the system. It is called by machine_restart().
  */
-void arch_reset(char mode, const char *cmd)
+static void mxs_arch_reset(char mode, const char *cmd)
 {
 	/* reset the chip */
 	__mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr);

@@ -68,6 +68,8 @@ static int __init mxs_arch_reset_init(void)
 	if (!IS_ERR(clk))
 		clk_enable(clk);
 
+	arm_arch_reset = mxs_arch_reset;
+
 	return 0;
 }
 core_initcall(mxs_arch_reset_init);

index 00023b5..13ed7a3 100644
@@ -180,8 +180,15 @@ void __init netx_init_irq(void)
 	irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
 }
 
+static void netx_arch_reset(char mode, const char *cmd)
+{
+	writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
+	       NETX_SYSTEM_RES_CR);
+}
+
 static int __init netx_init(void)
 {
+	arm_arch_reset = netx_arch_reset;
 	return platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 

index dc7b4bc..83ae2b1 100644
@@ -19,10 +19,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include "netx-regs.h"
-
 static inline void arch_idle(void)
 {
 	cpu_do_idle();

@@ -30,8 +26,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
-	       NETX_SYSTEM_RES_CR);
 }
 
 #endif

index ac58e3b..a9c2406 100644
@@ -18,6 +18,7 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>

@@ -113,6 +114,16 @@ static struct amba_device *amba_devs[] __initdata = {
 	&cpu8815_amba_rng
 };
 
+static void nmk_arch_reset(char mode, const char *cmd)
+{
+	void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
+
+	/* FIXME: use egpio when implemented */
+
+	/* Write anything to Reset status register */
+	writel(1, src_rstsr);
+}
+
 static int __init cpu8815_init(void)
 {
 	int i;

@@ -120,6 +131,7 @@ static int __init cpu8815_init(void)
 	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
 	for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
 		amba_device_register(amba_devs[i], &iomem_resource);
+	arm_arch_reset = nmk_arch_reset;
 	return 0;
 }
 arch_initcall(cpu8815_init);

index 7119f68..16f59f6 100644
@@ -20,9 +20,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
 	/*

@@ -34,12 +31,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
-
-	/* FIXME: use egpio when implemented */
-
-	/* Write anything to Reset status register */
-	writel(1, src_rstsr);
 }
 
 #endif

index f6ff5d8..ccd7818 100644
@@ -28,6 +28,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 #include <asm/irq.h>
+#include <asm/proc-fns.h>
 
 #include <mach/hardware.h>
 #include <mach/regs-serial.h>

@@ -133,3 +134,14 @@ void __init nuc93x_init_clocks(void)
 	clks_register(nuc932_clkregs, ARRAY_SIZE(nuc932_clkregs));
 }
 
+static void nuc93x_arch_reset(char mode, const char *cmd)
+{
+	cpu_reset(0);
+}
+
+static int __init nuc93x_arch_reset_init(void)
+{
+	arm_arch_reset = nuc93x_arch_reset;
+	return 0;
+}
+arch_initcall(nuc93x_arch_reset_init);

index d26bd9a..a4d39a3 100644
@@ -15,14 +15,10 @@
  *
  */
 
-#include <asm/proc-fns.h>
-
 static void arch_idle(void)
 {
 }
 
-static void arch_reset(char mode, const char *cmd)
+static inline void arch_reset(char mode, const char *cmd)
 {
-	cpu_reset(0);
 }
-

index 0ab531d..557e4eb 100644
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/serial_8250.h>
 #include <linux/mbus.h>

@@ -268,6 +269,17 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 	}
 }
 
+static void orion5x_arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * Enable and issue soft reset
+	 */
+	orion5x_setbits(RSTOUTn_MASK, (1 << 2));
+	orion5x_setbits(CPU_SOFT_RESET, 1);
+	mdelay(200);
+	orion5x_clrbits(CPU_SOFT_RESET, 1);
+}
+
 void __init orion5x_init(void)
 {
 	char *dev_name;

@@ -302,6 +314,11 @@ void __init orion5x_init(void)
 	 * Register watchdog driver
 	 */
 	orion5x_wdt_init();
+
+	/*
+	 * Assign reset hook.
+	 */
+	arm_arch_reset = orion5x_arch_reset;
 }
 
 /*

index a1d6e46..91a933c 100644
@@ -20,14 +20,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/*
-	 * Enable and issue soft reset
-	 */
-	orion5x_setbits(RSTOUTn_MASK, (1 << 2));
-	orion5x_setbits(CPU_SOFT_RESET, 1);
-	mdelay(200);
-	orion5x_clrbits(CPU_SOFT_RESET, 1);
 }
 
-
 #endif

index 6339975..7184172 100644
@@ -32,6 +32,7 @@
 #include <asm/mach-types.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
+#include <asm/proc-fns.h>
 #include <asm/system.h>
 
 #include <asm/mach/arch.h>

@@ -208,6 +209,10 @@ static struct platform_device *devices[] __initdata = {
 	&watchdog_device,
 };
 
+static void pnx4008_arch_reset(char mode, const char *cmd)
+{
+	cpu_reset(0);
+}
 
 extern void pnx4008_uart_init(void);
 

@@ -224,6 +229,7 @@ static void __init pnx4008_init(void)
 	spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 	/* Switch on the UART clocks */
 	pnx4008_uart_init();
+	arm_arch_reset = pnx4008_arch_reset;
 }
 
 static struct map_desc pnx4008_io_desc[] __initdata = {

index 5dda2bb..6710ed3 100644
@@ -21,10 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
 static void arch_idle(void)
 {
 	cpu_do_idle();

@@ -32,7 +28,6 @@ static void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	cpu_reset(0);
 }
 
 #endif

index 0dbd257..1d14a77 100644
@@ -9,11 +9,6 @@
 #ifndef __MACH_SYSTEM_H__
 #define __MACH_SYSTEM_H__
 
-#include <linux/bitops.h>
-#include <mach/hardware.h>
-
-#define SIRFSOC_SYS_RST_BIT  BIT(31)
-
 extern void __iomem *sirfsoc_rstc_base;
 
 static inline void arch_idle(void)

@@ -23,7 +18,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
 }
 
 #endif

new file mode 100644
index 0000000..5473ae8
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-prima2/reset.c
+ */
+
+#include <linux/init.h>
+#include <linux/bitops.h>
+#include <mach/hardware.h>
+#include <asm/system.h>
+
+#define SIRFSOC_SYS_RST_BIT  BIT(31)
+
+static void prima2_arch_reset(char mode, const char *cmd)
+{
+	writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
+}
+
+static int __init prima2_arch_reset_init(void)
+{
+	arm_arch_reset = prima2_arch_reset;
+	return 0;
+}
+arch_initcall(prima2_arch_reset_init);

index d1fce8b..0687110 100644
@@ -11,8 +11,6 @@
  */
 
 #include <asm/proc-fns.h>
-#include "hardware.h"
-#include "pxa2xx-regs.h"
 
 static inline void arch_idle(void)
 {

@@ -20,4 +18,6 @@ static inline void arch_idle(void)
 }
 
 
-void arch_reset(char mode, const char *cmd);
+static inline void arch_reset(char mode, const char *cmd)
+{
+}

index 01e9d64..075598a 100644
@@ -81,7 +81,7 @@ static void do_hw_reset(void)
 	OSMR3 = OSCR + 368640;	/* ... in 100 ms */
 }
 
-void arch_reset(char mode, const char *cmd)
+static void pxa_arch_reset(char mode, const char *cmd)
 {
 	clear_reset_status(RESET_STATUS_ALL);
 

@@ -100,3 +100,9 @@ void arch_reset(char mode, const char *cmd)
 	}
 }
 
+static int __init pxa_arch_reset_init(void)
+{
+	arm_arch_reset = pxa_arch_reset;
+	return 0;
+}
+arch_initcall(pxa_arch_reset_init);

index 5c23450..96b6f75 100644
@@ -534,3 +534,23 @@ void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
 	meminfo->nr_banks = 1;
 #endif
 }
+
+void (*realview_reset)(char mode);
+
+static void realview_arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * To reset, we hit the on-board reset register
+	 * in the system FPGA
+	 */
+	if (realview_reset)
+		realview_reset(mode);
+	dsb();
+}
+
+static int __init realview_arch_reset_init(void)
+{
+	arm_arch_reset = realview_arch_reset;
+	return 0;
+}
+arch_initcall(realview_arch_reset_init);

index 6657ff23..1630766 100644
@@ -21,12 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
-void (*realview_reset)(char mode);
-
 static inline void arch_idle(void)
 {
 	/*

@@ -38,13 +32,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	/*
-	 * To reset, we hit the on-board reset register
-	 * in the system FPGA
-	 */
-	if (realview_reset)
-		realview_reset(mode);
-	dsb();
 }
 
 #endif

index 45c7b93..e9fb593 100644
@@ -7,10 +7,6 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/hardware/iomd.h>
-
 static inline void arch_idle(void)
 {
 	cpu_do_idle();

@@ -18,10 +14,4 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	iomd_writeb(0, IOMD_ROMCR0);
-
-	/*
-	 * Jump into the ROM
-	 */
-	cpu_reset(0);
 }

index 580b3c7..2d9ac6e 100644
@@ -25,9 +25,12 @@
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
 #include <asm/page.h>
+#include <asm/proc-fns.h>
 #include <asm/domain.h>
 #include <asm/setup.h>
 
+#include <asm/hardware/iomd.h>
+
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>

@@ -206,9 +209,20 @@ static struct i2c_board_info i2c_rtc = {
 	I2C_BOARD_INFO("pcf8583", 0x50)
 };
 
+static void rpc_arch_reset(char mode, const char *cmd)
+{
+	iomd_writeb(0, IOMD_ROMCR0);
+
+	/*
+	 * Jump into the ROM
+	 */
+	cpu_reset(0);
+}
+
 static int __init rpc_init(void)
 {
 	i2c_register_board_info(0, &i2c_rtc, 1);
+	arm_arch_reset = rpc_arch_reset;
 	return platform_add_devices(devs, ARRAY_SIZE(devs));
 }
 

index 2e58cb7..51bc8eb 100644
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/watchdog-reset.h>
-
 static void arch_idle(void)
 {
 	/* nothing here yet */

@@ -20,11 +18,6 @@ static void arch_idle(void)
 
 static void arch_reset(char mode, const char *cmd)
 {
-	if (mode != 's')
-		arch_wdt_reset();
-
-	/* if all else fails, or mode was for soft, jump to 0 */
-	cpu_reset(0);
 }
 
 #endif /* __ASM_ARCH_IRQ_H */

new file mode 100644
index 0000000..2ea710c
@@ -0,0 +1,26 @@
+/*
+ * arch/arm/mach-s3c64xx/reset.c
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+
+#include <plat/watchdog-reset.h>
+
+#include <asm/proc-fns.h>
+
+static void s3c64xx_arch_reset(char mode, const char *cmd)
+{
+	if (mode != 's')
+		arch_wdt_reset();
+
+	/* if all else fails, or mode was for soft, jump to 0 */
+	cpu_reset(0);
+}
+
+static int __init s3c64xx_arch_reset_init(void)
+{
+	arm_arch_reset = s3c64xx_arch_reset;
+	return 0;
+}
+arch_initcall(s3c64xx_arch_reset_init);

index e21f347..fb49654 100644
@@ -25,6 +25,7 @@
 #include <asm/mach/flash.h>
 #include <asm/irq.h>
 #include <asm/gpio.h>
+#include <asm/proc-fns.h>
 
 #include "generic.h"