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ARM: Allow kernel unaligned accesses on ARMv6+ processors

PATCH New Catalin Marinas 3 participants 4 messages Nov 5, 2011 – Nov 7, 2011 1 message not in the archive Arm (32-bit)

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PATCH 1/1 ARM: Allow kernel unaligned accesses on ARMv6+ processors

Recent gcc versions generate unaligned accesses by default on ARMv6 and later processors. This patch ensures that the SCTLR.A bit is always cleared on such processors to avoid kernel traping before alignment_init() is called.

---
 arch/arm/kernel/head.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/kernel/head.S +1 -1
index a400a4d..1768db2 100644
@@ -394,7 +394,7 @@ __secondary_data:
  *  r13 = *virtual* address to jump to upon completion
  */
 __enable_mmu:
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
 	orr	r0, r0, #CR_A
 #else
 	bic	r0, r0, #CR_A
#1 lore raw

PATCH 1/1 ARM: Allow kernel unaligned accesses on ARMv6+ processors

Quoted 7 lines · Catalin Marinas

Recent gcc versions generate unaligned accesses by default on ARMv6 and later processors. This patch ensures that the SCTLR.A bit is always cleared on such processors to avoid kernel traping before alignment_init() is called.

Quoted 23 lines
---
 arch/arm/kernel/head.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/kernel/head.S +1 -1
index a400a4d..1768db2 100644
@@ -394,7 +394,7 @@ __secondary_data:
  *  r13 = *virtual* address to jump to upon completion
  */
 __enable_mmu:
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
 	orr	r0, r0, #CR_A
 #else
 	bic	r0, r0, #CR_A

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#2 lore raw

PATCH 1/1 ARM: Allow kernel unaligned accesses on ARMv6+ processors

In reply to Catalin Marinas
Quoted 10 lines

-----Original Message-----
From: Catalin Marinas [mailto:catalin.marinas at gmail.com] On Behalf Of Catalin Marinas
Sent: Saturday, November 05, 2011 3:41 AM
To: linux-arm-kernel at lists.infradead.org
Cc: John Linn
Subject: [PATCH] ARM: Allow kernel unaligned accesses on ARMv6+ processors

Recent gcc versions generate unaligned accesses by default on ARMv6

and

Quoted 6 lines

later processors. This patch ensures that the SCTLR.A bit is always cleared on such processors to avoid kernel traping before alignment_init() is called.

It worked great, thanks Catalin. I'd love to see a solution merged in the mainline and this seems reasonable.
I'm being pushed to newer tools which require a solution.

Quoted 9 lines
---
 arch/arm/kernel/head.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/kernel/head.S +0 -0
index a400a4d..1768db2 100644

arch/arm/kernel/head.S __secondary_data: · line 400

Quoted 8 lines
arch/arm/kernel/head.S +1 -1
@@ -394,7 +394,7 @@ __secondary_data:
  *  r13 = *virtual* address to jump to upon completion
  */
 __enable_mmu:
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
 	orr	r0, r0, #CR_A
 #else
 	bic	r0, r0, #CR_A

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#4 lore raw

PATCH 1/1 ARM: Allow kernel unaligned accesses on ARMv6+ processors

Quoted 15 lines · John Linn
Quoted 10 lines

-----Original Message-----
From: Catalin Marinas [mailto:catalin.marinas at gmail.com] On Behalf Of Catalin Marinas
Sent: Saturday, November 05, 2011 3:41 AM
To: linux-arm-kernel at lists.infradead.org
Cc: John Linn
Subject: [PATCH] ARM: Allow kernel unaligned accesses on ARMv6+ processors

Recent gcc versions generate unaligned accesses by default on ARMv6

and

Quoted 4 lines

later processors. This patch ensures that the SCTLR.A bit is always cleared on such processors to avoid kernel traping before alignment_init() is called.

Quoted 8 lines
Quoted 2 lines

It worked great, thanks Catalin. I'd love to see a solution merged in the mainline and this seems reasonable.
I'm being pushed to newer tools which require a solution.

Thanks. I pushed it to Russell's patch system as:

http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7150/1

Signature · 1 line
Catalin