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ASoC: wm9081: Fix reading wrong register for setting VMID 2*240k

PATCH Applied Axel Lin 2 participants 4 messages Nov 5, 2011 – Nov 8, 2011

Subsystems (3)
Sound ASoC Wolfson microelectronics drivers
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Axel Lin

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#0 lore raw

PATCH 1/2 ASoC: wm9081: Fix reading wrong register for setting VMID 2*240k

VMID Divider Enable and Select is controlled by BIT[2:1] of WM9081_VMID_CONTROL register (04h).
Current code reads wrong register (WM9081_BIAS_CONTROL_1) for setting VMID 2*240k.

Signed-off-by Axel Lin <[email protected]>
---
 sound/soc/codecs/wm9081.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
sound/soc/codecs/wm9081.c +1 -1
index 3cd35a0..fe65618 100644
@@ -818,7 +818,7 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
 		}
 
 		/* VMID 2*240k */
-		reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1);
+		reg = snd_soc_read(codec, WM9081_VMID_CONTROL);
 		reg &= ~WM9081_VMID_SEL_MASK;
 		reg |= 0x04;
 		snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
Signature · 1 line
1.7.5.4
author
#1 lore raw

PATCH 2/2 ASoC: wm9081: Don't write WM9081_BIAS_ENA bit to WM9081_VMID_CONTROL register

WM9081_BIAS_ENA is the bit[1] of WM9081_BIAS_CONTROL_1 register (05h). Current code incorrectly write it to WM9081_VMID_CONTROL(04h) register.

Signed-off-by Axel Lin <[email protected]>
---
 sound/soc/codecs/wm9081.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
sound/soc/codecs/wm9081.c +4 -4
index fe65618..4a398c3 100644
@@ -807,7 +807,6 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
 			mdelay(100);
 
 			/* Normal bias enable & soft start off */
-			reg |= WM9081_BIAS_ENA;
 			reg &= ~WM9081_VMID_RAMP;
 			snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
 

@@ -830,14 +829,15 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
 		break;
 
 	case SND_SOC_BIAS_OFF:
-		/* Startup bias source */
+		/* Startup bias source and disable bias */
 		reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1);
 		reg |= WM9081_BIAS_SRC;
+		reg &= ~WM9081_BIAS_ENA;
 		snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg);
 
-		/* Disable VMID and biases with soft ramping */
+		/* Disable VMID with soft ramping */
 		reg = snd_soc_read(codec, WM9081_VMID_CONTROL);
-		reg &= ~(WM9081_VMID_SEL_MASK | WM9081_BIAS_ENA);
+		reg &= ~WM9081_VMID_SEL_MASK;
 		reg |= WM9081_VMID_RAMP;
 		snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
Signature · 1 line
1.7.5.4
#2 lore raw

Re: [PATCH 2/2] ASoC: wm9081: Don't write WM9081_BIAS_ENA bit to WM9081_VMID_CONTROL register

Quoted 2 lines · Axel Lin

WM9081_BIAS_ENA is the bit[1] of WM9081_BIAS_CONTROL_1 register (05h). Current code incorrectly write it to WM9081_VMID_CONTROL(04h) register.

This one seems to work happily - applied, thanks!

Applied
#3 lore raw
In reply to Axel Lin
Quoted 4 lines · Axel Lin

VMID Divider Enable and Select is controlled by BIT[2:1] of WM9081_VMID_CONTROL register (04h).
Current code reads wrong register (WM9081_BIAS_CONTROL_1) for setting VMID 2*240k.

Applied, thanks.