VIC DT binding and MULTI_IRQ_HANDLER

PATCH Superseded Jamie Iles 5 participants 28 messages Nov 4, 2011 – Nov 10, 2011

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Device tree bindings Arm (32-bit) Arm sub-architectures Arm Samsung Exynos +7 more subsystems

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Jamie Iles

author

2011-11-04 01:09 UTC #0 lore raw

v4 cover VIC DT binding and MULTI_IRQ_HANDLER

Since the last revision I've updated the handling loop as suggested by Linus and Russell, added a patch for picoxcell and added a final patch to remove the non MULTI_IRQ_HANDLER support for VIC. The final patch assumes that all VIC users will be converted to MULTI_IRQ_HANDLER which I would hope would be the case but this could be dropped if not.

I've also included Marc's patch for reference as the mach patches are dependent on it.

Jamie Iles (12):
ARM: vic: device tree binding
ARM: vic: MULTI_IRQ_HANDLER handler
ARM: ep93xx: convert to MULTI_IRQ_HANDLER
ARM: netx: convert to MULTI_IRQ_HANDLER
ARM: nomadik: convert to MULTI_IRQ_HANDLER
ARM: s3c64xx: convert to MULTI_IRQ_HANDLER
ARM: spear: convert to MULTI_IRQ_HANDLER
ARM: u300: convert to MULTI_IRQ_HANDLER
ARM: versatile: convert to MULTI_IRQ_HANDLER
ARM: samsung: convert to MULTI_IRQ_HANDLER
ARM: picoxcell: convert to MULTI_IRQ_HANDLER
ARM: VIC: remove non MULTI_IRQ_HANDLER support

Marc Zyngier (1):
ARM: Make global handler and CONFIG_MULTI_IRQ_HANDLER mutually
exclusive

 Documentation/devicetree/bindings/arm/vic.txt      |   29 ++++
 arch/arm/common/Kconfig                            |    2 +
 arch/arm/common/vic.c                              |  142 ++++++++++++++++----
 arch/arm/include/asm/entry-macro-vic2.S            |   57 --------
 arch/arm/include/asm/hardware/vic.h                |   10 ++-
 arch/arm/kernel/entry-armv.S                       |    7 +-
 arch/arm/mach-ep93xx/adssphere.c                   |    2 +
 arch/arm/mach-ep93xx/edb93xx.c                     |    9 ++
 arch/arm/mach-ep93xx/gesbc9312.c                   |    2 +
 arch/arm/mach-ep93xx/include/mach/entry-macro.S    |   42 ------
 arch/arm/mach-ep93xx/micro9.c                      |    5 +
 arch/arm/mach-ep93xx/simone.c                      |    2 +
 arch/arm/mach-ep93xx/snappercl15.c                 |    2 +
 arch/arm/mach-ep93xx/ts72xx.c                      |    2 +
 arch/arm/mach-netx/include/mach/entry-macro.S      |   13 --
 arch/arm/mach-netx/nxdb500.c                       |    2 +
 arch/arm/mach-netx/nxdkn.c                         |    2 +
 arch/arm/mach-netx/nxeb500hmi.c                    |    2 +
 arch/arm/mach-nomadik/board-nhk8815.c              |    2 +
 arch/arm/mach-nomadik/include/mach/entry-macro.S   |   30 ----
 arch/arm/mach-picoxcell/common.c                   |    9 +-
 arch/arm/mach-picoxcell/include/mach/entry-macro.S |   11 +-
 arch/arm/mach-pxa/include/mach/entry-macro.S       |   36 -----
 arch/arm/mach-s3c64xx/include/mach/entry-macro.S   |    7 +-
 arch/arm/mach-s3c64xx/mach-anw6410.c               |    2 +
 arch/arm/mach-s3c64xx/mach-crag6410.c              |    2 +
 arch/arm/mach-s3c64xx/mach-hmt.c                   |    2 +
 arch/arm/mach-s3c64xx/mach-mini6410.c              |    2 +
 arch/arm/mach-s3c64xx/mach-ncp.c                   |    2 +
 arch/arm/mach-s3c64xx/mach-real6410.c              |    2 +
 arch/arm/mach-s3c64xx/mach-smartq5.c               |    2 +
 arch/arm/mach-s3c64xx/mach-smartq7.c               |    2 +
 arch/arm/mach-s3c64xx/mach-smdk6400.c              |    2 +
 arch/arm/mach-s3c64xx/mach-smdk6410.c              |    2 +
 arch/arm/mach-s5p64x0/include/mach/entry-macro.S   |    7 +-
 arch/arm/mach-s5p64x0/mach-smdk6440.c              |    2 +
 arch/arm/mach-s5p64x0/mach-smdk6450.c              |    2 +
 arch/arm/mach-s5pc100/include/mach/entry-macro.S   |   25 ----
 arch/arm/mach-s5pc100/mach-smdkc100.c              |    2 +
 arch/arm/mach-s5pv210/include/mach/entry-macro.S   |   37 -----
 arch/arm/mach-s5pv210/mach-aquila.c                |    2 +
 arch/arm/mach-s5pv210/mach-goni.c                  |    2 +
 arch/arm/mach-s5pv210/mach-smdkc110.c              |    2 +
 arch/arm/mach-s5pv210/mach-smdkv210.c              |    2 +
 arch/arm/mach-s5pv210/mach-torbreck.c              |    2 +
 arch/arm/mach-shmobile/include/mach/entry-macro.S  |    9 --
 arch/arm/mach-spear3xx/include/mach/entry-macro.S  |   27 ----
 arch/arm/mach-spear3xx/spear300_evb.c              |    2 +
 arch/arm/mach-spear3xx/spear310_evb.c              |    2 +
 arch/arm/mach-spear3xx/spear320_evb.c              |    2 +
 arch/arm/mach-spear6xx/include/mach/entry-macro.S  |   36 -----
 arch/arm/mach-spear6xx/spear600_evb.c              |    2 +
 arch/arm/mach-u300/include/mach/entry-macro.S      |   24 ----
 arch/arm/mach-u300/u300.c                          |    2 +
 arch/arm/mach-versatile/include/mach/entry-macro.S |   30 ----
 arch/arm/mach-versatile/versatile_ab.c             |    2 +
 arch/arm/mach-versatile/versatile_dt.c             |    2 +
 arch/arm/mach-versatile/versatile_pb.c             |    2 +
 58 files changed, 257 insertions(+), 417 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/vic.txt
 delete mode 100644 arch/arm/include/asm/entry-macro-vic2.S

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:09 UTC #1 lore raw

PATCH v4 1/13 ARM: Make global handler and CONFIG_MULTI_IRQ_HANDLER mutually exclusive

From: Marc Zyngier <[email protected]>

Even when CONFIG_MULTI_IRQ_HANDLER is selected, the core code requires the arch_irq_handler_default macro to be defined as a fallback.

It turns out nobody is using that particular feature as both PXA and shmobile have all their machine descriptors populated with the interrupt handler, leaving unused code (or empty macros) in their entry-macro.S file just to be able to compile entry-armv.S.

Make CONFIG_MULTI_IRQ_HANDLER exclusive wrt arch_irq_handler_default, which allows to remove one test from the hot path. Also cleanup both PXA and shmobile entry-macro.S.

Cc Eric Miao <[email protected]>

Cc Paul Mundt <[email protected]>

Signed-off-by Marc Zyngier <[email protected]>

---
 arch/arm/kernel/entry-armv.S                      |    7 ++--
 arch/arm/mach-pxa/include/mach/entry-macro.S      |   36 ---------------------
 arch/arm/mach-shmobile/include/mach/entry-macro.S |    9 -----
 3 files changed, 3 insertions(+), 49 deletions(-)

arch/arm/kernel/entry-armv.S +3 -4

index 9ad50c4..bd49a6a 100644
@@ -36,12 +36,11 @@
 #ifdef CONFIG_MULTI_IRQ_HANDLER
 	ldr	r1, =handle_arch_irq
 	mov	r0, sp
-	ldr	r1, [r1]
 	adr	lr, BSYM(9997f)
-	teq	r1, #0
-	movne	pc, r1
-#endif
+	ldr	pc, [r1]
+#else
 	arch_irq_handler_default
+#endif
 9997:
 	.endm

arch/arm/mach-pxa/include/mach/entry-macro.S +0 ~~-36~~

index a73bc86..260c0c1 100644
@@ -7,45 +7,9 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <mach/irqs.h>
 
 		.macro	disable_fiq
 		.endm
 
-		.macro  get_irqnr_preamble, base, tmp
-		.endm
-
 		.macro  arch_ret_to_user, tmp1, tmp2
 		.endm
-
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		mrc	p15, 0, \tmp, c0, c0, 0		@ CPUID
-		mov	\tmp, \tmp, lsr #13
-		and	\tmp, \tmp, #0x7		@ Core G
-		cmp	\tmp, #1
-		bhi	1002f
-
-		@ Core Generation 1 (PXA25x)
-		mov	\base, #io_p2v(0x40000000)	@ IIR Ctl = 0x40d00000
-		add	\base, \base, #0x00d00000
-		ldr	\irqstat, [\base, #0]		@ ICIP
-		ldr	\irqnr, [\base, #4]		@ ICMR
-
-		ands	\irqnr, \irqstat, \irqnr
-		beq	1001f
-		rsb	\irqstat, \irqnr, #0
-		and	\irqstat, \irqstat, \irqnr
-		clz	\irqnr, \irqstat
-		rsb	\irqnr, \irqnr, #(31 + PXA_IRQ(0))
-		b	1001f
-1002:
-		@ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
-		mrc	p6, 0, \irqstat, c5, c0, 0	@ ICHP
-		tst	\irqstat, #0x80000000
-		beq	1001f
-		bic	\irqstat, \irqstat, #0x80000000
-		mov	\irqnr, \irqstat, lsr #16
-		add	\irqnr, \irqnr, #(PXA_IRQ(0))
-1001:
-		.endm

arch/arm/mach-shmobile/include/mach/entry-macro.S +0 -9

index 8d4a416..2a57b29 100644
@@ -18,14 +18,5 @@
 	.macro  disable_fiq
 	.endm
 
-	.macro  get_irqnr_preamble, base, tmp
-	.endm
-
-	.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-	.endm
-
-	.macro  test_for_ipi, irqnr, irqstat, base, tmp
-	.endm
-
 	.macro  arch_ret_to_user, tmp1, tmp2
 	.endm

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:09 UTC #2 lore raw

PATCH v4 2/13 ARM: vic: device tree binding

In reply to Jamie Iles

This adds a device tree binding for the VIC based on the of_irq_init() support. This adds an irqdomain to the vic and always registers all vics in the static vic array rather than for pm only to keep track of the irq domain. struct irq_data::hwirq is used where appropriate rather than runtime masking.

v2: - use irq_domain_simple_ops
- remove stub implementation of vic_of_init for !CONFIG_OF
- Make VIC select IRQ_DOMAIN

Reviewed-by Rob Herring <[email protected]>

Reviewed-by Grant Likely <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 Documentation/devicetree/bindings/arm/vic.txt |   29 +++++++
 arch/arm/common/Kconfig                       |    1 +
 arch/arm/common/vic.c                         |  106 ++++++++++++++++++-------
 arch/arm/include/asm/hardware/vic.h           |    7 ++-
 4 files changed, 114 insertions(+), 29 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/vic.txt

Documentation/devicetree/bindings/arm/vic.txt new file +29 -0

new file mode 100644
index 0000000..266716b
@@ -0,0 +1,29 @@
+* ARM Vectored Interrupt Controller
+
+One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
+system for interrupt routing.  For multiple controllers they can either be
+nested or have the outputs wire-OR'd together.
+
+Required properties:
+
+- compatible : should be one of
+	"arm,pl190-vic"
+	"arm,pl192-vic"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : The number of cells to define the interrupts.  Must be 1 as
+  the VIC has no configuration options for interrupt sources.  The cell is a u32
+  and defines the interrupt number.
+- reg : The register bank for the VIC.
+
+Optional properties:
+
+- interrupts : Interrupt source for parent controllers if the VIC is nested.
+
+Example:
+
+	vic0: interrupt-controller at 60000 {
+		compatible = "arm,pl192-vic";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		reg = <0x60000 0x1000>;
+	};

arch/arm/common/Kconfig +1 -0

index 74df9ca..e91ee7d 100644
@@ -3,6 +3,7 @@ config ARM_GIC
 	bool
 
 config ARM_VIC
+	select IRQ_DOMAIN
 	bool
 
 config ARM_VIC_NR

arch/arm/common/vic.c +78 ~~-28~~

190 lines not on this page · raw message

arch/arm/include/asm/hardware/vic.h +6 -1

index 5d72550..b348a54 100644
@@ -41,7 +41,12 @@
 #define VIC_PL192_VECT_ADDR		0xF00
 
 #ifndef __ASSEMBLY__
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+struct device_node;
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
-#endif
+int vic_of_init(struct device_node *node, struct device_node *parent);
 
+#endif /* __ASSEMBLY__ */
 #endif

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-10 14:46 UTC #3 lore raw

PATCH v4 2/13 ARM: vic: device tree binding

Quoted 26 lines · Jamie Iles

This adds a device tree binding for the VIC based on the of_irq_init() support. This adds an irqdomain to the vic and always registers all vics in the static vic array rather than for pm only to keep track of the irq domain. struct irq_data::hwirq is used where appropriate rather than runtime masking.
v2: - use irq_domain_simple_ops
- remove stub implementation of vic_of_init for !CONFIG_OF
- Make VIC select IRQ_DOMAIN
Reviewed-by Rob Herring <[email protected]>
Reviewed-by Grant Likely <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
---
 Documentation/devicetree/bindings/arm/vic.txt |   29 +++++++
 arch/arm/common/Kconfig                       |    1 +
 arch/arm/common/vic.c                         |  106 ++++++++++++++++++-------
 arch/arm/include/asm/hardware/vic.h           |    7 ++-
 4 files changed, 114 insertions(+), 29 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/vic.txt
arch/arm/common/vic.c +0 -0
index 01f18a4..e689975 100644
@@ -22,6 +22,10 @@

[...]

Quoted 6 lines

arch/arm/common/vic.c +6 -0

+#ifdef CONFIG_OF
+int __init vic_of_init(struct device_node *node, struct device_node *parent)
+{
+	void __iomem *regs;
+	int irq_base;
+

arch/arm/common/vic.c void __init vic_init(void __iomem *base, unsigned int irq_start, · line 418

Quoted 10 lines

arch/arm/common/vic.c +10 -0

+	if (WARN(parent, "non-root VICs are not supported"))
+		return -EINVAL;
+
+	regs = of_iomap(node, 0);
+	if (WARN_ON(!regs))
+		return -EIO;
+
+	irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
+	if (WARN_ON(irq_base < 0))
+		goto out_unmap;

Hmm, this appears to need linux/export.h for THIS_MODULE now. linux/irq.h has a comment saying it uses a macro to avoid needing an include of export.h there so I guess it needs to go in here instead.

Jamie

Marc Zyngier

2011-11-10 15:20 UTC #4 lore raw

PATCH v4 2/13 ARM: vic: device tree binding

Quoted 40 lines · Jamie Iles

Quoted 26 lines · Jamie Iles
This adds a device tree binding for the VIC based on the of_irq_init() support. This adds an irqdomain to the vic and always registers all vics in the static vic array rather than for pm only to keep track of the irq domain. struct irq_data::hwirq is used where appropriate rather than runtime masking.
v2: - use irq_domain_simple_ops
- remove stub implementation of vic_of_init for !CONFIG_OF
- Make VIC select IRQ_DOMAIN
Reviewed-by Rob Herring <[email protected]>
Reviewed-by Grant Likely <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
---
 Documentation/devicetree/bindings/arm/vic.txt |   29 +++++++
 arch/arm/common/Kconfig                       |    1 +
 arch/arm/common/vic.c                         |  106 ++++++++++++++++++-------
 arch/arm/include/asm/hardware/vic.h           |    7 ++-
 4 files changed, 114 insertions(+), 29 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/vic.txt
arch/arm/common/vic.c +0 -0
index 01f18a4..e689975 100644
@@ -22,6 +22,10 @@
[...]
Quoted 12 lines
arch/arm/common/vic.c +12 -0
+#ifdef CONFIG_OF
+int __init vic_of_init(struct device_node *node, struct device_node *parent)
+{
+	void __iomem *regs;
+	int irq_base;
+
+	if (WARN(parent, "non-root VICs are not supported"))
+		return -EINVAL;
+
+	regs = of_iomap(node, 0);
+	if (WARN_ON(!regs))
+		return -EIO;

Quoted 8 lines

arch/arm/common/vic.c void __init vic_init(void __iomem *base, unsigned int irq_start, · line 418
Quoted 4 lines
arch/arm/common/vic.c +4 -0
+
+	irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
+	if (WARN_ON(irq_base < 0))
+		goto out_unmap;
Hmm, this appears to need linux/export.h for THIS_MODULE now. linux/irq.h has a comment saying it uses a macro to avoid needing an include of export.h there so I guess it needs to go in here instead.

Yes, I had to hack it when I tested this series on PB1176 (and of course forgot to send the patch around...).

It seems a bit backward to impose including linux/export.h while this file doesn't use any of it directly.

M.

Signature · 1 line

Jazz is not dead. It just smells funny...

Jamie Iles

author

2011-11-10 16:28 UTC #5 lore raw

PATCH v4 2/13 ARM: vic: device tree binding

Quoted 50 lines · Marc Zyngier

Quoted 40 lines · Jamie Iles
Quoted 26 lines · Jamie Iles
This adds a device tree binding for the VIC based on the of_irq_init() support. This adds an irqdomain to the vic and always registers all vics in the static vic array rather than for pm only to keep track of the irq domain. struct irq_data::hwirq is used where appropriate rather than runtime masking.
v2: - use irq_domain_simple_ops
- remove stub implementation of vic_of_init for !CONFIG_OF
- Make VIC select IRQ_DOMAIN
Reviewed-by Rob Herring <[email protected]>
Reviewed-by Grant Likely <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
---
 Documentation/devicetree/bindings/arm/vic.txt |   29 +++++++
 arch/arm/common/Kconfig                       |    1 +
 arch/arm/common/vic.c                         |  106 ++++++++++++++++++-------
 arch/arm/include/asm/hardware/vic.h           |    7 ++-
 4 files changed, 114 insertions(+), 29 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/vic.txt
arch/arm/common/vic.c +0 -0
index 01f18a4..e689975 100644
@@ -22,6 +22,10 @@
[...]
Quoted 12 lines
arch/arm/common/vic.c +12 -0
+#ifdef CONFIG_OF
+int __init vic_of_init(struct device_node *node, struct device_node *parent)
+{
+	void __iomem *regs;
+	int irq_base;
+
+	if (WARN(parent, "non-root VICs are not supported"))
+		return -EINVAL;
+
+	regs = of_iomap(node, 0);
+	if (WARN_ON(!regs))
+		return -EIO;
Quoted 8 lines
arch/arm/common/vic.c void __init vic_init(void __iomem *base, unsigned int irq_start, · line 418
Quoted 4 lines
arch/arm/common/vic.c +4 -0
+
+	irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
+	if (WARN_ON(irq_base < 0))
+		goto out_unmap;
Hmm, this appears to need linux/export.h for THIS_MODULE now. linux/irq.h has a comment saying it uses a macro to avoid needing an include of export.h there so I guess it needs to go in here instead.

Quoted 5 lines

Yes, I had to hack it when I tested this series on PB1176 (and of course forgot to send the patch around...).
It seems a bit backward to impose including linux/export.h while this file doesn't use any of it directly.

Yeah, but seeing as include/linux/irq.h had a comment saying that they'd explicitly decided to avoid including export.h there I decided it would be simplest to punt it into vic.c and that someone knew better than me!

I'll include it in vic.c when I ask you to pull (probably tomorrow).

Thanks,

Jamie

Jamie Iles

author

2011-11-04 01:10 UTC #6 lore raw

PATCH v4 3/13 ARM: vic: MULTI_IRQ_HANDLER handler

In reply to Jamie Iles

Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER platforms. This can replace the ASM entry macros for platforms that use the VIC.

v4: - rebase ontop of move __exception and friends to
asm/exception.h
- rework polling loop to handle as many irqs as possible in one go
v3: - simplify irq handling loop as suggested by Grant
- service interrupts from msb->lsb order
v2: - allow the handler be used for !CONFIG_OF
- use irq_domain_to_irq()

Cc Rob Herring <[email protected]>

Acked-by Grant Likely <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/common/vic.c               |   38 +++++++++++++++++++++++++++++++++++
 arch/arm/include/asm/hardware/vic.h |    3 ++
 2 files changed, 41 insertions(+), 0 deletions(-)

arch/arm/common/vic.c +38 -0

index e689975..a82e3e0 100644
@@ -30,6 +30,7 @@
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 
+#include <asm/exception.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/vic.h>

@@ -427,3 +428,40 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
 	return -EIO;
 }
 #endif /* CONFIG OF */
+
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+/*
+ * Handle each interrupt in a single VIC.  Returns non-zero if we've
+ * handled at least one interrupt.  This does a single read of the
+ * status register and handles all interrupts in order from LSB first.
+ */
+static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
+{
+	u32 stat, irq;
+	int handled = 0;
+
+	stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
+	while (stat) {
+		irq = ffs(stat) - 1;
+		handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
+		stat &= ~(1 << irq);
+		handled = 1;
+	}
+
+	return handled;
+}
+
+/*
+ * Keep iterating over all registered VIC's until there are no pending
+ * interrupts.
+ */
+asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
+{
+	int i, handled;
+
+	do {
+		for (i = 0, handled = 0; i < vic_id; ++i)
+			handled |= handle_one_vic(&vic_devices[i], regs);
+	} while (handled);
+}
+#endif /* CONFIG_MULTI_IRQ_HANDLER */

arch/arm/include/asm/hardware/vic.h +3 -0

index b348a54..f42ebd6 100644
@@ -45,8 +45,11 @@
 #include <linux/types.h>
 
 struct device_node;
+struct pt_regs;
+
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
 int vic_of_init(struct device_node *node, struct device_node *parent);
+void vic_handle_irq(struct pt_regs *regs);
 
 #endif /* __ASSEMBLY__ */
 #endif

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:10 UTC #7 lore raw

PATCH v4 4/13 ARM: ep93xx: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for ep93xx to help building multi platform kernels.

Cc Hartley Sweeten <[email protected]>

Cc Ryan Mallon <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                |    1 +
 arch/arm/mach-ep93xx/adssphere.c                |    2 +
 arch/arm/mach-ep93xx/edb93xx.c                  |    9 +++++
 arch/arm/mach-ep93xx/gesbc9312.c                |    2 +
 arch/arm/mach-ep93xx/include/mach/entry-macro.S |   42 -----------------------
 arch/arm/mach-ep93xx/micro9.c                   |    5 +++
 arch/arm/mach-ep93xx/simone.c                   |    2 +
 arch/arm/mach-ep93xx/snappercl15.c              |    2 +
 arch/arm/mach-ep93xx/ts72xx.c                   |    2 +
 9 files changed, 25 insertions(+), 42 deletions(-)

arch/arm/Kconfig +1 -0

index fe6b052..3618567 100644
@@ -409,6 +409,7 @@ config ARCH_EP93XX
 	select ARCH_HAS_HOLES_MEMORYMODEL
 	select ARCH_USES_GETTIMEOFFSET
 	select NEED_MACH_MEMORY_H
+	select MULTI_IRQ_HANDLER
 	help
 	  This enables support for the Cirrus EP93xx series of CPUs.

arch/arm/mach-ep93xx/adssphere.c +2 -0

index 0713448..d9b0ea2 100644
@@ -16,6 +16,7 @@
 
 #include <mach/hardware.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -36,6 +37,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= adssphere_init_machine,
 MACHINE_END

arch/arm/mach-ep93xx/edb93xx.c +9 -0

index 70ef8c5..9bbae08 100644
@@ -39,6 +39,7 @@
 #include <mach/ep93xx_spi.h>
 #include <mach/gpio-ep93xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -250,6 +251,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

@@ -261,6 +263,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

@@ -272,6 +275,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

@@ -283,6 +287,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

@@ -294,6 +299,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

@@ -305,6 +311,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

@@ -316,6 +323,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

@@ -327,6 +335,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= edb93xx_init_machine,
 MACHINE_END

arch/arm/mach-ep93xx/gesbc9312.c +2 -0

index 45ee205..1dd32a7 100644
@@ -16,6 +16,7 @@
 
 #include <mach/hardware.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -36,6 +37,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= gesbc9312_init_machine,
 MACHINE_END

arch/arm/mach-ep93xx/include/mach/entry-macro.S +0 ~~-42~~

51 lines not on this page · raw message

arch/arm/mach-ep93xx/micro9.c +5 -0

index e72f736..a6dae6c 100644
@@ -18,6 +18,7 @@
 
 #include <mach/hardware.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -80,6 +81,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= micro9_init_machine,
 MACHINE_END

@@ -91,6 +93,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= micro9_init_machine,
 MACHINE_END

@@ -102,6 +105,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= micro9_init_machine,
 MACHINE_END

@@ -113,6 +117,7 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= micro9_init_machine,
 MACHINE_END

arch/arm/mach-ep93xx/simone.c +2 -0

index 52e090d..40121ba 100644
@@ -25,6 +25,7 @@
 #include <mach/fb.h>
 #include <mach/gpio-ep93xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -80,6 +81,7 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= simone_init_machine,
 MACHINE_END

arch/arm/mach-ep93xx/snappercl15.c +2 -0

index 8121e3a..ec7c63f 100644
@@ -31,6 +31,7 @@
 #include <mach/fb.h>
 #include <mach/gpio-ep93xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -177,6 +178,7 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
 	.atag_offset	= 0x100,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer 		= &ep93xx_timer,
 	.init_machine	= snappercl15_init_machine,
 MACHINE_END

arch/arm/mach-ep93xx/ts72xx.c +2 -0

index 1ade3c3..50de4ae 100644
@@ -23,6 +23,7 @@
 #include <mach/hardware.h>
 #include <mach/ts72xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>

@@ -260,6 +261,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
 	.atag_offset	= 0x100,
 	.map_io		= ts72xx_map_io,
 	.init_irq	= ep93xx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &ep93xx_timer,
 	.init_machine	= ts72xx_init_machine,
 MACHINE_END

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:10 UTC #8 lore raw

PATCH v4 5/13 ARM: netx: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for netx to help building multi platform kernels.

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                              |    1 +
 arch/arm/mach-netx/include/mach/entry-macro.S |   13 -------------
 arch/arm/mach-netx/nxdb500.c                  |    2 ++
 arch/arm/mach-netx/nxdkn.c                    |    2 ++
 arch/arm/mach-netx/nxeb500hmi.c               |    2 ++
 5 files changed, 7 insertions(+), 13 deletions(-)

arch/arm/Kconfig +1 -0

index 3618567..d90b09d 100644
@@ -451,6 +451,7 @@ config ARCH_NETX
 	select CPU_ARM926T
 	select ARM_VIC
 	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
 	help
 	  This enables support for systems based on the Hilscher NetX Soc

arch/arm/mach-netx/include/mach/entry-macro.S +0 ~~-13~~

index 844f1f9..6e9f1cb 100644
@@ -18,22 +18,9 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#include <mach/hardware.h>
 
 		.macro  disable_fiq
 		.endm
 
-		.macro  get_irqnr_preamble, base, tmp
-		ldr	\base, =io_p2v(0x001ff000)
-		.endm
-
 		.macro  arch_ret_to_user, tmp1, tmp2
 		.endm
-
-		.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\irqstat, [\base, #0]
-		clz	\irqnr, \irqstat
-		rsb     \irqnr, \irqnr, #31
-		cmp	\irqstat, #0
-		.endm
-

arch/arm/mach-netx/nxdb500.c +2 -0

index 90903dd..ef8cf35 100644
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>

@@ -203,6 +204,7 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
 	.atag_offset	= 0x100,
 	.map_io		= netx_map_io,
 	.init_irq	= netx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &netx_timer,
 	.init_machine	= nxdb500_init,
 MACHINE_END

arch/arm/mach-netx/nxdkn.c +2 -0

index c63384a..588558b 100644
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>

@@ -96,6 +97,7 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
 	.atag_offset	= 0x100,
 	.map_io		= netx_map_io,
 	.init_irq	= netx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &netx_timer,
 	.init_machine	= nxdkn_init,
 MACHINE_END

arch/arm/mach-netx/nxeb500hmi.c +2 -0

index 8f548ec..cfcbb50 100644
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>

@@ -180,6 +181,7 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
 	.atag_offset	= 0x100,
 	.map_io		= netx_map_io,
 	.init_irq	= netx_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &netx_timer,
 	.init_machine	= nxeb500hmi_init,
 MACHINE_END

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:10 UTC #9 lore raw

PATCH v4 6/13 ARM: nomadik: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for nomadik to help building multi platform kernels.

Cc Alessandro Rubini <[email protected]>

Cc Linus Walleij <[email protected]>

Cc STEricsson <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                 |    1 +
 arch/arm/mach-nomadik/board-nhk8815.c            |    2 +
 arch/arm/mach-nomadik/include/mach/entry-macro.S |   30 ----------------------
 3 files changed, 3 insertions(+), 30 deletions(-)

arch/arm/Kconfig +1 -0

index d90b09d..149fd45 100644
@@ -918,6 +918,7 @@ config ARCH_NOMADIK
 	select CLKDEV_LOOKUP
 	select GENERIC_CLOCKEVENTS
 	select ARCH_REQUIRE_GPIOLIB
+	select MULTI_IRQ_HANDLER
 	help
 	  Support for the Nomadik platform by ST-Ericsson

arch/arm/mach-nomadik/board-nhk8815.c +2 -0

index 0cbb74c..f98259c 100644
@@ -21,6 +21,7 @@
 #include <linux/mtd/onenand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
+#include <asm/hardware/vic.h>
 #include <asm/sizes.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -280,6 +281,7 @@ MACHINE_START(NOMADIK, "NHK8815")
 	.atag_offset	= 0x100,
 	.map_io		= cpu8815_map_io,
 	.init_irq	= cpu8815_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &nomadik_timer,
 	.init_machine	= nhk8815_platform_init,
 MACHINE_END

arch/arm/mach-nomadik/include/mach/entry-macro.S +0 ~~-30~~

index 49f1aa3..98ea1c1 100644
@@ -6,38 +6,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
 	.macro	disable_fiq
 	.endm
 
-	.macro	get_irqnr_preamble, base, tmp
-	ldr	\base, =IO_ADDRESS(NOMADIK_IC_BASE)
-	.endm
-
 	.macro	arch_ret_to_user, tmp1, tmp2
 	.endm
-
-	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-	/* This stanza gets the irq mask from one of two status registers */
-	mov	\irqnr, #0
-	ldr	\irqstat, [\base, #VIC_REG_IRQSR0]	@ get masked status
-	cmp	\irqstat, #0
-	bne	1001f
-	add	\irqnr, \irqnr, #32
-	ldr	\irqstat, [\base, #VIC_REG_IRQSR1]	@ get masked status
-
-1001:	tst	\irqstat, #15
-	bne	1002f
-	add	\irqnr, \irqnr, #4
-	movs	\irqstat, \irqstat, lsr #4
-	bne	1001b
-1002:	tst	\irqstat, #1
-	bne	1003f
-	add	\irqnr, \irqnr, #1
-	movs	\irqstat, \irqstat, lsr #1
-	bne	1002b
-1003:	/* EQ will be set if no irqs pending */
-	.endm

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:10 UTC #10 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.

Cc Ben Dooks <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                 |    1 +
 arch/arm/mach-s3c64xx/include/mach/entry-macro.S |    7 ++++---
 arch/arm/mach-s3c64xx/mach-anw6410.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-crag6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-hmt.c                 |    2 ++
 arch/arm/mach-s3c64xx/mach-mini6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-ncp.c                 |    2 ++
 arch/arm/mach-s3c64xx/mach-real6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-smartq5.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-smartq7.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-smdk6400.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-smdk6410.c            |    2 ++
 12 files changed, 25 insertions(+), 3 deletions(-)

arch/arm/Kconfig +1 -0

index 149fd45..32929ef 100644
@@ -787,6 +787,7 @@ config ARCH_S3C64XX
 	select SAMSUNG_GPIOLIB_4BIT
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S3C64XX series based systems

arch/arm/mach-s3c64xx/include/mach/entry-macro.S +4 -3

index dd36260..dc2bc15 100644
@@ -12,7 +12,8 @@
  * warranty of any kind, whether express or implied.
 */
 
-#include <mach/map.h>
-#include <mach/irqs.h>
+		.macro  disable_fiq
+		.endm
 
-#include <asm/entry-macro-vic2.S>
+		.macro  arch_ret_to_user, tmp1, tmp2
+		.endm

arch/arm/mach-s3c64xx/mach-anw6410.c +2 -0

index d164a28..37d1cb1 100644
@@ -30,6 +30,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>

@@ -236,6 +237,7 @@ MACHINE_START(ANW6410, "A&W6410")
 	.atag_offset	= 0x100,
 
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= anw6410_map_io,
 	.init_machine	= anw6410_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-crag6410.c +2 -0

index 8065803..1d8d6d0 100644
@@ -37,6 +37,7 @@
 #include <linux/mfd/wm831x/irq.h>
 #include <linux/mfd/wm831x/gpio.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>

@@ -765,6 +766,7 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
 	/* Maintainer: Mark Brown <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= crag6410_map_io,
 	.init_machine	= crag6410_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-hmt.c +2 -0

index 19a0887..281ce99 100644
@@ -29,6 +29,7 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>

@@ -267,6 +268,7 @@ MACHINE_START(HMT, "Airgoo-HMT")
 	/* Maintainer: Peter Korsgaard <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= hmt_map_io,
 	.init_machine	= hmt_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-mini6410.c +2 -0

index fb8969a..073c66c 100644
@@ -24,6 +24,7 @@
 #include <linux/serial_core.h>
 #include <linux/types.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>

@@ -345,6 +346,7 @@ MACHINE_START(MINI6410, "MINI6410")
 	/* Maintainer: Darius Augulis <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= mini6410_map_io,
 	.init_machine	= mini6410_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-ncp.c +2 -0

index c30f2e5..b7a6edd 100644
@@ -25,6 +25,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>

@@ -99,6 +100,7 @@ MACHINE_START(NCP, "NCP")
 	/* Maintainer: Samsung Electronics */
 	.atag_offset	= 0x100,
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= ncp_map_io,
 	.init_machine	= ncp_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-real6410.c +2 -0

index 93170d4..71486a0 100644
@@ -25,6 +25,7 @@
 #include <linux/serial_core.h>
 #include <linux/types.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>

@@ -326,6 +327,7 @@ MACHINE_START(REAL6410, "REAL6410")
 	.atag_offset	= 0x100,
 
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= real6410_map_io,
 	.init_machine	= real6410_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-smartq5.c +2 -0

index cbb57de..0c0481d 100644
@@ -17,6 +17,7 @@
 #include <linux/leds.h>
 #include <linux/platform_device.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -148,6 +149,7 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
 	/* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
 	.atag_offset	= 0x100,
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smartq_map_io,
 	.init_machine	= smartq5_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-smartq7.c +2 -0

index 04f914b..1c1ddad 100644
@@ -17,6 +17,7 @@
 #include <linux/leds.h>
 #include <linux/platform_device.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -164,6 +165,7 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
 	/* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
 	.atag_offset	= 0x100,
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smartq_map_io,
 	.init_machine	= smartq7_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-smdk6400.c +2 -0

index 6fd5e95..6acccfe 100644
@@ -22,6 +22,7 @@
 
 #include <asm/mach-types.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>

@@ -88,6 +89,7 @@ MACHINE_START(SMDK6400, "SMDK6400")
 	.atag_offset	= 0x100,
 
 	.init_irq	= s3c6400_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smdk6400_map_io,
 	.init_machine	= smdk6400_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s3c64xx/mach-smdk6410.c +2 -0

index 5f147c3..23bfba7 100644
@@ -43,6 +43,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>

@@ -700,6 +701,7 @@ MACHINE_START(SMDK6410, "SMDK6410")
 	.atag_offset	= 0x100,
 
 	.init_irq	= s3c6410_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smdk6410_map_io,
 	.init_machine	= smdk6410_machine_init,
 	.timer		= &s3c24xx_timer,

Signature · 1 line

1.7.5.4

Thomas Abraham

2011-11-09 11:25 UTC #11 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

Hi Jamie,

Quoted 18 lines · Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.

Cc Ben Dooks <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---

?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
?arch/arm/mach-s3c64xx/include/mach/entry-macro.S | ? ?7 ++++---
?arch/arm/mach-s3c64xx/mach-anw6410.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-crag6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-hmt.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-mini6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-ncp.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-real6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq5.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq7.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6400.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6410.c ? ? ? ? ? ?| ? ?2 ++

Quoted 2 lines

?12 files changed, 25 insertions(+), 3 deletions(-)

I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch

https://github.com/jamieiles/linux-2.6-ji.git branch: vic-dt

There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?

By hard resetting to commit id 'f7bf800e2c0c2947e9b5839f7d2702a36ddfb71a' (ARM: omap2plus: convert to CONFIG_MULTI_IRQ_HANDLER), the board boots up fine.

Thanks,
Thomas.

U-Boot 1.3.4-00009-g9da84bd (Jun 8 2010 - 09:46:01) for SMDK6410

CPU: S3C6410 at 532MHz
Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz, Serial = CLKUART
(SYNC Mode)

Board:   SMDK6410
DRAM:    128 MB
Flash:   0 kB
SD/MMC:  SD/MMC channel0 is selected for booting device.
1886MB
NAND:    0 MB
do not support this address : 57e7c008
In:      serial
Out:     serial
Err:     serial
Net:     smc911x
Hit any key to stop autoboot:  0

SMDK6410 #
SMDK6410 #
SMDK6410 #
SMDK6410 # setenv bootargs; setenv serverip 192.168.0.1; tftp 51000000 small_root_v3.6.cramfs; tftp 50008000 zImage; bootm
smc911x: initializing
smc911x: detected LAN9115 controller
smc911x: phy initialized
smc911x: MAC 00:40:5c:26:0a:5b
Using smc911x device
TFTP from server 192.168.0.1; our IP address is 192.168.0.20 Filename 'small_root_v3.6.cramfs'.
Load address: 0x51000000
Loading: T #################################################################

         #################################################################
         ################################################################

done
Bytes transferred = 2842624 (0x2b6000)
smc911x: initializing
smc911x: detected LAN9115 controller
smc911x: phy initialized
smc911x: MAC 00:40:5c:26:0a:5b
Using smc911x device
TFTP from server 192.168.0.1; our IP address is 192.168.0.20 Filename 'zImage'.
Load address: 0x50008000
Loading: T #################################################################

         ########################################

done
Bytes transferred = 1534176 (0x1768e0)
Boot with zImage
do not support this address : 50008000

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
<5>Linux version 3.2.0-rc1-00031-gcbd9857-dirty
(thomas at localhost.localdomain) (gcc version 4.4.1 (Sourcery G++ Lite 2009q3-67) ) #7 Wed Nov 9 16:35:12 IST 2011
CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387f
CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: SMDK6410
<4>Ignoring unrecognised tag 0x41001099
Memory policy: ECC disabled, Data cache writeback
CPU S3C6410 (id 0x36410100)
<7>s3c6410_init_clocks: initialising clocks
<6>S3C24XX Clocks, Copyright 2004 Simtec Electronics
<3>camera: no parent clock specified
<7>s3c6400_setup_clocks: registering clocks <7>s3c6400_setup_clocks: clkdiv0 = 01043310 <7>s3c6400_setup_clocks: xtal is 12000000
<6>S3C64XX: PLL settings, A=532000000, M=532000000, E=24000000 <6>S3C64XX: HCLK2=266000000, HCLK=133000000, PCLK=66500000 <6>mout_apll: source is fout_apll (1), rate is 532000000 <6>mout_epll: source is epll (1), rate is 24000000 <6>mout_mpll: source is mpll (1), rate is 532000000 <7>s3c64xx_clk_doutmpll_get_rate: parent is 532000000 <6>mmc_bus: source is dout_mpll (1), rate is 24181818 <6>mmc_bus: source is mout_epll (0), rate is 24000000 <6>mmc_bus: source is mout_epll (0), rate is 24000000 <6>usb-bus-host: source is clk_48m (0), rate is 48000000 <7>s3c64xx_clk_doutmpll_get_rate: parent is 532000000
<6>uclk1: source is dout_mpll (1), rate is 66500000
<6>spi-bus: source is mout_epll (0), rate is 24000000 <6>spi-bus: source is mout_epll (0), rate is 24000000 <6>audio-bus: source is mout_epll (0), rate is 24000000 <6>audio-bus: source is mout_epll (0), rate is 24000000 <6>audio-bus: source is mout_epll (0), rate is 24000000 <6>irda-bus: source is mout_epll (0), rate is 24000000 <3>camera: no parent clock specified
<7>On node 0 totalpages: 8192
<7>free_area_init_node: node 0, pgdat c02ce184, node_mem_map c0300000

<7>  Normal zone: 64 pages used for memmap
<7>  Normal zone: 0 pages reserved
<7>  Normal zone: 8128 pages, LIFO batch:0

<6>CPU: found DTCM0 8k @ 0c002000, enabled
<6>CPU: moved DTCM0 8k to fffe8000, enabled
<6>CPU: found DTCM1 8k @ 0c004000, enabled
<6>CPU: moved DTCM1 8k to fffea000, enabled
<6>CPU: found ITCM0 8k @ 00000000, not enabled
<6>CPU: moved ITCM0 8k to fffe0000, enabled
<6>CPU: found ITCM1 8k @ 00000000, not enabled
<6>CPU: moved ITCM1 8k to fffe2000, enabled
<7>pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 <7>pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128 <5>Kernel command line: root=/dev/ram0 rw ramdisk=8192 initrd=0x51000000,8M console=ttySAC0,115200 init=/linuxrc mem=32M <6>PID hash table entries: 128 (order: -3, 512 bytes) <6>Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) <6>Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) <6>Memory: 32MB = 32MB total
<5>Memory: 21164k/21164k available, 11604k reserved, 0K highmem <5>Virtual kernel memory layout:

    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    DTCM    : 0xfffe8000 - 0xfffec000   (  16 kB)
    ITCM    : 0xfffe0000 - 0xfffe4000   (  16 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    vmalloc : 0xc2800000 - 0xf6000000   ( 824 MB)
    lowmem  : 0xc0000000 - 0xc2000000   (  32 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .text : 0xc0008000 - 0xc028c9a8   (2579 kB)
      .init : 0xc028d000 - 0xc02a9000   ( 112 kB)
      .data : 0xc02aa000 - 0xc02ce7e0   ( 146 kB)
       .bss : 0xc02cf024 - 0xc02ff68c   ( 194 kB)

<6>SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 <6>NR_IRQS:246
<7>s3c64xx_init_irq: initialising interrupts
<6>VIC @f6000000: id 0x00041192, vendor 0x41
<1>Unable to handle kernel NULL pointer dereference at virtual address 00000000 <1>pgd = c0004000
<1>[00000000] *pgd=00000000
<0>Internal error: Oops: 5 [#1]
<d>Modules linked in:

CPU: 0    Not tainted  (3.2.0-rc1-00031-gcbd9857-dirty #7)
PC is at irq_domain_add+0x10/0x158
LR is at s3c64xx_init_irq+0x2c/0x60
pc : [<c005aa10>]    lr : [<c0293660>]    psr: 800001d3

sp : c02abfa8 ip : ffffffff fp : 00000000
r10: 502a3620 r9 : 410fb766 r8 : 50004008
r7 : 00000000 r6 : 8fffffff r5 : ffffff7f r4 : c02cf284
r3 : 00000000 r2 : 00000000 r1 : c02cf260 r0 : c02cf284
Flags: Nzcv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel
Control: 00c5387f Table: 50004008 DAC: 00000017
<0>Process swapper (pid: 0, stack limit = 0xc02aa268)
<0>Stack: (0xc02abfa8 to 0xc02ac000)
<0>bfa0: ffffffff ffffff7f 8fffffff c02ae77c 50004008 c0293660
<0>bfc0: c02cf040 c02a4afc 8fffffff c028ff74 00000c00 c028d660 c028d2c0 00000000 <0>bfe0: 00000000 c02a4afc 00c5387d c02ac084 c02a4af8 50008040 00000000 00000000 [<c005aa10>] (irq_domain_add+0x10/0x158) from [<c0293660>] (s3c64xx_init_irq+0x2c/0x60)
[<c0293660>] (s3c64xx_init_irq+0x2c/0x60) from [<c028ff74>] (init_IRQ+0x14/0x1c) [<c028ff74>] (init_IRQ+0x14/0x1c) from [<c028d660>] (start_kernel+0x15c/0x2c0) [<c028d660>] (start_kernel+0x15c/0x2c0) from [<50008040>] (0x50008040) <0>Code: e92d41f0 e1a04000 e5903014 e5907010 (e5933000)
<4>---[ end trace 1b75b31a2719ed1c ]---
<0>Kernel panic - not syncing: Attempted to kill the idle task! [<c0014978>] (unwind_backtrace+0x0/0xf4) from [<c01e9780>] (panic+0x58/0x188) [<c01e9780>] (panic+0x58/0x188) from [<c00297a0>] (do_exit+0x664/0x694) [<c00297a0>] (do_exit+0x664/0x694) from [<c0012728>] (die+0x11c/0x1d4) [<c0012728>] (die+0x11c/0x1d4) from [<c00161dc>] (__do_kernel_fault+0x64/0x84) [<c00161dc>] (__do_kernel_fault+0x64/0x84) from [<c0016340>] (do_page_fault+0x144/0x1e8)
[<c0016340>] (do_page_fault+0x144/0x1e8) from [<c00084a0>] (do_DataAbort+0x34/0x98)
[<c00084a0>] (do_DataAbort+0x34/0x98) from [<c000e6f8>] (__dabt_svc+0x38/0x60)

Exception stack(0xc02abf60 to 0xc02abfa8)

bf60: c02cf284 c02cf260 00000000 00000000 c02cf284 ffffff7f 8fffffff 00000000
bf80: 50004008 410fb766 502a3620 00000000 ffffffff c02abfa8 c0293660 c005aa10
bfa0: 800001d3 ffffffff
[<c000e6f8>] (__dabt_svc+0x38/0x60) from [<c005aa10>] (irq_domain_add+0x10/0x158)
[<c005aa10>] (irq_domain_add+0x10/0x158) from [<c0293660>] (s3c64xx_init_irq+0x2c/0x60)
[<c0293660>] (s3c64xx_init_irq+0x2c/0x60) from [<c028ff74>] (init_IRQ+0x14/0x1c) [<c028ff74>] (init_IRQ+0x14/0x1c) from [<c028d660>] (start_kernel+0x15c/0x2c0) [<c028d660>] (start_kernel+0x15c/0x2c0) from [<50008040>] (0x50008040)

[...]

Thomas Abraham

2011-11-09 11:34 UTC #12 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

Hi Jamie,

Quoted 29 lines · Thomas Abraham

Hi Jamie,
Quoted 18 lines · Jamie Iles
Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.
Cc Ben Dooks <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
---
?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
?arch/arm/mach-s3c64xx/include/mach/entry-macro.S | ? ?7 ++++---
?arch/arm/mach-s3c64xx/mach-anw6410.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-crag6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-hmt.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-mini6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-ncp.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-real6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq5.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq7.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6400.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6410.c ? ? ? ? ? ?| ? ?2 ++
Quoted 2 lines
?12 files changed, 25 insertions(+), 3 deletions(-)
I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch
https://github.com/jamieiles/linux-2.6-ji.git ?branch: vic-dt

Quoted 7 lines

There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?
By hard resetting to commit id 'f7bf800e2c0c2947e9b5839f7d2702a36ddfb71a' (ARM: omap2plus: convert to CONFIG_MULTI_IRQ_HANDLER), the board boots up fine.

There is similar issue on smdkv210 (s5pv210) board as well.

Thanks,
Thomas.

Quoted 184 lines

Thanks,
Thomas.
U-Boot 1.3.4-00009-g9da84bd (Jun ?8 2010 - 09:46:01) for SMDK6410
CPU: ? ? S3C6410 at 532MHz
? ? ? ? Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz, Serial = CLKUART (SYNC Mode)
Board: ? SMDK6410
DRAM: ? ?128 MB
Flash: ? 0 kB
SD/MMC: ?SD/MMC channel0 is selected for booting device.
1886MB
NAND: ? ?0 MB
do not support this address : 57e7c008
In: ? ? ?serial
Out: ? ? serial
Err: ? ? serial
Net: ? ? smc911x
Hit any key to stop autoboot: ?0
SMDK6410 #
SMDK6410 #
SMDK6410 #
SMDK6410 # setenv bootargs; setenv serverip 192.168.0.1; tftp 51000000 small_root_v3.6.cramfs; tftp 50008000 zImage; bootm
smc911x: initializing
smc911x: detected LAN9115 controller
smc911x: phy initialized
smc911x: MAC 00:40:5c:26:0a:5b
Using smc911x device
TFTP from server 192.168.0.1; our IP address is 192.168.0.20 Filename 'small_root_v3.6.cramfs'.
Load address: 0x51000000
Loading: T ################################################################# ? ? ? ? ################################################################# ? ? ? ? ################################################################ done
Bytes transferred = 2842624 (0x2b6000)
smc911x: initializing
smc911x: detected LAN9115 controller
smc911x: phy initialized
smc911x: MAC 00:40:5c:26:0a:5b
Using smc911x device
TFTP from server 192.168.0.1; our IP address is 192.168.0.20 Filename 'zImage'.
Load address: 0x50008000
Loading: T ################################################################# ? ? ? ? ########################################
done
Bytes transferred = 1534176 (0x1768e0)
Boot with zImage
do not support this address : 50008000
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
<5>Linux version 3.2.0-rc1-00031-gcbd9857-dirty
(thomas at localhost.localdomain) (gcc version 4.4.1 (Sourcery G++ Lite 2009q3-67) ) #7 Wed Nov 9 16:35:12 IST 2011
CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387f
CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: SMDK6410
<4>Ignoring unrecognised tag 0x41001099
Memory policy: ECC disabled, Data cache writeback
CPU S3C6410 (id 0x36410100)
<7>s3c6410_init_clocks: initialising clocks
<6>S3C24XX Clocks, Copyright 2004 Simtec Electronics
<3>camera: no parent clock specified
<7>s3c6400_setup_clocks: registering clocks <7>s3c6400_setup_clocks: clkdiv0 = 01043310 <7>s3c6400_setup_clocks: xtal is 12000000
<6>S3C64XX: PLL settings, A=532000000, M=532000000, E=24000000 <6>S3C64XX: HCLK2=266000000, HCLK=133000000, PCLK=66500000 <6>mout_apll: source is fout_apll (1), rate is 532000000 <6>mout_epll: source is epll (1), rate is 24000000
<6>mout_mpll: source is mpll (1), rate is 532000000 <7>s3c64xx_clk_doutmpll_get_rate: parent is 532000000
<6>mmc_bus: source is dout_mpll (1), rate is 24181818
<6>mmc_bus: source is mout_epll (0), rate is 24000000
<6>mmc_bus: source is mout_epll (0), rate is 24000000 <6>usb-bus-host: source is clk_48m (0), rate is 48000000 <7>s3c64xx_clk_doutmpll_get_rate: parent is 532000000
<6>uclk1: source is dout_mpll (1), rate is 66500000
<6>spi-bus: source is mout_epll (0), rate is 24000000
<6>spi-bus: source is mout_epll (0), rate is 24000000 <6>audio-bus: source is mout_epll (0), rate is 24000000 <6>audio-bus: source is mout_epll (0), rate is 24000000 <6>audio-bus: source is mout_epll (0), rate is 24000000 <6>irda-bus: source is mout_epll (0), rate is 24000000
<3>camera: no parent clock specified
<7>On node 0 totalpages: 8192
<7>free_area_init_node: node 0, pgdat c02ce184, node_mem_map c0300000 <7> ?Normal zone: 64 pages used for memmap
<7> ?Normal zone: 0 pages reserved
<7> ?Normal zone: 8128 pages, LIFO batch:0
<6>CPU: found DTCM0 8k @ 0c002000, enabled
<6>CPU: moved DTCM0 8k to fffe8000, enabled
<6>CPU: found DTCM1 8k @ 0c004000, enabled
<6>CPU: moved DTCM1 8k to fffea000, enabled
<6>CPU: found ITCM0 8k @ 00000000, not enabled
<6>CPU: moved ITCM0 8k to fffe0000, enabled
<6>CPU: found ITCM1 8k @ 00000000, not enabled
<6>CPU: moved ITCM1 8k to fffe2000, enabled
<7>pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
<7>pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on. ?Total pages: 8128 <5>Kernel command line: root=/dev/ram0 rw ramdisk=8192 initrd=0x51000000,8M console=ttySAC0,115200 init=/linuxrc mem=32M <6>PID hash table entries: 128 (order: -3, 512 bytes)
<6>Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) <6>Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) <6>Memory: 32MB = 32MB total
<5>Memory: 21164k/21164k available, 11604k reserved, 0K highmem <5>Virtual kernel memory layout:
? ?vector ?: 0xffff0000 - 0xffff1000 ? ( ? 4 kB)
? ?DTCM ? ?: 0xfffe8000 - 0xfffec000 ? ( ?16 kB)
? ?ITCM ? ?: 0xfffe0000 - 0xfffe4000 ? ( ?16 kB)
? ?fixmap ?: 0xfff00000 - 0xfffe0000 ? ( 896 kB)
? ?vmalloc : 0xc2800000 - 0xf6000000 ? ( 824 MB)
? ?lowmem ?: 0xc0000000 - 0xc2000000 ? ( ?32 MB)
? ?modules : 0xbf000000 - 0xc0000000 ? ( ?16 MB)
? ? ?.text : 0xc0008000 - 0xc028c9a8 ? (2579 kB)
? ? ?.init : 0xc028d000 - 0xc02a9000 ? ( 112 kB)
? ? ?.data : 0xc02aa000 - 0xc02ce7e0 ? ( 146 kB)
? ? ? .bss : 0xc02cf024 - 0xc02ff68c ? ( 194 kB)
<6>SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 <6>NR_IRQS:246
<7>s3c64xx_init_irq: initialising interrupts
<6>VIC @f6000000: id 0x00041192, vendor 0x41
<1>Unable to handle kernel NULL pointer dereference at virtual address 00000000 <1>pgd = c0004000
<1>[00000000] *pgd=00000000
<0>Internal error: Oops: 5 [#1]
<d>Modules linked in:
CPU: 0 ? ?Not tainted ?(3.2.0-rc1-00031-gcbd9857-dirty #7)
PC is at irq_domain_add+0x10/0x158
LR is at s3c64xx_init_irq+0x2c/0x60
pc : [<c005aa10>] ? ?lr : [<c0293660>] ? ?psr: 800001d3
sp : c02abfa8 ?ip : ffffffff ?fp : 00000000
r10: 502a3620 ?r9 : 410fb766 ?r8 : 50004008
r7 : 00000000 ?r6 : 8fffffff ?r5 : ffffff7f ?r4 : c02cf284
r3 : 00000000 ?r2 : 00000000 ?r1 : c02cf260 ?r0 : c02cf284
Flags: Nzcv ?IRQs off ?FIQs off ?Mode SVC_32 ?ISA ARM ?Segment kernel
Control: 00c5387f ?Table: 50004008 ?DAC: 00000017
<0>Process swapper (pid: 0, stack limit = 0xc02aa268)
<0>Stack: (0xc02abfa8 to 0xc02ac000)
<0>bfa0: ? ? ? ? ? ? ? ? ? ffffffff ffffff7f 8fffffff c02ae77c 50004008 c0293660 <0>bfc0: c02cf040 c02a4afc 8fffffff c028ff74 00000c00 c028d660 c028d2c0 00000000 <0>bfe0: 00000000 c02a4afc 00c5387d c02ac084 c02a4af8 50008040 00000000 00000000 [<c005aa10>] (irq_domain_add+0x10/0x158) from [<c0293660>] (s3c64xx_init_irq+0x2c/0x60)
[<c0293660>] (s3c64xx_init_irq+0x2c/0x60) from [<c028ff74>] (init_IRQ+0x14/0x1c) [<c028ff74>] (init_IRQ+0x14/0x1c) from [<c028d660>] (start_kernel+0x15c/0x2c0) [<c028d660>] (start_kernel+0x15c/0x2c0) from [<50008040>] (0x50008040) <0>Code: e92d41f0 e1a04000 e5903014 e5907010 (e5933000)
<4>---[ end trace 1b75b31a2719ed1c ]---
<0>Kernel panic - not syncing: Attempted to kill the idle task! [<c0014978>] (unwind_backtrace+0x0/0xf4) from [<c01e9780>] (panic+0x58/0x188) [<c01e9780>] (panic+0x58/0x188) from [<c00297a0>] (do_exit+0x664/0x694) [<c00297a0>] (do_exit+0x664/0x694) from [<c0012728>] (die+0x11c/0x1d4) [<c0012728>] (die+0x11c/0x1d4) from [<c00161dc>] (__do_kernel_fault+0x64/0x84) [<c00161dc>] (__do_kernel_fault+0x64/0x84) from [<c0016340>] (do_page_fault+0x144/0x1e8)
[<c0016340>] (do_page_fault+0x144/0x1e8) from [<c00084a0>] (do_DataAbort+0x34/0x98)
[<c00084a0>] (do_DataAbort+0x34/0x98) from [<c000e6f8>] (__dabt_svc+0x38/0x60)
Exception stack(0xc02abf60 to 0xc02abfa8)
bf60: c02cf284 c02cf260 00000000 00000000 c02cf284 ffffff7f 8fffffff 00000000
bf80: 50004008 410fb766 502a3620 00000000 ffffffff c02abfa8 c0293660 c005aa10
bfa0: 800001d3 ffffffff
[<c000e6f8>] (__dabt_svc+0x38/0x60) from [<c005aa10>] (irq_domain_add+0x10/0x158)
[<c005aa10>] (irq_domain_add+0x10/0x158) from [<c0293660>] (s3c64xx_init_irq+0x2c/0x60)
[<c0293660>] (s3c64xx_init_irq+0x2c/0x60) from [<c028ff74>] (init_IRQ+0x14/0x1c) [<c028ff74>] (init_IRQ+0x14/0x1c) from [<c028d660>] (start_kernel+0x15c/0x2c0) [<c028d660>] (start_kernel+0x15c/0x2c0) from [<50008040>] (0x50008040)
[...]

Jamie Iles

author

2011-11-09 11:54 UTC #13 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

In reply to Thomas Abraham

Quoted 24 lines · Thomas Abraham

Hi Jamie,

Quoted 18 lines · Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.

Cc Ben Dooks <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---

?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
?arch/arm/mach-s3c64xx/include/mach/entry-macro.S | ? ?7 ++++---
?arch/arm/mach-s3c64xx/mach-anw6410.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-crag6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-hmt.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-mini6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-ncp.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-real6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq5.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq7.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6400.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6410.c ? ? ? ? ? ?| ? ?2 ++

Quoted 2 lines

?12 files changed, 25 insertions(+), 3 deletions(-)

Quoted 8 lines

I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch
https://github.com/jamieiles/linux-2.6-ji.git branch: vic-dt
There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?

Hmm, could you please try with the patch below applied?

Rob, I'm not sure if this is the best fix. The alternatives I can think of would be to always export irq_domain_simple_ops even if !CONFIG_OF_IRQ but not set .dt_translate or provide a generic irq_domain_null_ops.

Jamie

8<----

arch/arm/common/vic.c +6 -0

index 8c5f4b0..9a5fb9e 100644
@@ -163,6 +163,10 @@ static int __init vic_pm_init(void)
 late_initcall(vic_pm_init);
 #endif /* CONFIG_PM */
 
+#ifndef CONFIG_OF_IRQ
+static const struct irq_domain_ops vic_domain_null_ops;
+#endif /* !CONFIG_OF_IRQ */
+
 /**
  * vic_register() - Register a VIC.
  * @base: The base address of the VIC.

@@ -197,6 +201,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
 #ifdef CONFIG_OF_IRQ
 	v->domain.of_node = of_node_get(node);
 	v->domain.ops = &irq_domain_simple_ops;
+#else /* CONFIG_OF_IRQ */
+	v->domain.ops = &vic_domain_null_ops;
 #endif /* CONFIG_OF */
 	irq_domain_add(&v->domain);
 }

Thomas Abraham

2011-11-09 12:30 UTC #14 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

Quoted 61 lines · Jamie Iles

Quoted 24 lines · Thomas Abraham
Hi Jamie,
Quoted 18 lines · Jamie Iles
Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.
Cc Ben Dooks <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
---
?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
?arch/arm/mach-s3c64xx/include/mach/entry-macro.S | ? ?7 ++++---
?arch/arm/mach-s3c64xx/mach-anw6410.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-crag6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-hmt.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-mini6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-ncp.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-real6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq5.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq7.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6400.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6410.c ? ? ? ? ? ?| ? ?2 ++
Quoted 2 lines
?12 files changed, 25 insertions(+), 3 deletions(-)
Quoted 8 lines
I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch
https://github.com/jamieiles/linux-2.6-ji.git ?branch: vic-dt
There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?
Hmm, could you please try with the patch below applied?
Rob, I'm not sure if this is the best fix. ?The alternatives I can think of would be to always export irq_domain_simple_ops even if !CONFIG_OF_IRQ but not set .dt_translate or provide a generic irq_domain_null_ops.
Jamie
8<----
arch/arm/common/vic.c +0 -0
index 8c5f4b0..9a5fb9e 100644
@@ -163,6 +163,10 @@ static int __init vic_pm_init(void)
 ?late_initcall(vic_pm_init);
?#endif /* CONFIG_PM */
arch/arm/common/vic.c +4 -0
+#ifndef CONFIG_OF_IRQ
+static const struct irq_domain_ops vic_domain_null_ops;
+#endif /* !CONFIG_OF_IRQ */
+
?/**
?* vic_register() - Register a VIC.
?* @base: The base address of the VIC.
arch/arm/common/vic.c +0 -0
@@ -197,6 +201,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,

Quoted 9 lines

?#ifdef CONFIG_OF_IRQ
? ? ? ?v->domain.of_node = of_node_get(node);
? ? ? ?v->domain.ops = &irq_domain_simple_ops;
+#else /* CONFIG_OF_IRQ */
+ ? ? ? v->domain.ops = &vic_domain_null_ops;
?#endif /* CONFIG_OF */
? ? ? ?irq_domain_add(&v->domain);
?}

This patch solves the issue and both smdk6410 and smdkv210 works fine.

Thanks,
Thomas.

Jamie Iles

author

2011-11-10 14:53 UTC #15 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

Quoted 36 lines · Thomas Abraham

Quoted 35 lines · Jamie Iles
Quoted 24 lines · Thomas Abraham
Hi Jamie,
Quoted 18 lines · Jamie Iles
Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.
Cc Ben Dooks <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
---
?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
?arch/arm/mach-s3c64xx/include/mach/entry-macro.S | ? ?7 ++++---
?arch/arm/mach-s3c64xx/mach-anw6410.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-crag6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-hmt.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-mini6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-ncp.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-real6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq5.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq7.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6400.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6410.c ? ? ? ? ? ?| ? ?2 ++
Quoted 2 lines
?12 files changed, 25 insertions(+), 3 deletions(-)
Quoted 8 lines
I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch
https://github.com/jamieiles/linux-2.6-ji.git ?branch: vic-dt
There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?
Hmm, could you please try with the patch below applied?

[...]

Quoted 2 lines

This patch solves the issue and both smdk6410 and smdkv210 works fine.

Brilliant, thanks Thomas. Mind if I add a Tested-by from you providing the fixup patch is applied first?

Jamie

Thomas Abraham

2011-11-10 16:19 UTC #16 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

Quoted 36 lines · Jamie Iles

Quoted 35 lines · Thomas Abraham
Quoted 34 lines · Jamie Iles
Quoted 32 lines · Thomas Abraham
Hi Jamie,
Quoted 18 lines · Jamie Iles
Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.
Cc Ben Dooks <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
---
?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 +
?arch/arm/mach-s3c64xx/include/mach/entry-macro.S | ? ?7 ++++---
?arch/arm/mach-s3c64xx/mach-anw6410.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-crag6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-hmt.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-mini6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-ncp.c ? ? ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-real6410.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq5.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smartq7.c ? ? ? ? ? ? | ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6400.c ? ? ? ? ? ?| ? ?2 ++
?arch/arm/mach-s3c64xx/mach-smdk6410.c ? ? ? ? ? ?| ? ?2 ++
Quoted 2 lines
?12 files changed, 25 insertions(+), 3 deletions(-)
I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch
https://github.com/jamieiles/linux-2.6-ji.git ?branch: vic-dt
There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?

Quoted 7 lines

Quoted 1 line
Quoted 1 line
Hmm, could you please try with the patch below applied?
[...]
Quoted 2 lines
This patch solves the issue and both smdk6410 and smdkv210 works fine.
Brilliant, thanks Thomas. ?Mind if I add a Tested-by from you providing the fixup patch is applied first?

Sure. You can add

Tested-by Thomas Abraham <[email protected]>

for patches 01, 02. 03, 07, 11 and 13 of your patch series.

Regards,
Thomas.

Quoted 3 lines

Jamie

Rob Herring

2011-11-09 14:50 UTC #17 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Quoted 34 lines · Jamie Iles

Quoted 24 lines · Thomas Abraham
Hi Jamie,
Quoted 5 lines · Jamie Iles
Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.
Cc Ben Dooks <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
Quoted 15 lines
---
 arch/arm/Kconfig                                 |    1 +
 arch/arm/mach-s3c64xx/include/mach/entry-macro.S |    7 ++++---
 arch/arm/mach-s3c64xx/mach-anw6410.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-crag6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-hmt.c                 |    2 ++
 arch/arm/mach-s3c64xx/mach-mini6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-ncp.c                 |    2 ++
 arch/arm/mach-s3c64xx/mach-real6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-smartq5.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-smartq7.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-smdk6400.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-smdk6410.c            |    2 ++
 12 files changed, 25 insertions(+), 3 deletions(-)
Quoted 8 lines
I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch
https://github.com/jamieiles/linux-2.6-ji.git branch: vic-dt
There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?

Quoted 8 lines

Hmm, could you please try with the patch below applied?
Rob, I'm not sure if this is the best fix. The alternatives I can think of would be to always export irq_domain_simple_ops even if !CONFIG_OF_IRQ but not set .dt_translate or provide a generic irq_domain_null_ops.
Jamie

There is a simple fix:

@@ -74,7 +76,7 @@ struct irq_domain {
static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
unsigned long hwirq)
{
- if (d->ops->to_irq)
+ if (d->ops && d->ops->to_irq)

                return d->ops->to_irq(d, hwirq);
        if (WARN_ON(hwirq < d->hwirq_base))
                return 0;

I'll prepare a patch and send to tglx.

Rob

Quoted 27 lines

8<----

arch/arm/common/vic.c +6 -0

index 8c5f4b0..9a5fb9e 100644
@@ -163,6 +163,10 @@ static int __init vic_pm_init(void)
 late_initcall(vic_pm_init);
 #endif /* CONFIG_PM */
 
+#ifndef CONFIG_OF_IRQ
+static const struct irq_domain_ops vic_domain_null_ops;
+#endif /* !CONFIG_OF_IRQ */
+
 /**
  * vic_register() - Register a VIC.
  * @base: The base address of the VIC.

@@ -197,6 +201,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
 #ifdef CONFIG_OF_IRQ
 	v->domain.of_node = of_node_get(node);
 	v->domain.ops = &irq_domain_simple_ops;
+#else /* CONFIG_OF_IRQ */
+	v->domain.ops = &vic_domain_null_ops;
 #endif /* CONFIG_OF */
 	irq_domain_add(&v->domain);
 }

Jamie Iles

author

2011-11-09 14:55 UTC #18 lore raw

PATCH v4 7/13 ARM: s3c64xx: convert to MULTI_IRQ_HANDLER

Quoted 56 lines · Rob Herring

Quoted 34 lines · Jamie Iles
Quoted 24 lines · Thomas Abraham
Hi Jamie,
Quoted 5 lines · Jamie Iles
Now that there is a generic IRQ handler for multiple VIC devices use it for s3c64xx to help building multi platform kernels.
Cc Ben Dooks <[email protected]>
Signed-off-by Jamie Iles <[email protected]>
Quoted 15 lines
---
 arch/arm/Kconfig                                 |    1 +
 arch/arm/mach-s3c64xx/include/mach/entry-macro.S |    7 ++++---
 arch/arm/mach-s3c64xx/mach-anw6410.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-crag6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-hmt.c                 |    2 ++
 arch/arm/mach-s3c64xx/mach-mini6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-ncp.c                 |    2 ++
 arch/arm/mach-s3c64xx/mach-real6410.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-smartq5.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-smartq7.c             |    2 ++
 arch/arm/mach-s3c64xx/mach-smdk6400.c            |    2 ++
 arch/arm/mach-s3c64xx/mach-smdk6410.c            |    2 ++
 12 files changed, 25 insertions(+), 3 deletions(-)
Quoted 8 lines
I have tested this patch series on smdk6410 board (s3c64xx) using the following repositorty and branch
https://github.com/jamieiles/linux-2.6-ji.git branch: vic-dt
There is a crash while booting. Am I using the right tree and branch? The following is the boot log. Is there any other config option to be enabled?
Quoted 8 lines
Hmm, could you please try with the patch below applied?
Rob, I'm not sure if this is the best fix. The alternatives I can think of would be to always export irq_domain_simple_ops even if !CONFIG_OF_IRQ but not set .dt_translate or provide a generic irq_domain_null_ops.
Jamie
There is a simple fix:
(quoted diff) +1 -1
@@ -74,7 +76,7 @@ struct irq_domain {
 static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
                                             unsigned long hwirq)
 {
-       if (d->ops->to_irq)
+       if (d->ops && d->ops->to_irq)
                return d->ops->to_irq(d, hwirq);
        if (WARN_ON(hwirq < d->hwirq_base))
                return 0;

Quoted 1 line

I'll prepare a patch and send to tglx.

I did wonder about that, but that means we do it differently for ops->dt_translate (though that really should be there if it's required).

It works for me though!

Jamie

Jamie Iles

author

2011-11-04 01:10 UTC #19 lore raw

PATCH v4 8/13 ARM: spear: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for spear to help building multi platform kernels.

Cc Viresh Kumar <[email protected]>

Cc Rajeev Kumar <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                  |    1 +
 arch/arm/mach-spear3xx/include/mach/entry-macro.S |   27 ---------------
 arch/arm/mach-spear3xx/spear300_evb.c             |    2 +
 arch/arm/mach-spear3xx/spear310_evb.c             |    2 +
 arch/arm/mach-spear3xx/spear320_evb.c             |    2 +
 arch/arm/mach-spear6xx/include/mach/entry-macro.S |   36 ---------------------
 arch/arm/mach-spear6xx/spear600_evb.c             |    2 +
 7 files changed, 9 insertions(+), 63 deletions(-)

arch/arm/Kconfig +1 -0

index 32929ef..46d0319 100644
@@ -956,6 +956,7 @@ config PLAT_SPEAR
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
 	select HAVE_CLK
+	select MULTI_IRQ_HANDLER
 	help
 	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).

arch/arm/mach-spear3xx/include/mach/entry-macro.S +0 ~~-27~~

index 53da422..de3bb41 100644
@@ -11,35 +11,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
 		.macro	disable_fiq
 		.endm
 
-		.macro	get_irqnr_preamble, base, tmp
-		.endm
-
 		.macro	arch_ret_to_user, tmp1, tmp2
 		.endm
-
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\base, =VA_SPEAR3XX_ML1_VIC_BASE
-		ldr	\irqstat, [\base, #VIC_IRQ_STATUS]	@ get status
-		teq	\irqstat, #0
-		beq	1001f				@ this will set/reset
-							@ zero register
-		/*
-		 * Following code will find bit position of least significang
-		 * bit set in irqstat, using following equation
-		 * least significant bit set in n = (n & ~(n-1))
-		 */
-		sub	\tmp, \irqstat, #1		@ tmp = irqstat - 1
-		mvn	\tmp, \tmp			@ tmp = ~tmp
-		and	\irqstat, \irqstat, \tmp	@ irqstat &= tmp
-		/* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-		clz	\tmp, \irqstat			@ tmp = leading zeros
-		rsb	\irqnr, \tmp, #0x1F		@ irqnr = 32 - tmp - 1
-
-1001:		/* EQ will be set if no irqs pending */
-		.endm

arch/arm/mach-spear3xx/spear300_evb.c +2 -0

index a5ff98e..61068ba 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear3xx_map_io,
 	.init_irq	=	spear3xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear3xx_timer,
 	.init_machine	=	spear300_evb_init,
 MACHINE_END

arch/arm/mach-spear3xx/spear310_evb.c +2 -0

index 45d180d..7903abe 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear3xx_map_io,
 	.init_irq	=	spear3xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear3xx_timer,
 	.init_machine	=	spear310_evb_init,
 MACHINE_END

arch/arm/mach-spear3xx/spear320_evb.c +2 -0

index 2287984..e9751f9 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear3xx_map_io,
 	.init_irq	=	spear3xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear3xx_timer,
 	.init_machine	=	spear320_evb_init,
 MACHINE_END

arch/arm/mach-spear6xx/include/mach/entry-macro.S +0 ~~-36~~

index 8a0b0ed..d490a91 100644
@@ -11,44 +11,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
 		.macro	disable_fiq
 		.endm
 
-		.macro	get_irqnr_preamble, base, tmp
-		.endm
-
 		.macro	arch_ret_to_user, tmp1, tmp2
 		.endm
-
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
-		ldr	\irqstat, [\base, #VIC_IRQ_STATUS]	@ get status
-		mov	\irqnr, #0
-		teq	\irqstat, #0
-		bne	1001f
-		ldr	\base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
-		ldr	\irqstat, [\base, #VIC_IRQ_STATUS]	@ get status
-		teq	\irqstat, #0
-		beq	1002f				@ this will set/reset
-							@ zero register
-		mov	\irqnr, #32
-1001:
-		/*
-		 * Following code will find bit position of least significang
-		 * bit set in irqstat, using following equation
-		 * least significant bit set in n = (n & ~(n-1))
-		 */
-		sub	\tmp, \irqstat, #1		@ tmp = irqstat - 1
-		mvn	\tmp, \tmp			@ tmp = ~tmp
-		and	\irqstat, \irqstat, \tmp	@ irqstat &= tmp
-		/* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-		clz	\tmp, \irqstat			@ tmp = leading zeros
-
-		rsb	\tmp, \tmp, #0x1F		@ tmp = 32 - tmp - 1
-		add	\irqnr, \irqnr, \tmp
-
-1002:		/* EQ will be set if no irqs pending */
-		.endm

arch/arm/mach-spear6xx/spear600_evb.c +2 -0

index 8238fe3..ff139ed 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

@@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear6xx_map_io,
 	.init_irq	=	spear6xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear6xx_timer,
 	.init_machine	=	spear600_evb_init,
 MACHINE_END

Signature · 1 line

1.7.5.4

Viresh Kumar

2011-11-09 10:15 UTC #20 lore raw

PATCH v4 8/13 ARM: spear: convert to MULTI_IRQ_HANDLER

Quoted 190 lines · Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for spear to help building multi platform kernels.

Cc Viresh Kumar <[email protected]>

Cc Rajeev Kumar <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                  |    1 +
 arch/arm/mach-spear3xx/include/mach/entry-macro.S |   27 ---------------
 arch/arm/mach-spear3xx/spear300_evb.c             |    2 +
 arch/arm/mach-spear3xx/spear310_evb.c             |    2 +
 arch/arm/mach-spear3xx/spear320_evb.c             |    2 +
 arch/arm/mach-spear6xx/include/mach/entry-macro.S |   36 ---------------------
 arch/arm/mach-spear6xx/spear600_evb.c             |    2 +
 7 files changed, 9 insertions(+), 63 deletions(-)

arch/arm/Kconfig +1 -0

index 32929ef..46d0319 100644
@@ -956,6 +956,7 @@ config PLAT_SPEAR
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
 	select HAVE_CLK
+	select MULTI_IRQ_HANDLER
 	help
 	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).

arch/arm/mach-spear3xx/include/mach/entry-macro.S +0 ~~-27~~

index 53da422..de3bb41 100644
@@ -11,35 +11,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
 		.macro	disable_fiq
 		.endm
 
-		.macro	get_irqnr_preamble, base, tmp
-		.endm
-
 		.macro	arch_ret_to_user, tmp1, tmp2
 		.endm
-
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\base, =VA_SPEAR3XX_ML1_VIC_BASE
-		ldr	\irqstat, [\base, #VIC_IRQ_STATUS]	@ get status
-		teq	\irqstat, #0
-		beq	1001f				@ this will set/reset
-							@ zero register
-		/*
-		 * Following code will find bit position of least significang
-		 * bit set in irqstat, using following equation
-		 * least significant bit set in n = (n & ~(n-1))
-		 */
-		sub	\tmp, \irqstat, #1		@ tmp = irqstat - 1
-		mvn	\tmp, \tmp			@ tmp = ~tmp
-		and	\irqstat, \irqstat, \tmp	@ irqstat &= tmp
-		/* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-		clz	\tmp, \irqstat			@ tmp = leading zeros
-		rsb	\irqnr, \tmp, #0x1F		@ irqnr = 32 - tmp - 1
-
-1001:		/* EQ will be set if no irqs pending */
-		.endm

arch/arm/mach-spear3xx/spear300_evb.c +2 -0

index a5ff98e..61068ba 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear3xx_map_io,
 	.init_irq	=	spear3xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear3xx_timer,
 	.init_machine	=	spear300_evb_init,
 MACHINE_END

arch/arm/mach-spear3xx/spear310_evb.c +2 -0

index 45d180d..7903abe 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear3xx_map_io,
 	.init_irq	=	spear3xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear3xx_timer,
 	.init_machine	=	spear310_evb_init,
 MACHINE_END

arch/arm/mach-spear3xx/spear320_evb.c +2 -0

index 2287984..e9751f9 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear3xx_map_io,
 	.init_irq	=	spear3xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear3xx_timer,
 	.init_machine	=	spear320_evb_init,
 MACHINE_END

arch/arm/mach-spear6xx/include/mach/entry-macro.S +0 ~~-36~~

index 8a0b0ed..d490a91 100644
@@ -11,44 +11,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
 		.macro	disable_fiq
 		.endm
 
-		.macro	get_irqnr_preamble, base, tmp
-		.endm
-
 		.macro	arch_ret_to_user, tmp1, tmp2
 		.endm
-
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
-		ldr	\irqstat, [\base, #VIC_IRQ_STATUS]	@ get status
-		mov	\irqnr, #0
-		teq	\irqstat, #0
-		bne	1001f
-		ldr	\base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
-		ldr	\irqstat, [\base, #VIC_IRQ_STATUS]	@ get status
-		teq	\irqstat, #0
-		beq	1002f				@ this will set/reset
-							@ zero register
-		mov	\irqnr, #32
-1001:
-		/*
-		 * Following code will find bit position of least significang
-		 * bit set in irqstat, using following equation
-		 * least significant bit set in n = (n & ~(n-1))
-		 */
-		sub	\tmp, \irqstat, #1		@ tmp = irqstat - 1
-		mvn	\tmp, \tmp			@ tmp = ~tmp
-		and	\irqstat, \irqstat, \tmp	@ irqstat &= tmp
-		/* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-		clz	\tmp, \irqstat			@ tmp = leading zeros
-
-		rsb	\tmp, \tmp, #0x1F		@ tmp = 32 - tmp - 1
-		add	\irqnr, \irqnr, \tmp
-
-1002:		/* EQ will be set if no irqs pending */
-		.endm

arch/arm/mach-spear6xx/spear600_evb.c +1 -0

index 8238fe3..ff139ed 100644
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>

arch/arm/mach-spear6xx/spear600_evb.c MACHINE_START(SPEAR600, "ST-SPEAR600-EVB") · line 53

Quoted 7 lines

arch/arm/mach-spear6xx/spear600_evb.c +1 -0

@@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
 	.atag_offset	=	0x100,
 	.map_io		=	spear6xx_map_io,
 	.init_irq	=	spear6xx_init_irq,
+	.handle_irq	=	vic_handle_irq,
 	.timer		=	&spear6xx_timer,
 	.init_machine	=	spear600_evb_init,
 MACHINE_END

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Jamie Iles

author

2011-11-04 01:10 UTC #21 lore raw

PATCH v4 9/13 ARM: u300: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for u300 to help building multi platform kernels.

Cc Linus Walleij <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                              |    1 +
 arch/arm/mach-u300/include/mach/entry-macro.S |   24 ------------------------
 arch/arm/mach-u300/u300.c                     |    2 ++
 3 files changed, 3 insertions(+), 24 deletions(-)

arch/arm/Kconfig +1 -0

index 46d0319..bb62f38 100644
@@ -897,6 +897,7 @@ config ARCH_U300
 	select GENERIC_GPIO
 	select ARCH_REQUIRE_GPIOLIB
 	select NEED_MACH_MEMORY_H
+	select MULTI_IRQ_HANDLER
 	help
 	  Support for ST-Ericsson U300 series mobile platforms.

arch/arm/mach-u300/include/mach/entry-macro.S +0 ~~-24~~

index 20731ae..7181d6a 100644
@@ -8,33 +8,9 @@
  * Low-level IRQ helper macros for ST-Ericsson U300
  * Author: Linus Walleij <[email protected]>
  */
-#include <mach/hardware.h>
-#include <asm/hardware/vic.h>
 
 	.macro	disable_fiq
 	.endm
 
-	.macro  get_irqnr_preamble, base, tmp
-	.endm
-
 	.macro  arch_ret_to_user, tmp1, tmp2
 	.endm
-
-	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-	ldr	\base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
-	ldr	\irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
-	mov	\irqnr, #0
-	teq	\irqstat, #0
-	bne	1002f
-1001:	ldr	\base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
-	ldr	\irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
-	mov	\irqnr, #32
-	teq	\irqstat, #0
-	beq	1003f
-1002:	tst	\irqstat, #1
-	bne	1003f
-	add	\irqnr, \irqnr, #1
-	movs	\irqstat, \irqstat, lsr #1
-	bne	1002b
-1003:		/* EQ will be set if no irqs pending */
-	.endm

arch/arm/mach-u300/u300.c +2 -0

index 89422ee..4a4fd33 100644
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/memory.h>

@@ -49,6 +50,7 @@ MACHINE_START(U300, MACH_U300_STRING)
 	.atag_offset	= BOOT_PARAMS_OFFSET,
 	.map_io		= u300_map_io,
 	.init_irq	= u300_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &u300_timer,
 	.init_machine	= u300_init_machine,
 MACHINE_END

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:10 UTC #22 lore raw

PATCH v4 10/13 ARM: versatile: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for versatile to help building multi platform kernels.

Cc Russell King <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                   |    1 +
 arch/arm/mach-versatile/include/mach/entry-macro.S |   30 --------------------
 arch/arm/mach-versatile/versatile_ab.c             |    2 +
 arch/arm/mach-versatile/versatile_dt.c             |    2 +
 arch/arm/mach-versatile/versatile_pb.c             |    2 +
 5 files changed, 7 insertions(+), 30 deletions(-)

arch/arm/Kconfig +1 -0

index bb62f38..d1caaba 100644
@@ -294,6 +294,7 @@ config ARCH_VERSATILE
 	select PLAT_VERSATILE_CLCD
 	select PLAT_VERSATILE_FPGA_IRQ
 	select ARM_TIMER_SP804
+	select MULTI_IRQ_HANDLER
 	help
 	  This enables support for ARM Ltd Versatile board.

arch/arm/mach-versatile/include/mach/entry-macro.S +0 ~~-30~~

index e6f7c16..b6f0dbf 100644
@@ -7,39 +7,9 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#include <asm/hardware/vic.h>
 
 		.macro	disable_fiq
 		.endm
 
-		.macro  get_irqnr_preamble, base, tmp
-		ldr	\base, =IO_ADDRESS(VERSATILE_VIC_BASE)
-		.endm
-
 		.macro  arch_ret_to_user, tmp1, tmp2
 		.endm
-
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\irqstat, [\base, #VIC_IRQ_STATUS]	@ get masked status
-		mov	\irqnr, #0
-		teq	\irqstat, #0
-		beq	1003f
-
-1001:		tst	\irqstat, #15
-		bne	1002f
-		add	\irqnr, \irqnr, #4
-		movs	\irqstat, \irqstat, lsr #4
-		bne	1001b
-1002:		tst	\irqstat, #1
-		bne	1003f
-		add	\irqnr, \irqnr, #1
-		movs	\irqstat, \irqstat, lsr #1
-		bne	1002b
-1003:		/* EQ will be set if no irqs pending */
-
-@		clz	\irqnr, \irqstat
- at 1003:		/* EQ will be set if we reach MAXIRQNUM */
-		.endm
-

arch/arm/mach-versatile/versatile_ab.c +2 -0

index fda4866..c83a1f3 100644
@@ -27,6 +27,7 @@
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 
 #include <asm/mach/arch.h>

@@ -39,6 +40,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
 	.map_io		= versatile_map_io,
 	.init_early	= versatile_init_early,
 	.init_irq	= versatile_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &versatile_timer,
 	.init_machine	= versatile_init,
 MACHINE_END

arch/arm/mach-versatile/versatile_dt.c +2 -0

index 54e037c..f4d1e0f 100644
@@ -24,6 +24,7 @@
 #include <linux/init.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -45,6 +46,7 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
 	.map_io		= versatile_map_io,
 	.init_early	= versatile_init_early,
 	.init_irq	= versatile_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &versatile_timer,
 	.init_machine	= versatile_dt_init,
 	.dt_compat	= versatile_dt_match,

arch/arm/mach-versatile/versatile_pb.c +2 -0

index feaf9cb..4d31eeb 100644
@@ -28,6 +28,7 @@
 #include <linux/io.h>
 
 #include <mach/hardware.h>
+#include <asm/hardware/vic.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>

@@ -107,6 +108,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
 	.map_io		= versatile_map_io,
 	.init_early	= versatile_init_early,
 	.init_irq	= versatile_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &versatile_timer,
 	.init_machine	= versatile_pb_init,
 MACHINE_END

Signature · 1 line

1.7.5.4

Marc Zyngier

2011-11-09 10:25 UTC #23 lore raw

PATCH v4 10/13 ARM: versatile: convert to MULTI_IRQ_HANDLER

Quoted 5 lines · Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for versatile to help building multi platform kernels.
Cc Russell King <[email protected]>
Signed-off-by Jamie Iles <[email protected]>

Tested-by Marc Zyngier <[email protected]>

Signature · 1 line

Jazz is not dead. It just smells funny...

Jamie Iles

author

2011-11-04 01:10 UTC #24 lore raw

PATCH v4 11/13 ARM: samsung: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for samsung to help building multi platform kernels.

Cc Kukjin Kim <[email protected]>

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                 |    3 ++
 arch/arm/mach-s5p64x0/include/mach/entry-macro.S |    7 ++--
 arch/arm/mach-s5p64x0/mach-smdk6440.c            |    2 +
 arch/arm/mach-s5p64x0/mach-smdk6450.c            |    2 +
 arch/arm/mach-s5pc100/include/mach/entry-macro.S |   25 ---------------
 arch/arm/mach-s5pc100/mach-smdkc100.c            |    2 +
 arch/arm/mach-s5pv210/include/mach/entry-macro.S |   37 ----------------------
 arch/arm/mach-s5pv210/mach-aquila.c              |    2 +
 arch/arm/mach-s5pv210/mach-goni.c                |    2 +
 arch/arm/mach-s5pv210/mach-smdkc110.c            |    2 +
 arch/arm/mach-s5pv210/mach-smdkv210.c            |    2 +
 arch/arm/mach-s5pv210/mach-torbreck.c            |    2 +
 12 files changed, 23 insertions(+), 65 deletions(-)

arch/arm/Kconfig +3 -0

index d1caaba..76a379c 100644
@@ -804,6 +804,7 @@ config ARCH_S5P64X0
 	select HAVE_SCHED_CLOCK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C_RTC if RTC_CLASS
+	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 	  SMDK6450.

@@ -819,6 +820,7 @@ config ARCH_S5PC100
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C_RTC if RTC_CLASS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S5PC100 series based systems

@@ -839,6 +841,7 @@ config ARCH_S5PV210
 	select HAVE_S3C_RTC if RTC_CLASS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select NEED_MACH_MEMORY_H
+	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S5PV210/S5PC110 series based systems

arch/arm/mach-s5p64x0/include/mach/entry-macro.S +4 -3

index 10b62b4..fbb246d 100644
@@ -10,7 +10,8 @@
  * published by the Free Software Foundation.
 */
 
-#include <mach/map.h>
-#include <plat/irqs.h>
+		.macro  disable_fiq
+		.endm
 
-#include <asm/entry-macro-vic2.S>
+		.macro  arch_ret_to_user, tmp1, tmp2
+		.endm

arch/arm/mach-s5p64x0/mach-smdk6440.c +2 -0

index 88857f5..a69a5de 100644
@@ -24,6 +24,7 @@
 #include <linux/gpio.h>
 #include <linux/pwm_backlight.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/irq.h>

@@ -168,6 +169,7 @@ MACHINE_START(SMDK6440, "SMDK6440")
 	.atag_offset	= 0x100,
 
 	.init_irq	= s5p6440_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smdk6440_map_io,
 	.init_machine	= smdk6440_machine_init,
 	.timer		= &s5p_timer,

arch/arm/mach-s5p64x0/mach-smdk6450.c +2 -0

index e1b277b..40ee26f 100644
@@ -24,6 +24,7 @@
 #include <linux/gpio.h>
 #include <linux/pwm_backlight.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/irq.h>

@@ -187,6 +188,7 @@ MACHINE_START(SMDK6450, "SMDK6450")
 	.atag_offset	= 0x100,
 
 	.init_irq	= s5p6450_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smdk6450_map_io,
 	.init_machine	= smdk6450_machine_init,
 	.timer		= &s5p_timer,

arch/arm/mach-s5pc100/include/mach/entry-macro.S +0 ~~-25~~

index ba76af0..b8c242e 100644
@@ -12,39 +12,14 @@
  * warranty of any kind, whether express or implied.
 */
 
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-
 	.macro	disable_fiq
 	.endm
 
 	.macro	get_irqnr_preamble, base, tmp
-	ldr	\base, =VA_VIC0
 	.endm
 
 	.macro	arch_ret_to_user, tmp1, tmp2
 	.endm
 
 	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-	@ check the vic0
-	mov	\irqnr, # S5P_IRQ_OFFSET + 31
-	ldr	\irqstat, [ \base, # VIC_IRQ_STATUS ]
-	teq	\irqstat, #0
-
-	@ otherwise try vic1
-	addeq	\tmp, \base, #(VA_VIC1 - VA_VIC0)
-	addeq	\irqnr, \irqnr, #32
-	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-	teqeq	\irqstat, #0
-
-	@ otherwise try vic2
-	addeq	\tmp, \base, #(VA_VIC2 - VA_VIC0)
-	addeq	\irqnr, \irqnr, #32
-	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-	teqeq	\irqstat, #0
-
-	clzne	\irqstat, \irqstat
-	subne	\irqnr, \irqnr, \irqstat
 	.endm

arch/arm/mach-s5pc100/mach-smdkc100.c +2 -0

index 26f5c91..93ebe3a 100644
@@ -25,6 +25,7 @@
 #include <linux/input.h>
 #include <linux/pwm_backlight.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>

@@ -250,6 +251,7 @@ MACHINE_START(SMDKC100, "SMDKC100")
 	/* Maintainer: Byungho Min <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s5pc100_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smdkc100_map_io,
 	.init_machine	= smdkc100_machine_init,
 	.timer		= &s3c24xx_timer,

arch/arm/mach-s5pv210/include/mach/entry-macro.S +0 ~~-37~~

index 3aa41ac..bebca1b 100644
@@ -10,45 +10,8 @@
  * published by the Free Software Foundation.
 */
 
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-
 	.macro	disable_fiq
 	.endm
 
-	.macro	get_irqnr_preamble, base, tmp
-	ldr	\base, =VA_VIC0
-	.endm
-
 	.macro	arch_ret_to_user, tmp1, tmp2
 	.endm
-
-	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-	@ check the vic0
-	mov	\irqnr, # S5P_IRQ_OFFSET + 31
-	ldr	\irqstat, [ \base, # VIC_IRQ_STATUS ]
-	teq	\irqstat, #0
-
-	@ otherwise try vic1
-	addeq	\tmp, \base, #(VA_VIC1 - VA_VIC0)
-	addeq	\irqnr, \irqnr, #32
-	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-	teqeq	\irqstat, #0
-
-	@ otherwise try vic2
-	addeq	\tmp, \base, #(VA_VIC2 - VA_VIC0)
-	addeq	\irqnr, \irqnr, #32
-	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-	teqeq	\irqstat, #0
-
-	@ otherwise try vic3
-	addeq	\tmp, \base, #(VA_VIC3 - VA_VIC0)
-	addeq	\irqnr, \irqnr, #32
-	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-	teqeq	\irqstat, #0
-
-	clzne	\irqstat, \irqstat
-	subne	\irqnr, \irqnr, \irqstat
-	.endm

arch/arm/mach-s5pv210/mach-aquila.c +2 -0

index 5811a96..71ca956 100644
@@ -22,6 +22,7 @@
 #include <linux/input.h>
 #include <linux/gpio.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>

@@ -680,6 +681,7 @@ MACHINE_START(AQUILA, "Aquila")
 	   Kyungmin Park <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s5pv210_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= aquila_map_io,
 	.init_machine	= aquila_machine_init,
 	.timer		= &s5p_timer,

arch/arm/mach-s5pv210/mach-goni.c +2 -0

index 061cc7e..b22ad69 100644
@@ -27,6 +27,7 @@
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>

@@ -899,6 +900,7 @@ MACHINE_START(GONI, "GONI")
 	/* Maintainers: Kyungmin Park <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s5pv210_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= goni_map_io,
 	.init_machine	= goni_machine_init,
 	.timer		= &s5p_timer,

arch/arm/mach-s5pv210/mach-smdkc110.c +2 -0

index f7266bb..c2531ff 100644
@@ -15,6 +15,7 @@
 #include <linux/i2c.h>
 #include <linux/sysdev.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>

@@ -138,6 +139,7 @@ MACHINE_START(SMDKC110, "SMDKC110")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s5pv210_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smdkc110_map_io,
 	.init_machine	= smdkc110_machine_init,
 	.timer		= &s5p_timer,

arch/arm/mach-s5pv210/mach-smdkv210.c +2 -0

index a9106c3..4ca77c4 100644
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/pwm_backlight.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>

@@ -315,6 +316,7 @@ MACHINE_START(SMDKV210, "SMDKV210")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s5pv210_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= smdkv210_map_io,
 	.init_machine	= smdkv210_machine_init,
 	.timer		= &s5p_timer,

arch/arm/mach-s5pv210/mach-torbreck.c +2 -0

index 97cc066..df70fcb 100644
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>

@@ -127,6 +128,7 @@ MACHINE_START(TORBRECK, "TORBRECK")
 	/* Maintainer: Hyunchul Ko <[email protected]> */
 	.atag_offset	= 0x100,
 	.init_irq	= s5pv210_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.map_io		= torbreck_map_io,
 	.init_machine	= torbreck_machine_init,
 	.timer		= &s5p_timer,

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:10 UTC #25 lore raw

PATCH v4 12/13 ARM: picoxcell: convert to MULTI_IRQ_HANDLER

In reply to Jamie Iles

Now that there is a generic IRQ handler for multiple VIC devices use it for picoxcell to help building multi platform kernels.

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                                   |    1 +
 arch/arm/mach-picoxcell/common.c                   |    9 ++++-----
 arch/arm/mach-picoxcell/include/mach/entry-macro.S |   11 ++++-------
 3 files changed, 9 insertions(+), 12 deletions(-)

arch/arm/Kconfig +1 -0

index 76a379c..43bb172 100644
@@ -651,6 +651,7 @@ config ARCH_PICOXCELL
 	select GENERIC_GPIO
 	select HAVE_SCHED_CLOCK
 	select HAVE_TCM
+	select MULTI_IRQ_HANDLER
 	select NO_IOPORT
 	select USE_OF
 	help

arch/arm/mach-picoxcell/common.c +4 -5

index 34d0834..ad871bd 100644
@@ -11,6 +11,7 @@
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <linux/of_platform.h>
 
 #include <asm/mach/arch.h>

@@ -33,22 +34,20 @@ static const char *picoxcell_dt_match[] = {
 };
 
 static const struct of_device_id vic_of_match[] __initconst = {
-	{ .compatible = "arm,pl192-vic" },
+	{ .compatible = "arm,pl192-vic", .data = vic_of_init, },
 	{ /* Sentinel */ }
 };
 
 static void __init picoxcell_init_irq(void)
 {
-	vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0);
-	vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0);
-	irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0);
-	irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32);
+	of_irq_init(vic_of_match);
 }
 
 DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
 	.map_io		= picoxcell_map_io,
 	.nr_irqs	= ARCH_NR_IRQS,
 	.init_irq	= picoxcell_init_irq,
+	.handle_irq	= vic_handle_irq,
 	.timer		= &picoxcell_timer,
 	.init_machine	= picoxcell_init_machine,
 	.dt_compat	= picoxcell_dt_match,

arch/arm/mach-picoxcell/include/mach/entry-macro.S +4 -7

index a6b09f7..9b505ac 100644
@@ -9,11 +9,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-#include <mach/map.h>
+	.macro  disable_fiq
+	.endm
 
-#define VA_VIC0		IO_ADDRESS(PICOXCELL_VIC0_BASE)
-#define VA_VIC1		IO_ADDRESS(PICOXCELL_VIC1_BASE)
-
-#include <asm/entry-macro-vic2.S>
+	.macro  arch_ret_to_user, tmp1, tmp2
+	.endm

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-04 01:10 UTC #26 lore raw

PATCH v4 13/13 ARM: VIC: remove non MULTI_IRQ_HANDLER support

In reply to Jamie Iles

Now that all platforms are converted to MULTI_IRQ_HANDLER, remove the legacy support.

Signed-off-by Jamie Iles <[email protected]>

---
 arch/arm/Kconfig                        |   11 ------
 arch/arm/common/Kconfig                 |    1 +
 arch/arm/common/vic.c                   |    2 -
 arch/arm/include/asm/entry-macro-vic2.S |   57 -------------------------------
 4 files changed, 1 insertions(+), 70 deletions(-)
 delete mode 100644 arch/arm/include/asm/entry-macro-vic2.S

arch/arm/Kconfig +0 ~~-11~~

index 43bb172..fe6b052 100644
@@ -294,7 +294,6 @@ config ARCH_VERSATILE
 	select PLAT_VERSATILE_CLCD
 	select PLAT_VERSATILE_FPGA_IRQ
 	select ARM_TIMER_SP804
-	select MULTI_IRQ_HANDLER
 	help
 	  This enables support for ARM Ltd Versatile board.

@@ -410,7 +409,6 @@ config ARCH_EP93XX
 	select ARCH_HAS_HOLES_MEMORYMODEL
 	select ARCH_USES_GETTIMEOFFSET
 	select NEED_MACH_MEMORY_H
-	select MULTI_IRQ_HANDLER
 	help
 	  This enables support for the Cirrus EP93xx series of CPUs.

@@ -452,7 +450,6 @@ config ARCH_NETX
 	select CPU_ARM926T
 	select ARM_VIC
 	select GENERIC_CLOCKEVENTS
-	select MULTI_IRQ_HANDLER
 	help
 	  This enables support for systems based on the Hilscher NetX Soc

@@ -651,7 +648,6 @@ config ARCH_PICOXCELL
 	select GENERIC_GPIO
 	select HAVE_SCHED_CLOCK
 	select HAVE_TCM
-	select MULTI_IRQ_HANDLER
 	select NO_IOPORT
 	select USE_OF
 	help

@@ -789,7 +785,6 @@ config ARCH_S3C64XX
 	select SAMSUNG_GPIOLIB_4BIT
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
-	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S3C64XX series based systems

@@ -805,7 +800,6 @@ config ARCH_S5P64X0
 	select HAVE_SCHED_CLOCK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C_RTC if RTC_CLASS
-	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 	  SMDK6450.

@@ -821,7 +815,6 @@ config ARCH_S5PC100
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C_RTC if RTC_CLASS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
-	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S5PC100 series based systems

@@ -842,7 +835,6 @@ config ARCH_S5PV210
 	select HAVE_S3C_RTC if RTC_CLASS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select NEED_MACH_MEMORY_H
-	select MULTI_IRQ_HANDLER
 	help
 	  Samsung S5PV210/S5PC110 series based systems

@@ -902,7 +894,6 @@ config ARCH_U300
 	select GENERIC_GPIO
 	select ARCH_REQUIRE_GPIOLIB
 	select NEED_MACH_MEMORY_H
-	select MULTI_IRQ_HANDLER
 	help
 	  Support for ST-Ericsson U300 series mobile platforms.

@@ -925,7 +916,6 @@ config ARCH_NOMADIK
 	select CLKDEV_LOOKUP
 	select GENERIC_CLOCKEVENTS
 	select ARCH_REQUIRE_GPIOLIB
-	select MULTI_IRQ_HANDLER
 	help
 	  Support for the Nomadik platform by ST-Ericsson

@@ -962,7 +952,6 @@ config PLAT_SPEAR
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
 	select HAVE_CLK
-	select MULTI_IRQ_HANDLER
 	help
 	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).

arch/arm/common/Kconfig +1 -0

index e91ee7d..e086d1d 100644
@@ -4,6 +4,7 @@ config ARM_GIC
 
 config ARM_VIC
 	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
 	bool
 
 config ARM_VIC_NR

arch/arm/common/vic.c +0 -2

index a82e3e0..8c5f4b0 100644
@@ -429,7 +429,6 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
 }
 #endif /* CONFIG OF */
 
-#ifdef CONFIG_MULTI_IRQ_HANDLER
 /*
  * Handle each interrupt in a single VIC.  Returns non-zero if we've
  * handled at least one interrupt.  This does a single read of the

@@ -464,4 +463,3 @@ asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
 			handled |= handle_one_vic(&vic_devices[i], regs);
 	} while (handled);
 }
-#endif /* CONFIG_MULTI_IRQ_HANDLER */

arch/arm/include/asm/entry-macro-vic2.S deleted +0 ~~-57~~

57 lines not on this page · raw message

Signature · 1 line

1.7.5.4

Jamie Iles

author

2011-11-09 10:01 UTC #27 lore raw

v4 cover VIC DT binding and MULTI_IRQ_HANDLER

In reply to Jamie Iles

Quoted 9 lines · Jamie Iles

Since the last revision I've updated the handling loop as suggested by Linus and Russell, added a patch for picoxcell and added a final patch to remove the non MULTI_IRQ_HANDLER support for VIC. The final patch assumes that all VIC users will be converted to MULTI_IRQ_HANDLER which I would hope would be the case but this could be dropped if not.
I've also included Marc's patch for reference as the mach patches are dependent on it.

Quoted 13 lines

Jamie Iles (12):
ARM: vic: device tree binding
ARM: vic: MULTI_IRQ_HANDLER handler
ARM: ep93xx: convert to MULTI_IRQ_HANDLER
ARM: netx: convert to MULTI_IRQ_HANDLER
ARM: nomadik: convert to MULTI_IRQ_HANDLER
ARM: s3c64xx: convert to MULTI_IRQ_HANDLER
ARM: spear: convert to MULTI_IRQ_HANDLER
ARM: u300: convert to MULTI_IRQ_HANDLER
ARM: versatile: convert to MULTI_IRQ_HANDLER
ARM: samsung: convert to MULTI_IRQ_HANDLER
ARM: picoxcell: convert to MULTI_IRQ_HANDLER
ARM: VIC: remove non MULTI_IRQ_HANDLER support

Marc has kindly offered to take these with his GIC patches so I'd like to send him a pull request tomorrow. Some Acked-by/Tested-by's for the other platforms would be much appreciated!

Thanks,

Jamie