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3.2-rc1 boot broken on OMAP1 / Amstrad E3

PATCH New Aaro Koskinen 4 participants 15 messages Nov 9, 2011 – Nov 14, 2011

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Aaro Koskinen

author maintainer
#0 lore raw

Hi,

Has anyone managed to boot 3.2-rc1 on OMAP1?

On Amstrad E3 it seems to hang at very early on the boot (below output is with earlyprintk enabled):

Uncompressing Linux... done, booting the kernel.

[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Linux version 3.2.0-rc1-e3 (aaro@dell) (gcc version 4.6.1 (GCC) ) #1 PREEMPT Thu Nov 10 00:23:15 EET 2011
[    0.000000] CPU: ARM925T [54029252] revision 2 (ARMv4T), cr=0000317f
[    0.000000] CPU: VIVT data cache, VIVT instruction cache
[    0.000000] Machine: Amstrad E3 (Delta)
[    0.000000] bootconsole [earlycon0] enabled
[    0.000000] Memory policy: ECC disabled, Data cache writethrough
[    0.000000] OMAP1510
[    0.000000]  revision 2 handled as 15xx id: bc058c9b93111a16

Then it prints just some random garbage and hangs.

A.

reviewer
#1 lore raw
Quoted 20 lines · Aaro Koskinen

Hi,

Has anyone managed to boot 3.2-rc1 on OMAP1?

On Amstrad E3 it seems to hang at very early on the boot (below output is
with earlyprintk enabled):

Uncompressing Linux... done, booting the kernel.

[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Linux version 3.2.0-rc1-e3 (aaro at dell) (gcc version
4.6.1 (GCC) ) #1 PREEMPT Thu Nov 10 00:23:15 EET 2011
[    0.000000] CPU: ARM925T [54029252] revision 2 (ARMv4T), cr=0000317f
[    0.000000] CPU: VIVT data cache, VIVT instruction cache
[    0.000000] Machine: Amstrad E3 (Delta)
[    0.000000] bootconsole [earlycon0] enabled
[    0.000000] Memory policy: ECC disabled, Data cache writethrough
[    0.000000] OMAP1510
[    0.000000]  revision 2 handled as 15xx id: bc058c9b93111a16
Quoted 1 line

Then it prints just some random garbage and hangs.

Hmm looks like it needs a custom map_io, posting a patch just a sec..

Tony

reviewer
#2 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

Commit 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 (ARM: OMAP1: Use generic map_io, init_early and init_irq) changed omap1 to use generic map_io.

Looks like I missed one board though. Fix this by adding a custom map_io for Amstrad E3.

---
Untested, does this help?

arch/arm/mach-omap1/board-ams-delta.c +7 -3
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
 	omap_cfg_reg(J19_1610_CAM_D6);
 	omap_cfg_reg(J18_1610_CAM_D7);
 
-	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-
 	omap_board_config = ams_delta_config;
 	omap_board_config_size = ARRAY_SIZE(ams_delta_config);
 	omap_serial_init();
@@ -373,10 +371,16 @@ static int __init ams_delta_modem_init(void)
 }
 arch_initcall(ams_delta_modem_init);
 
+static void __init ams_delta_map_io(void)
+{
+	omap15xx_map_io();
+	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
+}
+
 MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
 	/* Maintainer: Jonathan McDowell <[email protected]> */
 	.atag_offset	= 0x100,
-	.map_io		= omap15xx_map_io,
+	.map_io		= ams_delta_map_io,
 	.init_early	= omap1_init_early,
 	.reserve	= omap_reserve,
 	.init_irq	= omap1_init_irq,
#3 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

Quoted 14 lines · Tony Lindgren

Commit 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 (ARM: OMAP1: Use generic map_io, init_early and init_irq) changed omap1 to use generic map_io.

Looks like I missed one board though. Fix this by adding a custom map_io for Amstrad E3.

---
Untested, does this help?

arch/arm/mach-omap1/board-ams-delta.c static void __init ams_delta_init(void) · line 306

Quoted 5 lines
arch/arm/mach-omap1/board-ams-delta.c +0 -2
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
 	omap_cfg_reg(J19_1610_CAM_D6);
 	omap_cfg_reg(J18_1610_CAM_D7);
 
-	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-

This is definitely wrong. Using iotable_init() after map_io has returned has (and remains) a serious bug - doing so may _appear_ to work but as it doesn't obtain its memory from the standard kernel memory allocators, it will lead to duplicate usage of that memory.

author maintainer
#4 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

Hi,

Quoted 18 lines · Russell King - ARM Linux
Quoted 17 lines · Tony Lindgren

Commit 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 (ARM: OMAP1: Use generic map_io, init_early and init_irq) changed omap1 to use generic map_io.

Looks like I missed one board though. Fix this by adding a custom map_io for Amstrad E3.

---
Untested, does this help?

arch/arm/mach-omap1/board-ams-delta.c +0 -0
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
 	omap_cfg_reg(J19_1610_CAM_D6);
 	omap_cfg_reg(J18_1610_CAM_D7);
 
Quoted 7 lines

arch/arm/mach-omap1/board-ams-delta.c static void __init ams_delta_init(void) · line 306

Quoted 2 lines
arch/arm/mach-omap1/board-ams-delta.c +0 -2
-	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-

This is definitely wrong. Using iotable_init() after map_io has returned has (and remains) a serious bug - doing so may _appear_ to work but as it doesn't obtain its memory from the standard kernel memory allocators, it will lead to duplicate usage of that memory.

Also, the patch did not help. It still hangs like before.

A.

reviewer
#5 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

Quoted 33 lines · Aaro Koskinen

Hi,

Quoted 19 lines · Russell King - ARM Linux
Quoted 18 lines · Tony Lindgren

Commit 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 (ARM: OMAP1: Use generic
map_io, init_early and init_irq) changed omap1 to use generic map_io.

Looks like I missed one board though. Fix this by adding a custom map_io for Amstrad E3.

---
Untested, does this help?

arch/arm/mach-omap1/board-ams-delta.c +0 -0
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
 	omap_cfg_reg(J19_1610_CAM_D6);
 	omap_cfg_reg(J18_1610_CAM_D7);
 
Quoted 10 lines

arch/arm/mach-omap1/board-ams-delta.c static void __init ams_delta_init(void) · line 306

Quoted 2 lines
arch/arm/mach-omap1/board-ams-delta.c +0 -2
-	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-

This is definitely wrong. Using iotable_init() after map_io has returned
has (and remains) a serious bug - doing so may _appear_ to work but as it
doesn't obtain its memory from the standard kernel memory allocators, it
will lead to duplicate usage of that memory.

Quoted 1 line

Also, the patch did not help. It still hangs like before.

Hmm that patch is needed for sure but sounds like there's also something else wrong.. Can you try to git bisect it?

Tony

author maintainer
#6 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

Hi,

Quoted 32 lines · Tony Lindgren
Quoted 31 lines · Aaro Koskinen
Quoted 29 lines · Russell King - ARM Linux
Quoted 15 lines · Tony Lindgren

Commit 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 (ARM: OMAP1: Use generic
map_io, init_early and init_irq) changed omap1 to use generic map_io.

Looks like I missed one board though. Fix this by adding a custom map_io for Amstrad E3.

---
Untested, does this help?

arch/arm/mach-omap1/board-ams-delta.c static void __init ams_delta_init(void) · line 306

Quoted 5 lines
arch/arm/mach-omap1/board-ams-delta.c +0 -2
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
 	omap_cfg_reg(J19_1610_CAM_D6);
 	omap_cfg_reg(J18_1610_CAM_D7);
 
-	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-

This is definitely wrong. Using iotable_init() after map_io has returned
has (and remains) a serious bug - doing so may _appear_ to work but as it
doesn't obtain its memory from the standard kernel memory allocators, it
will lead to duplicate usage of that memory.

Quoted 4 lines
Quoted 1 line

Also, the patch did not help. It still hangs like before.

Hmm that patch is needed for sure but sounds like there's also something else wrong.. Can you try to git bisect it?

Ok, I'll try bisecting tomorrow.

A.

#7 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

Quoted 36 lines · Aaro Koskinen

Hi,

Quoted 33 lines · Tony Lindgren
Quoted 32 lines · Aaro Koskinen
Quoted 30 lines · Russell King - ARM Linux
Quoted 16 lines · Tony Lindgren

Commit 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 (ARM: OMAP1: Use generic
map_io, init_early and init_irq) changed omap1 to use generic map_io.

Looks like I missed one board though. Fix this by adding a custom map_io for Amstrad E3.

---
Untested, does this help?

arch/arm/mach-omap1/board-ams-delta.c static void __init ams_delta_init(void) · line 306

Quoted 5 lines
arch/arm/mach-omap1/board-ams-delta.c +0 -2
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
 	omap_cfg_reg(J19_1610_CAM_D6);
 	omap_cfg_reg(J18_1610_CAM_D7);
 
-	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-

This is definitely wrong. Using iotable_init() after map_io has returned
has (and remains) a serious bug - doing so may _appear_ to work but as it
doesn't obtain its memory from the standard kernel memory allocators, it
will lead to duplicate usage of that memory.

Quoted 6 lines
Quoted 4 lines
Quoted 1 line

Also, the patch did not help. It still hangs like before.

Hmm that patch is needed for sure but sounds like there's also something else wrong.. Can you try to git bisect it?

Ok, I'll try bisecting tomorrow.

Hi Aaro,
Please let me know if you think I could help, or I'll wait for your findings, to avoid duplicating efforts.

Thanks,
Janusz

author maintainer
#8 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

In reply to Tony Lindgren

Hi,

Quoted 32 lines · Tony Lindgren
Quoted 31 lines · Aaro Koskinen
Quoted 29 lines · Russell King - ARM Linux
Quoted 15 lines · Tony Lindgren

Commit 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 (ARM: OMAP1: Use generic
map_io, init_early and init_irq) changed omap1 to use generic map_io.

Looks like I missed one board though. Fix this by adding a custom map_io for Amstrad E3.

---
Untested, does this help?

arch/arm/mach-omap1/board-ams-delta.c static void __init ams_delta_init(void) · line 306

Quoted 5 lines
arch/arm/mach-omap1/board-ams-delta.c +0 -2
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
 	omap_cfg_reg(J19_1610_CAM_D6);
 	omap_cfg_reg(J18_1610_CAM_D7);
 
-	iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-

This is definitely wrong. Using iotable_init() after map_io has returned
has (and remains) a serious bug - doing so may _appear_ to work but as it
doesn't obtain its memory from the standard kernel memory allocators, it
will lead to duplicate usage of that memory.

Quoted 4 lines
Quoted 1 line

Also, the patch did not help. It still hangs like before.

Hmm that patch is needed for sure but sounds like there's also something else wrong.. Can you try to git bisect it?

I found it impossible to bisect, but there are two issues I found:

1) earlyconsole turns into garbage in omap1_clk_init() unless I do the following:

arch/arm/mach-omap1/clock_data.c +0 -8
index 92400b9..b9ce2ad 100644
@@ -774,14 +774,6 @@ int __init omap1_clk_init(void)
  	int crystal_type = 0; /* Default 12 MHz */
  	u32 reg, cpu_mask;
 
-#ifdef CONFIG_DEBUG_LL
-	/*
-	 * Resets some clocks that may be left on from bootloader,
-	 * but leaves serial clocks on.
-	 */
-	omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
-#endif
-
  	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
  	reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
  	omap_writew(reg, SOFT_REQ_REG);

2) By using the above hack, I could see the actual crash:

Uncompressing Linux... done, booting the kernel.

[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Linux version 3.2.0-rc1-e3 (aaro at dell) (gcc version 4.6.1 (GCC) ) #9 PREEMPT Thu Nov 10 23:48:23 EET 2011
[    0.000000] CPU: ARM925T [54029252] revision 2 (ARMv4T), cr=0000317f
[    0.000000] CPU: VIVT data cache, VIVT instruction cache
[    0.000000] Machine: Amstrad E3 (Delta)
[    0.000000] bootconsole [earlycon0] enabled
[    0.000000] Memory policy: ECC disabled, Data cache writethrough
[    0.000000] OMAP1510
[    0.000000]  revision 2 handled as 15xx id: bc058c9b93111a16
[    0.000000] Clocks: ARM_SYSST: 0x1000 DPLL_CTL: 0x2cb3 ARM_CKCTL: 0x250e
[    0.000000] ------------[ cut here ]------------
[    0.000000] kernel BUG at arch/arm/plat-omap/sram.c:226!
[    0.000000] Internal error: Oops - undefined instruction: 0 [#1] PREEMPT
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Not tainted  (3.2.0-rc1-e3 #9)
[    0.000000] PC is at omap_sram_reprogram_clock+0x28/0x30
[    0.000000] LR is@omap1_select_table_rate+0x88/0xb4
[    0.000000] pc : [<c001b0c4>]    lr : [<c0019f54>]    psr: 600000d3
[    0.000000] sp : c035bf10  ip : c035bf20  fp : c035bf1c
[    0.000000] r10: c035bfd4  r9 : 54029252  r8 : c03f8120
[    0.000000] r7 : c0362b50  r6 : 00b71b00  r5 : c03873cc  r4 : c0362b40
[    0.000000] r3 : 00000000  r2 : c0362b40  r1 : 0000010a  r0 : 00002cb0
[    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 0000317f  Table: 10004000  DAC: 00000017
[    0.000000] Process swapper (pid: 0, stack limit = 0xc035a270)
[    0.000000] Stack: (0xc035bf10 to 0xc035c000)
[    0.000000] bf00:                                     c035bf3c c035bf20 c0019f54 c001b0ac
[    0.000000] bf20: 00001000 00002cb3 00000004 c035ed4c c035bf74 c035bf40 c033ea24 c0019edc
[    0.000000] bf40: c02f526c 00000002 00000015 bc058c9b 93111a16 c035335c 02000000 c035ed4c
[    0.000000] bf60: c035ed4c c03f8120 c035bf84 c035bf78 c00194c4 c033e8ec c035bfc4 c035bf88
[    0.000000] bf80: c033bc24 c00194a0 c035bf90 c035bf98 00000000 00000000 00000000 00000000
[    0.000000] bfa0: 00000001 00000000 c0354678 c035ece4 10004000 103532f4 c035bff4 c035bfc8
[    0.000000] bfc0: c0338574 c033b598 00000000 00000000 00000000 c035467c 0000317d c035c03c
[    0.000000] bfe0: c0354678 c035ece4 00000000 c035bff8 10008040 c0338508 00000000 00000000
[    0.000000] Backtrace:
[    0.000000] [<c001b09c>] (omap_sram_reprogram_clock+0x0/0x30) from [<c0019f54>] (omap1_select_table_rate+0x88/0xb4)
[    0.000000] [<c0019ecc>] (omap1_select_table_rate+0x0/0xb4) from [<c033ea24>] (omap1_clk_init+0x148/0x334)
[    0.000000]  r7:c035ed4c r6:00000004 r5:00002cb3 r4:00001000
[    0.000000] [<c033e8dc>] (omap1_clk_init+0x0/0x334) from [<c00194c4>] (omap1_init_early+0x34/0x48)
[    0.000000]  r8:c03f8120 r7:c035ed4c r6:c035ed4c r5:02000000 r4:c035335c
[    0.000000] [<c0019490>] (omap1_init_early+0x0/0x48) from [<c033bc24>] (setup_arch+0x69c/0x79c)
[    0.000000] [<c033b588>] (setup_arch+0x0/0x79c) from [<c0338574>] (start_kernel+0x7c/0x2f4)
[    0.000000] [<c03384f8>] (start_kernel+0x0/0x2f4) from [<10008040>] (0x10008040)
[    0.000000]  r7:c035ece4 r6:c0354678 r5:c035c03c r4:0000317d
[    0.000000] Code: 0a000002 e1a0e00f e12fff13 e89da800 (e7f001f2)
[    0.000000] ---[ end trace 1b75b31a2719ed1c ]---

The BUG_ON() in omap_sram_reprogram_clock() triggers, because it's called before omap_sram_init(). If I comment out the code in omap_sram_reprogram_clock(), the board boots up.

A.

reviewer
#9 lore raw

PATCH 1/1 ARM: OMAP: Fix map_io for Amstrad E3

Quoted 7 lines · Aaro Koskinen
arch/arm/mach-omap1/clock_data.c +0 -1
@@ -774,14 +774,6 @@ int __init omap1_clk_init(void)
 	int crystal_type = 0; /* Default 12 MHz */
 	u32 reg, cpu_mask;
 
-#ifdef CONFIG_DEBUG_LL

arch/arm/mach-omap1/clock_data.c int __init omap1_clk_init(void) · line 779

Quoted 10 lines
arch/arm/mach-omap1/clock_data.c +0 -7
-	/*
-	 * Resets some clocks that may be left on from bootloader,
-	 * but leaves serial clocks on.
-	 */
-	omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
-#endif
-
 	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
 	reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
 	omap_writew(reg, SOFT_REQ_REG);

Hmm that should keep the serial clocks on. What other bit(s) need to be on in MOD_CONF_CTRL_0 for you in addition to the serial bits?

Quoted 50 lines

2) By using the above hack, I could see the actual crash:

Uncompressing Linux... done, booting the kernel.

[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Linux version 3.2.0-rc1-e3 (aaro at dell) (gcc version 4.6.1 (GCC) ) #9 PREEMPT Thu Nov 10 23:48:23 EET 2011
[    0.000000] CPU: ARM925T [54029252] revision 2 (ARMv4T), cr=0000317f
[    0.000000] CPU: VIVT data cache, VIVT instruction cache
[    0.000000] Machine: Amstrad E3 (Delta)
[    0.000000] bootconsole [earlycon0] enabled
[    0.000000] Memory policy: ECC disabled, Data cache writethrough
[    0.000000] OMAP1510
[    0.000000]  revision 2 handled as 15xx id: bc058c9b93111a16
[    0.000000] Clocks: ARM_SYSST: 0x1000 DPLL_CTL: 0x2cb3 ARM_CKCTL: 0x250e
[    0.000000] ------------[ cut here ]------------
[    0.000000] kernel BUG at arch/arm/plat-omap/sram.c:226!
[    0.000000] Internal error: Oops - undefined instruction: 0 [#1] PREEMPT
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Not tainted  (3.2.0-rc1-e3 #9)
[    0.000000] PC is at omap_sram_reprogram_clock+0x28/0x30
[    0.000000] LR is at omap1_select_table_rate+0x88/0xb4
[    0.000000] pc : [<c001b0c4>]    lr : [<c0019f54>]    psr: 600000d3
[    0.000000] sp : c035bf10  ip : c035bf20  fp : c035bf1c
[    0.000000] r10: c035bfd4  r9 : 54029252  r8 : c03f8120
[    0.000000] r7 : c0362b50  r6 : 00b71b00  r5 : c03873cc  r4 : c0362b40
[    0.000000] r3 : 00000000  r2 : c0362b40  r1 : 0000010a  r0 : 00002cb0
[    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 0000317f  Table: 10004000  DAC: 00000017
[    0.000000] Process swapper (pid: 0, stack limit = 0xc035a270)
[    0.000000] Stack: (0xc035bf10 to 0xc035c000)
[    0.000000] bf00:                                     c035bf3c c035bf20 c0019f54 c001b0ac
[    0.000000] bf20: 00001000 00002cb3 00000004 c035ed4c c035bf74 c035bf40 c033ea24 c0019edc
[    0.000000] bf40: c02f526c 00000002 00000015 bc058c9b 93111a16 c035335c 02000000 c035ed4c
[    0.000000] bf60: c035ed4c c03f8120 c035bf84 c035bf78 c00194c4 c033e8ec c035bfc4 c035bf88
[    0.000000] bf80: c033bc24 c00194a0 c035bf90 c035bf98 00000000 00000000 00000000 00000000
[    0.000000] bfa0: 00000001 00000000 c0354678 c035ece4 10004000 103532f4 c035bff4 c035bfc8
[    0.000000] bfc0: c0338574 c033b598 00000000 00000000 00000000 c035467c 0000317d c035c03c
[    0.000000] bfe0: c0354678 c035ece4 00000000 c035bff8 10008040 c0338508 00000000 00000000
[    0.000000] Backtrace:
[    0.000000] [<c001b09c>] (omap_sram_reprogram_clock+0x0/0x30) from [<c0019f54>] (omap1_select_table_rate+0x88/0xb4)
[    0.000000] [<c0019ecc>] (omap1_select_table_rate+0x0/0xb4) from [<c033ea24>] (omap1_clk_init+0x148/0x334)
[    0.000000]  r7:c035ed4c r6:00000004 r5:00002cb3 r4:00001000
[    0.000000] [<c033e8dc>] (omap1_clk_init+0x0/0x334) from [<c00194c4>] (omap1_init_early+0x34/0x48)
[    0.000000]  r8:c03f8120 r7:c035ed4c r6:c035ed4c r5:02000000 r4:c035335c
[    0.000000] [<c0019490>] (omap1_init_early+0x0/0x48) from [<c033bc24>] (setup_arch+0x69c/0x79c)
[    0.000000] [<c033b588>] (setup_arch+0x0/0x79c) from [<c0338574>] (start_kernel+0x7c/0x2f4)
[    0.000000] [<c03384f8>] (start_kernel+0x0/0x2f4) from [<10008040>] (0x10008040)
[    0.000000]  r7:c035ece4 r6:c0354678 r5:c035c03c r4:0000317d
[    0.000000] Code: 0a000002 e1a0e00f e12fff13 e89da800 (e7f001f2)
[    0.000000] ---[ end trace 1b75b31a2719ed1c ]---
Quoted 3 lines

The BUG_ON() in omap_sram_reprogram_clock() triggers, because it's called before omap_sram_init(). If I comment out the code in omap_sram_reprogram_clock(), the board boots up.

Ouch. I guess I have not seen that as omap1_defconfig has by default CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y. To fix the issue you're seeing we should move some of omap1_clk_init into an arch_initcall that calls omap1_select_table_rate later on, and then does propagate_rate(&ck_ref). This way sram is configured when omap_sram_reprogram_clock gets called.

Regards,

Tony

reviewer
#10 lore raw

PATCH 1/1 ARM: OMAP: Fix reprogramming of dpll1 rate

Commit a66cb3454f220f49f900646ebdc76cb943319eb7 (ARM: OMAP: Map SRAM later on with ioremap_exec()) moved the SRAM init to happen later to remove a dependency to early SoC detection for map_io.

This broke booting on some boards not using Kconfig option for OMAP_CLOCKS_SET_BY_BOOTLOADER as the dpll1 reprogramming would cause the following error:

kernel BUG at arch/arm/plat-omap/sram.c:226!

Internal error: Oops - undefined instruction: 0 [#1] PREEMPT
Modules linked in:

CPU: 0    Not tainted  (3.2.0-rc1-e3 #9)
PC is at omap_sram_reprogram_clock+0x28/0x30
LR is at omap1_select_table_rate+0x88/0xb4
pc : [<c001b0c4>]    lr : [<c0019f54>]    psr: 600000d3

sp : c035bf10 ip : c035bf20 fp : c035bf1c
r10: c035bfd4 r9 : 54029252 r8 : c03f8120
r7 : c0362b50 r6 : 00b71b00 r5 : c03873cc r4 : c0362b40 r3 : 00000000 r2 : c0362b40 r1 : 0000010a r0 : 00002cb0
Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel
Control: 0000317f Table: 10004000 DAC: 00000017
Process swapper (pid: 0, stack limit = 0xc035a270)

Stack: (0xc035bf10 to 0xc035c000)

bf00: c035bf3c c035bf20 c0019f54 c001b0ac
bf20: 00001000 00002cb3 00000004 c035ed4c c035bf74 c035bf40 c033ea24 c0019edc
bf40: c02f526c 00000002 00000015 bc058c9b 93111a16 c035335c 02000000 c035ed4c
bf60: c035ed4c c03f8120 c035bf84 c035bf78 c00194c4 c033e8ec c035bfc4 c035bf88
bf80: c033bc24 c00194a0 c035bf90 c035bf98 00000000 00000000 00000000 00000000
bfa0: 00000001 00000000 c0354678 c035ece4 10004000 103532f4 c035bff4 c035bfc8
bfc0: c0338574 c033b598 00000000 00000000 00000000 c035467c 0000317d c035c03c
bfe0: c0354678 c035ece4 00000000 c035bff8 10008040 c0338508 00000000 00000000

Backtrace:
[<c001b09c>] (omap_sram_reprogram_clock+0x0/0x30) from [<c0019f54>] (omap1_select_table_rate+0x88/0xb4)
[<c0019ecc>] (omap1_select_table_rate+0x0/0xb4) from [<c033ea24>] (omap1_clk_init+0x148/0x334)
 r7:c035ed4c r6:00000004 r5:00002cb3 r4:00001000
[<c033e8dc>] (omap1_clk_init+0x0/0x334) from [<c00194c4>] (omap1_init_early+0x34/0x48)
 r8:c03f8120 r7:c035ed4c r6:c035ed4c r5:02000000 r4:c035335c
[<c0019490>] (omap1_init_early+0x0/0x48) from [<c033bc24>] (setup_arch+0x69c/0x79c)
[<c033b588>] (setup_arch+0x0/0x79c) from [<c0338574>] (start_kernel+0x7c/0x2f4)
[<c03384f8>] (start_kernel+0x0/0x2f4) from [<10008040>] (0x10008040)
 r7:c035ece4 r6:c0354678 r5:c035c03c r4:0000317d
Code: 0a000002 e1a0e00f e12fff13 e89da800 (e7f001f2)

Fix this by adding omap1_clk_late_init() that only reprograms dpll1 if the bootloader rate is less than 60MHz. This also allows removing of the OMAP_CLOCKS_SET_BY_BOOTLOADER option.

---
This seems to work when forced on OSK5912 at least. Moving the dpll1 reprogramming to happen later should not mess up drivers as it's still before driver inits. Also the system timer should not change as the source is ck_ref.
---

arch/arm/configs/omap1_defconfig +0 -1
index 7b63462..a7e7775 100644
@@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y
 CONFIG_MACH_NOKIA770=y
 CONFIG_MACH_AMS_DELTA=y
 CONFIG_MACH_OMAP_GENERIC=y
-CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
 CONFIG_OMAP_ARM_216MHZ=y
 CONFIG_OMAP_ARM_195MHZ=y
 CONFIG_OMAP_ARM_192MHZ=y
arch/arm/mach-omap1/Kconfig +0 -8
index e0a0281..73f287d 100644
@@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC
 comment "OMAP CPU Speed"
 	depends on ARCH_OMAP1
 
-config OMAP_CLOCKS_SET_BY_BOOTLOADER
-	bool "OMAP clocks set by bootloader"
-	depends on ARCH_OMAP1
-	help
-	  Enable this option to prevent the kernel from overriding the clock
-	  frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
-	  internal LCD controller and MPU peripherals.
-
 config OMAP_ARM_216MHZ
 	bool "OMAP ARM 216 MHz CPU (1710 only)"
         depends on ARCH_OMAP1 && ARCH_OMAP16XX
arch/arm/mach-omap1/clock.h +2 -1
index eaf09ef..16b1423 100644
@@ -17,7 +17,8 @@
 
 #include <plat/clock.h>
 
-extern int __init omap1_clk_init(void);
+int omap1_clk_init(void);
+void omap1_clk_late_init(void);
 extern int omap1_clk_enable(struct clk *clk);
 extern void omap1_clk_disable(struct clk *clk);
 extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
arch/arm/mach-omap1/clock_data.c +34 -19

77 lines not on this page · raw message

arch/arm/mach-omap1/devices.c +3 -0
index 48ef988..475cb2f 100644
@@ -30,6 +30,8 @@
 #include <plat/omap7xx.h>
 #include <plat/mcbsp.h>
 
+#include "clock.h"
+
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void)
 		return -ENODEV;
 
 	omap_sram_init();
+	omap1_clk_late_init();
 
 	/* please keep these calls, and their implementations above,
 	 * in alphabetical order so they're easier to sort through.
author maintainer
#11 lore raw

PATCH 1/1 ARM: OMAP: Fix reprogramming of dpll1 rate

Hi,

Quoted 49 lines · Tony Lindgren

Commit a66cb3454f220f49f900646ebdc76cb943319eb7 (ARM: OMAP: Map SRAM later on with ioremap_exec()) moved the SRAM init to happen later to remove a dependency to early SoC detection for map_io.

This broke booting on some boards not using Kconfig option for OMAP_CLOCKS_SET_BY_BOOTLOADER as the dpll1 reprogramming would cause the following error:

kernel BUG at arch/arm/plat-omap/sram.c:226!

Internal error: Oops - undefined instruction: 0 [#1] PREEMPT
Modules linked in:

CPU: 0    Not tainted  (3.2.0-rc1-e3 #9)
PC is at omap_sram_reprogram_clock+0x28/0x30
LR is at omap1_select_table_rate+0x88/0xb4
pc : [<c001b0c4>]    lr : [<c0019f54>]    psr: 600000d3

sp : c035bf10 ip : c035bf20 fp : c035bf1c
r10: c035bfd4 r9 : 54029252 r8 : c03f8120
r7 : c0362b50 r6 : 00b71b00 r5 : c03873cc r4 : c0362b40 r3 : 00000000 r2 : c0362b40 r1 : 0000010a r0 : 00002cb0
Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel
Control: 0000317f Table: 10004000 DAC: 00000017
Process swapper (pid: 0, stack limit = 0xc035a270)

Stack: (0xc035bf10 to 0xc035c000)

bf00: c035bf3c c035bf20 c0019f54 c001b0ac
bf20: 00001000 00002cb3 00000004 c035ed4c c035bf74 c035bf40 c033ea24 c0019edc
bf40: c02f526c 00000002 00000015 bc058c9b 93111a16 c035335c 02000000 c035ed4c
bf60: c035ed4c c03f8120 c035bf84 c035bf78 c00194c4 c033e8ec c035bfc4 c035bf88
bf80: c033bc24 c00194a0 c035bf90 c035bf98 00000000 00000000 00000000 00000000
bfa0: 00000001 00000000 c0354678 c035ece4 10004000 103532f4 c035bff4 c035bfc8
bfc0: c0338574 c033b598 00000000 00000000 00000000 c035467c 0000317d c035c03c
bfe0: c0354678 c035ece4 00000000 c035bff8 10008040 c0338508 00000000 00000000

Backtrace:
[<c001b09c>] (omap_sram_reprogram_clock+0x0/0x30) from [<c0019f54>] (omap1_select_table_rate+0x88/0xb4)
[<c0019ecc>] (omap1_select_table_rate+0x0/0xb4) from [<c033ea24>] (omap1_clk_init+0x148/0x334)
 r7:c035ed4c r6:00000004 r5:00002cb3 r4:00001000
[<c033e8dc>] (omap1_clk_init+0x0/0x334) from [<c00194c4>] (omap1_init_early+0x34/0x48)
 r8:c03f8120 r7:c035ed4c r6:c035ed4c r5:02000000 r4:c035335c
[<c0019490>] (omap1_init_early+0x0/0x48) from [<c033bc24>] (setup_arch+0x69c/0x79c)
[<c033b588>] (setup_arch+0x0/0x79c) from [<c0338574>] (start_kernel 
+0x7c/0x2f4)
[<c03384f8>] (start_kernel+0x0/0x2f4) from [<10008040>] (0x10008040)
 r7:c035ece4 r6:c0354678 r5:c035c03c r4:0000317d
Code: 0a000002 e1a0e00f e12fff13 e89da800 (e7f001f2)

Fix this by adding omap1_clk_late_init() that only reprograms dpll1 if the bootloader rate is less than 60MHz. This also allows removing of the OMAP_CLOCKS_SET_BY_BOOTLOADER option.

Quoted 8 lines

---
This seems to work when forced on OSK5912 at least. Moving the dpll1 reprogramming to happen later should not mess up drivers as it's still before driver inits. Also the system timer should not change as the source is ck_ref.

Cheers mate, this fixes the 3.2-rc1 boot issue on Amstrad E3.

A.

Quoted 160 lines

---

arch/arm/configs/omap1_defconfig +0 -1
index 7b63462..a7e7775 100644
@@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y
 CONFIG_MACH_NOKIA770=y
 CONFIG_MACH_AMS_DELTA=y
 CONFIG_MACH_OMAP_GENERIC=y
-CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
 CONFIG_OMAP_ARM_216MHZ=y
 CONFIG_OMAP_ARM_195MHZ=y
 CONFIG_OMAP_ARM_192MHZ=y
arch/arm/mach-omap1/Kconfig +0 -8
index e0a0281..73f287d 100644
@@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC
 comment "OMAP CPU Speed"
 	depends on ARCH_OMAP1
 
-config OMAP_CLOCKS_SET_BY_BOOTLOADER
-	bool "OMAP clocks set by bootloader"
-	depends on ARCH_OMAP1
-	help
-	  Enable this option to prevent the kernel from overriding the clock
-	  frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
-	  internal LCD controller and MPU peripherals.
-
 config OMAP_ARM_216MHZ
 	bool "OMAP ARM 216 MHz CPU (1710 only)"
         depends on ARCH_OMAP1 && ARCH_OMAP16XX
arch/arm/mach-omap1/clock.h +2 -1
index eaf09ef..16b1423 100644
@@ -17,7 +17,8 @@
 
 #include <plat/clock.h>
 
-extern int __init omap1_clk_init(void);
+int omap1_clk_init(void);
+void omap1_clk_late_init(void);
 extern int omap1_clk_enable(struct clk *clk);
 extern void omap1_clk_disable(struct clk *clk);
 extern long omap1_clk_round_rate(struct clk *clk, unsigned long  

rate);

arch/arm/mach-omap1/clock_data.c +9 -0
index 92400b9..1297bb5 100644
@@ -767,6 +767,15 @@ static struct clk_functions  
 omap1_clk_functions = {
 	.clk_disable_unused	= omap1_clk_disable_unused,
 };
 
+static void __init omap1_show_rates(void)
+{
+	pr_notice("Clocking rate (xtal/DPLL1/MPU): "
+			"%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
+		ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+		ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
+		arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
+}
+
 int __init omap1_clk_init(void)
 {
arch/arm/mach-omap1/clock_data.c +3 -3
 	struct omap_clk *c;
@@ -835,9 +844,12 @@ int __init omap1_clk_init(void)
 	/* We want to be in syncronous scalable mode */
 	omap_writew(0x1000, ARM_SYSST);
 
-#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
-	/* Use values set by bootloader. Determine PLL rate and recalculate
-	 * dependent clocks as if kernel had changed PLL or divisors.
+
+	/*
+	 * Initially use the values set by bootloader. Determine PLL rate  

and

arch/arm/mach-omap1/clock_data.c +4 -16
+	 * recalculate dependent clocks as if kernel had changed PLL or
+	 * divisors. See also omap1_clk_late_init() that can reprogram dpll1
+	 * after the SRAM is initialized.
 	 */
 	{
 		unsigned pll_ctl_val = omap_readw(DPLL_CTL);
@@ -862,25 +874,10 @@ int __init omap1_clk_init(void)
 			}
 		}
 	}
-#else
-	/* Find the highest supported frequency and enable it */
-	if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
-		printk(KERN_ERR "System frequencies not set. Check your config. 
 \n");
-		/* Guess sane values (60MHz) */
-		omap_writew(0x2290, DPLL_CTL);
-		omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
-		ck_dpll1.rate = 60000000;
-	}
-#endif
 	propagate_rate(&ck_dpll1);
 	/* Cache rates for clocks connected to ck_ref (not dpll1) */
 	propagate_rate(&ck_ref);
-	printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
-		"%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
-	       ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
-	       ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
-	       arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
-
+	omap1_show_rates();
 	if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
 		/* Select slicer output as OMAP input clock */
arch/arm/mach-omap1/clock_data.c +11 -0
 		omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
@@ -925,3 +922,21 @@ int __init omap1_clk_init(void)
 
 	return 0;
 }
+
+#define OMAP1_DPLL1_SANE_VALUE	60000000
+
+void __init omap1_clk_late_init(void)
+{
+	if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE)
+		return;
+
+	/* Find the highest supported frequency and enable it */
+	if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
+		pr_err("System frequencies not set, using default. Check your  

config.\n");

arch/arm/mach-omap1/clock_data.c +7 -0
+		omap_writew(0x2290, DPLL_CTL);
+		omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
+		ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
+	}
+	propagate_rate(&ck_dpll1);
+	omap1_show_rates();
+}
arch/arm/mach-omap1/devices.c +2 -1
index 48ef988..475cb2f 100644
@@ -30,6 +30,8 @@
 #include <plat/omap7xx.h>
 #include <plat/mcbsp.h>
 
+#include "clock.h"
+
 / 
 *--------------------------------------------------------------------- 
----*/
 
 #if defined(CONFIG_RTC_DRV_OMAP) || defined 

(CONFIG_RTC_DRV_OMAP_MODULE)

arch/arm/mach-omap1/devices.c +1 -0
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void)
 		return -ENODEV;
 
 	omap_sram_init();
+	omap1_clk_late_init();
 
 	/* please keep these calls, and their implementations above,
 	 * in alphabetical order so they're easier to sort through.
author maintainer
#13 lore raw

DEBUG_LL on OMAP1 (was Re: [PATCH] ARM: OMAP: Fix map_io for Amstrad E3)

In reply to Tony Lindgren

Hi,

Quoted 7 lines · Tony Lindgren
Quoted 6 lines · Aaro Koskinen
arch/arm/mach-omap1/clock_data.c +0 -0
@@ -774,14 +774,6 @@ int __init omap1_clk_init(void)
 	int crystal_type = 0; /* Default 12 MHz */
 	u32 reg, cpu_mask;
 
Quoted 14 lines

arch/arm/mach-omap1/clock_data.c int __init omap1_clk_init(void) · line 779

Quoted 11 lines
arch/arm/mach-omap1/clock_data.c +0 -8
-#ifdef CONFIG_DEBUG_LL
-	/*
-	 * Resets some clocks that may be left on from bootloader,
-	 * but leaves serial clocks on.
-	 */
-	omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
-#endif
-
 	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
 	reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
 	omap_writew(reg, SOFT_REQ_REG);

Hmm that should keep the serial clocks on. What other bit(s) need to be on in MOD_CONF_CTRL_0 for you in addition to the serial bits?

On my board those serial bits are zero during the early boot (and the serial works). By setting those bits the clock will switch from 12 -> 48 MHz and I guess the baud rate will change and that's why the output turns into garbage.

So I think the code should reset the other bits, and leave serial bits untouched:

arch/arm/mach-omap1/clock_data.c +5 -1
index 1297bb5..b3b69d8 100644
@@ -788,7 +788,11 @@ int __init omap1_clk_init(void)
  	 * Resets some clocks that may be left on from bootloader,
  	 * but leaves serial clocks on.
  	 */
-	omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+	reg = omap_readl(MOD_CONF_CTRL_0) &
+		((1 << CONF_MOD_UART1_CLK_MODE_R) |
+		 (1 << CONF_MOD_UART2_CLK_MODE_R) |
+		 (1 << CONF_MOD_UART3_CLK_MODE_R));
+	omap_writel(reg, MOD_CONF_CTRL_0);
  #endif
 
  	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */

A.

reviewer
#14 lore raw

DEBUG_LL on OMAP1 (was Re: [PATCH] ARM: OMAP: Fix map_io for Amstrad E3)

Quoted 25 lines · Aaro Koskinen

Hi,

Quoted 7 lines · Tony Lindgren
Quoted 6 lines · Aaro Koskinen
arch/arm/mach-omap1/clock_data.c +0 -0
@@ -774,14 +774,6 @@ int __init omap1_clk_init(void)
 	int crystal_type = 0; /* Default 12 MHz */
 	u32 reg, cpu_mask;
 
Quoted 14 lines

arch/arm/mach-omap1/clock_data.c int __init omap1_clk_init(void) · line 779

Quoted 11 lines
arch/arm/mach-omap1/clock_data.c +0 -8
-#ifdef CONFIG_DEBUG_LL
-	/*
-	 * Resets some clocks that may be left on from bootloader,
-	 * but leaves serial clocks on.
-	 */
-	omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
-#endif
-
 	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
 	reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
 	omap_writew(reg, SOFT_REQ_REG);

Hmm that should keep the serial clocks on. What other bit(s) need to be on in MOD_CONF_CTRL_0 for you in addition to the serial bits?

Quoted 4 lines

On my board those serial bits are zero during the early boot (and the serial works). By setting those bits the clock will switch from 12 -> 48 MHz and I guess the baud rate will change and that's why the output turns into garbage.

OK, looks like on OSK5912 the uart1 serial bit is zero and must be set..

Quoted 2 lines

So I think the code should reset the other bits, and leave serial bits untouched:

Sounds like we need SoC specific init_early for omap1 too. That way we can also get rid of the CONFIG_OMAP_ARM_XXXMHZ Kconfig options that are needed to make omap1_defconfig more usable.

Regards,

Tony

Quoted 18 lines
arch/arm/mach-omap1/clock_data.c +5 -1
index 1297bb5..b3b69d8 100644
@@ -788,7 +788,11 @@ int __init omap1_clk_init(void)
 	 * Resets some clocks that may be left on from bootloader,
 	 * but leaves serial clocks on.
 	 */
-	omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+	reg = omap_readl(MOD_CONF_CTRL_0) &
+		((1 << CONF_MOD_UART1_CLK_MODE_R) |
+		 (1 << CONF_MOD_UART2_CLK_MODE_R) |
+		 (1 << CONF_MOD_UART3_CLK_MODE_R));
+	omap_writel(reg, MOD_CONF_CTRL_0);
 #endif
 
 	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */