Move mbus setup code out of drivers and into platform

index 00be4fc..0d8dee6 100644
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 /*

@@ -34,14 +35,6 @@
 #define ATTR_PCIE_MEM		0xe8
 #define ATTR_SCRATCHPAD		0x0
 
-/*
- * CPU Address Decode Windows registers
- */
-#define WIN_CTRL(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0x0)
-#define WIN_BASE(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0x4)
-#define WIN_REMAP_LO(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0x8)
-#define WIN_REMAP_HI(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0xc)
-
 struct mbus_dram_target_info dove_mbus_dram_info;
 
 static inline void __iomem *ddr_map_sc(int i)

@@ -49,78 +42,62 @@ static inline void __iomem *ddr_map_sc(int i)
 	return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));
 }
 
-static int cpu_win_can_remap(int win)
-{
-	if (win < 4)
-		return 1;
-
-	return 0;
-}
-
-static void __init setup_cpu_win(int win, u32 base, u32 size,
-				 u8 target, u8 attr, int remap)
-{
-	u32 ctrl;
-
-	base &= 0xffff0000;
-	ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
-
-	writel(base, WIN_BASE(win));
-	writel(ctrl, WIN_CTRL(win));
-	if (cpu_win_can_remap(win)) {
-		if (remap < 0)
-			remap = base;
-		writel(remap & 0xffff0000, WIN_REMAP_LO(win));
-		writel(0, WIN_REMAP_HI(win));
-	}
-}
-
-void __init dove_setup_cpu_mbus(void)
-{
-	int i;
-	int cs;
+/*
+ * Description of the windows needed by the platform code
+ */
+static struct orion_addr_map_cfg addr_map_cfg = {
+	.num_wins = 8,
+	.remappable_wins = 4,
+	.bridge_virt_base = BRIDGE_VIRT_BASE,
+};
 
+static const struct orion_addr_map_info addr_map_info[] = {
 	/*
-	 * First, disable and clear windows.
+	 * Windows for PCIe IO+MEM space.
 	 */
-	for (i = 0; i < 8; i++) {
-		writel(0, WIN_BASE(i));
-		writel(0, WIN_CTRL(i));
-		if (cpu_win_can_remap(i)) {
-			writel(0, WIN_REMAP_LO(i));
-			writel(0, WIN_REMAP_HI(i));
-		}
-	}
-
+	{ 0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
+	  TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE
+	},
+	{ 1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
+	  TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE
+	},
+	{ 2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
+	  TARGET_PCIE0, ATTR_PCIE_MEM, -1
+	},
+	{ 3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
+	  TARGET_PCIE1, ATTR_PCIE_MEM, -1
+	},
 	/*
-	 * Setup windows for PCIe IO+MEM space.
+	 * Window for CESA engine.
 	 */
-	setup_cpu_win(0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
-		      TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE);
-	setup_cpu_win(1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
-		      TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE);
-	setup_cpu_win(2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
-		      TARGET_PCIE0, ATTR_PCIE_MEM, -1);
-	setup_cpu_win(3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
-		      TARGET_PCIE1, ATTR_PCIE_MEM, -1);
-
+	{ 4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
+	  TARGET_CESA, ATTR_CESA, -1
+	},
 	/*
-	 * Setup window for CESA engine.
+	 * Window to the BootROM for Standby and Sleep Resume
 	 */
-	setup_cpu_win(4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
-		      TARGET_CESA, ATTR_CESA, -1);
-
+	{ 5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
+	  TARGET_BOOTROM, ATTR_BOOTROM, -1
+	},
 	/*
-	 * Setup the Window to the BootROM for Standby and Sleep Resume
+	 * Window to the PMU Scratch Pad space
 	 */
-	setup_cpu_win(5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
-		      TARGET_BOOTROM, ATTR_BOOTROM, -1);
+	{ 6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
+	  TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1
+	},
+	/* End marker */
+	{ -1, 0, 0, 0, 0, 0 }
+};
+
+void __init dove_setup_cpu_mbus(void)
+{
+	int i;
+	int cs;
 
 	/*
-	 * Setup the Window to the PMU Scratch Pad space
+	 * Disable, clear and configure windows.
 	 */
-	setup_cpu_win(6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
-		      TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1);
+	orion_config_wins(&addr_map_cfg, addr_map_info);
 
 	/*
 	 * Setup MBUS dram target info.

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index 0ab531d..ecca1e0 100644
@@ -169,12 +169,7 @@ void __init orion5x_xor_init(void)
  ****************************************************************************/
 static void __init orion5x_crypto_init(void)
 {
-	int ret;
-
-	ret = orion5x_setup_sram_win();
-	if (ret)
-		return;
-
+	orion5x_setup_sram_win();
 	orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
 			  SZ_8K, IRQ_ORION5X_CESA);
 }

index 3e5499d..6276ca1 100644
@@ -27,7 +27,7 @@ void orion5x_setup_dev0_win(u32 base, u32 size);
 void orion5x_setup_dev1_win(u32 base, u32 size);
 void orion5x_setup_dev2_win(u32 base, u32 size);
 void orion5x_setup_pcie_wa_win(u32 base, u32 size);
-int orion5x_setup_sram_win(void);
+void orion5x_setup_sram_win(void);
 
 void orion5x_ehci0_init(void);
 void orion5x_ehci1_init(void);

index 0a28bbc..2745f5d 100644
@@ -69,7 +69,7 @@
  ******************************************************************************/
 
 #define ORION5X_DDR_VIRT_BASE		(ORION5X_REGS_VIRT_BASE | 0x00000)
-
+#define  ORION5X_DDR_WINDOW_CPU_BASE    (ORION5X_DDR_VIRT_BASE | 0x1500)
 #define ORION5X_DEV_BUS_PHYS_BASE	(ORION5X_REGS_PHYS_BASE | 0x10000)
 #define ORION5X_DEV_BUS_VIRT_BASE	(ORION5X_REGS_VIRT_BASE | 0x10000)
 #define ORION5X_DEV_BUS_REG(x)		(ORION5X_DEV_BUS_VIRT_BASE | (x))

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index 0d8dee6..e1db23c 100644
@@ -35,8 +35,6 @@
 #define ATTR_PCIE_MEM		0xe8
 #define ATTR_SCRATCHPAD		0x0
 
-struct mbus_dram_target_info dove_mbus_dram_info;
-
 static inline void __iomem *ddr_map_sc(int i)
 {
 	return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));

@@ -102,7 +100,7 @@ void __init dove_setup_cpu_mbus(void)
 	/*
 	 * Setup MBUS dram target info.
 	 */
-	dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+	orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
 
 	for (i = 0, cs = 0; i < 2; i++) {
 		u32 map = readl(ddr_map_sc(i));

@@ -113,7 +111,7 @@ void __init dove_setup_cpu_mbus(void)
 		if (map & 1) {
 			struct mbus_dram_window *w;
 
-			w = &dove_mbus_dram_info.cs[cs++];
+			w = &orion_mbus_dram_info.cs[cs++];
 			w->cs_index = i;
 			w->mbus_attr = 0; /* CS address decoding done inside */
 					  /* the DDR controller, no need to  */

@@ -122,5 +120,5 @@ void __init dove_setup_cpu_mbus(void)
 			w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4);
 		}
 	}
-	dove_mbus_dram_info.num_cs = cs;
+	orion_mbus_dram_info.num_cs = cs;
 }

index a9e0dae..29c1881 100644
@@ -30,6 +30,7 @@
 #include <linux/irq.h>
 #include <plat/time.h>
 #include <plat/common.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 static int get_tclk(void);

@@ -71,7 +72,7 @@ void __init dove_map_io(void)
  ****************************************************************************/
 void __init dove_ehci0_init(void)
 {
-	orion_ehci_init(&dove_mbus_dram_info,
+	orion_ehci_init(&orion_mbus_dram_info,
 			DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
 }
 

@@ -80,7 +81,7 @@ void __init dove_ehci0_init(void)
  ****************************************************************************/
 void __init dove_ehci1_init(void)
 {
-	orion_ehci_1_init(&dove_mbus_dram_info,
+	orion_ehci_1_init(&orion_mbus_dram_info,
 			  DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
 }
 

@@ -89,7 +90,7 @@ void __init dove_ehci1_init(void)
  ****************************************************************************/
 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge00_init(eth_data, &dove_mbus_dram_info,
+	orion_ge00_init(eth_data, &orion_mbus_dram_info,
 			DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
 			0, get_tclk());
 }

@@ -107,7 +108,7 @@ void __init dove_rtc_init(void)
  ****************************************************************************/
 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
 {
-	orion_sata_init(sata_data, &dove_mbus_dram_info,
+	orion_sata_init(sata_data, &orion_mbus_dram_info,
 			DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
 
 }

@@ -198,7 +199,7 @@ struct sys_timer dove_timer = {
  ****************************************************************************/
 void __init dove_xor0_init(void)
 {
-	orion_xor0_init(&dove_mbus_dram_info,
+	orion_xor0_init(&orion_mbus_dram_info,
 			DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
 			IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
 }

index 6a2046e..7322371 100644
@@ -15,7 +15,6 @@ struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
 
 extern struct sys_timer dove_timer;
-extern struct mbus_dram_target_info dove_mbus_dram_info;
 
 /*
  * Basic Dove init functions used early by machine-setup.

index aa2b3a0..42e7d22 100644
@@ -19,6 +19,7 @@
 #include <plat/pcie.h>
 #include <mach/irqs.h>
 #include <mach/bridge-regs.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 struct pcie_port {

@@ -50,7 +51,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
 
-	orion_pcie_setup(pp->base, &dove_mbus_dram_info);
+	orion_pcie_setup(pp->base, &orion_mbus_dram_info);
 
 	/*
 	 * IORESOURCE_IO

index ff8ac07..01b0154 100644
@@ -35,8 +35,6 @@
 #define ATTR_PCIE1_MEM		0xd8
 #define ATTR_SRAM		0x01
 
-struct mbus_dram_target_info kirkwood_mbus_dram_info;
-
 /*
  * Description of the windows needed by the platform code
  */

@@ -88,6 +86,5 @@ void __init kirkwood_setup_cpu_mbus(void)
 	/*
 	 * Setup MBUS dram target info.
 	 */
-	orion_setup_cpu_mbus_target(&addr_map_cfg, &kirkwood_mbus_dram_info,
-				    DDR_WINDOW_CPU_BASE);
+	orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE);
 }

index f3248cf..d8b4ed2 100644
@@ -30,6 +30,7 @@
 #include <plat/orion_nand.h>
 #include <plat/common.h>
 #include <plat/time.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 /*****************************************************************************

@@ -73,7 +74,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
 void __init kirkwood_ehci_init(void)
 {
 	kirkwood_clk_ctrl |= CGC_USB0;
-	orion_ehci_init(&kirkwood_mbus_dram_info,
+	orion_ehci_init(&orion_mbus_dram_info,
 			USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
 }
 

@@ -85,7 +86,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
 	kirkwood_clk_ctrl |= CGC_GE0;
 
-	orion_ge00_init(eth_data, &kirkwood_mbus_dram_info,
+	orion_ge00_init(eth_data, &orion_mbus_dram_info,
 			GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
 			IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
 }

@@ -99,7 +100,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 
 	kirkwood_clk_ctrl |= CGC_GE1;
 
-	orion_ge01_init(eth_data, &kirkwood_mbus_dram_info,
+	orion_ge01_init(eth_data, &orion_mbus_dram_info,
 			GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
 			IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
 }

@@ -178,7 +179,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 	if (sata_data->n_ports > 1)
 		kirkwood_clk_ctrl |= CGC_SATA1;
 
-	orion_sata_init(sata_data, &kirkwood_mbus_dram_info,
+	orion_sata_init(sata_data, &orion_mbus_dram_info,
 			SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 }
 

@@ -221,7 +222,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 		mvsdio_data->clock = 100000000;
 	else
 		mvsdio_data->clock = 200000000;
-	mvsdio_data->dram = &kirkwood_mbus_dram_info;
+	mvsdio_data->dram = &orion_mbus_dram_info;
 	kirkwood_clk_ctrl |= CGC_SDIO;
 	kirkwood_sdio.dev.platform_data = mvsdio_data;
 	platform_device_register(&kirkwood_sdio);

@@ -285,7 +286,7 @@ static void __init kirkwood_xor0_init(void)
 {
 	kirkwood_clk_ctrl |= CGC_XOR0;
 
-	orion_xor0_init(&kirkwood_mbus_dram_info,
+	orion_xor0_init(&orion_mbus_dram_info,
 			XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
 			IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 }

@@ -364,7 +365,7 @@ static struct resource kirkwood_i2s_resources[] = {
 };
 
 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
-	.dram        = &kirkwood_mbus_dram_info,
+	.dram        = &orion_mbus_dram_info,
 	.burst       = 128,
 };
 

index b9b0f09..4756b94 100644
@@ -30,7 +30,6 @@ void kirkwood_init(void);
 void kirkwood_init_early(void);
 void kirkwood_init_irq(void);
 
-extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
 void kirkwood_setup_cpu_mbus(void);
 
 void kirkwood_enable_pcie(void);

index 74b992d..8def894 100644
@@ -17,6 +17,7 @@
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
 #include <mach/bridge-regs.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 void kirkwood_enable_pcie(void)

@@ -208,7 +209,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
 
-	orion_pcie_setup(pp->base, &kirkwood_mbus_dram_info);
+	orion_pcie_setup(pp->base, &orion_mbus_dram_info);
 
 	return 1;
 }

index e65aa82..f317d1a 100644
@@ -37,8 +37,6 @@
 #define WIN0_OFF(n)		(BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
 #define WIN8_OFF(n)		(BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
 
-struct mbus_dram_target_info mv78xx0_mbus_dram_info;
-
 static void __init __iomem *win_cfg_base(int win)
 {
 	/*

@@ -73,11 +71,9 @@ void __init mv78xx0_setup_cpu_mbus(void)
 	 */
 	if (mv78xx0_core_index() == 0)
 		orion_setup_cpu_mbus_target(&addr_map_cfg,
-					    &mv78xx0_mbus_dram_info,
 					    DDR_WINDOW_CPU0_BASE);
 	else
 		orion_setup_cpu_mbus_target(&addr_map_cfg,
-					    &mv78xx0_mbus_dram_info,
 					    DDR_WINDOW_CPU1_BASE);
 }
 

index 23d3980..be0c232 100644
@@ -23,6 +23,7 @@
 #include <plat/orion_nand.h>
 #include <plat/time.h>
 #include <plat/common.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 static int get_tclk(void);

@@ -169,7 +170,7 @@ void __init mv78xx0_map_io(void)
  ****************************************************************************/
 void __init mv78xx0_ehci0_init(void)
 {
-	orion_ehci_init(&mv78xx0_mbus_dram_info,
+	orion_ehci_init(&orion_mbus_dram_info,
 			USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
 }
 

@@ -179,7 +180,7 @@ void __init mv78xx0_ehci0_init(void)
  ****************************************************************************/
 void __init mv78xx0_ehci1_init(void)
 {
-	orion_ehci_1_init(&mv78xx0_mbus_dram_info,
+	orion_ehci_1_init(&orion_mbus_dram_info,
 			  USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
 }
 

@@ -189,7 +190,7 @@ void __init mv78xx0_ehci1_init(void)
  ****************************************************************************/
 void __init mv78xx0_ehci2_init(void)
 {
-	orion_ehci_2_init(&mv78xx0_mbus_dram_info,
+	orion_ehci_2_init(&orion_mbus_dram_info,
 			  USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
 }
 

@@ -199,7 +200,7 @@ void __init mv78xx0_ehci2_init(void)
  ****************************************************************************/
 void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge00_init(eth_data, &mv78xx0_mbus_dram_info,
+	orion_ge00_init(eth_data, &orion_mbus_dram_info,
 			GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
 			IRQ_MV78XX0_GE_ERR, get_tclk());
 }

@@ -210,7 +211,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  ****************************************************************************/
 void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge01_init(eth_data, &mv78xx0_mbus_dram_info,
+	orion_ge01_init(eth_data, &orion_mbus_dram_info,
 			GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
 			NO_IRQ, get_tclk());
 }

@@ -234,7 +235,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
 		eth_data->duplex = DUPLEX_FULL;
 	}
 
-	orion_ge10_init(eth_data, &mv78xx0_mbus_dram_info,
+	orion_ge10_init(eth_data, &orion_mbus_dram_info,
 			GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM,
 			NO_IRQ, get_tclk());
 }

@@ -258,7 +259,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
 		eth_data->duplex = DUPLEX_FULL;
 	}
 
-	orion_ge11_init(eth_data, &mv78xx0_mbus_dram_info,
+	orion_ge11_init(eth_data, &orion_mbus_dram_info,
 			GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM,
 			NO_IRQ, get_tclk());
 }

@@ -277,7 +278,7 @@ void __init mv78xx0_i2c_init(void)
  ****************************************************************************/
 void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data)
 {
-	orion_sata_init(sata_data, &mv78xx0_mbus_dram_info,
+	orion_sata_init(sata_data, &orion_mbus_dram_info,
 			SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
 }
 

index 632e63d..f2ca59c 100644
@@ -23,7 +23,6 @@ void mv78xx0_init(void);
 void mv78xx0_init_early(void);
 void mv78xx0_init_irq(void);
 
-extern struct mbus_dram_target_info mv78xx0_mbus_dram_info;
 void mv78xx0_setup_cpu_mbus(void);
 void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
 			       int maj, int min);

index c51af1c..9208667 100644
@@ -15,6 +15,7 @@
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 struct pcie_port {

@@ -153,7 +154,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
 	 * Generic PCIe unit setup.
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
-	orion_pcie_setup(pp->base, &mv78xx0_mbus_dram_info);
+	orion_pcie_setup(pp->base, &orion_mbus_dram_info);
 
 	sys->resource[0] = &pp->res[0];
 	sys->resource[1] = &pp->res[1];

index 474268c..a719560 100644
@@ -56,7 +56,6 @@
 #define ATTR_DEV_BOOT		0xf
 #define ATTR_SRAM		0x0
 
-struct mbus_dram_target_info orion5x_mbus_dram_info;
 static int __initdata win_alloc_count;
 
 static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,

@@ -114,8 +113,7 @@ void __init orion5x_setup_cpu_mbus_bridge(void)
 	/*
 	 * Setup MBUS dram target info.
 	 */
-	orion_setup_cpu_mbus_target(&addr_map_cfg, &orion5x_mbus_dram_info,
-				    ORION5X_DDR_WINDOW_CPU_BASE);
+	orion_setup_cpu_mbus_target(&addr_map_cfg, ORION5X_DDR_WINDOW_CPU_BASE);
 }
 
 void __init orion5x_setup_dev_boot_win(u32 base, u32 size)

index ecca1e0..27addd5 100644
@@ -31,6 +31,7 @@
 #include <plat/orion_nand.h>
 #include <plat/time.h>
 #include <plat/common.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 /*****************************************************************************

@@ -71,7 +72,7 @@ void __init orion5x_map_io(void)
  ****************************************************************************/
 void __init orion5x_ehci0_init(void)
 {
-	orion_ehci_init(&orion5x_mbus_dram_info,
+	orion_ehci_init(&orion_mbus_dram_info,
 			ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
 }
 

@@ -81,7 +82,7 @@ void __init orion5x_ehci0_init(void)
  ****************************************************************************/
 void __init orion5x_ehci1_init(void)
 {
-	orion_ehci_1_init(&orion5x_mbus_dram_info,
+	orion_ehci_1_init(&orion_mbus_dram_info,
 			  ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
 }
 

@@ -91,7 +92,7 @@ void __init orion5x_ehci1_init(void)
  ****************************************************************************/
 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge00_init(eth_data, &orion5x_mbus_dram_info,
+	orion_ge00_init(eth_data, &orion_mbus_dram_info,
 			ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
 			IRQ_ORION5X_ETH_ERR, orion5x_tclk);
 }

@@ -121,7 +122,7 @@ void __init orion5x_i2c_init(void)
  ****************************************************************************/
 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 {
-	orion_sata_init(sata_data, &orion5x_mbus_dram_info,
+	orion_sata_init(sata_data, &orion_mbus_dram_info,
 			ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
 }
 

@@ -158,7 +159,7 @@ void __init orion5x_uart1_init(void)
  ****************************************************************************/
 void __init orion5x_xor_init(void)
 {
-	orion_xor0_init(&orion5x_mbus_dram_info,
+	orion_xor0_init(&orion_mbus_dram_info,
 			ORION5X_XOR_PHYS_BASE,
 			ORION5X_XOR_PHYS_BASE + 0x200,
 			IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);

index 6276ca1..44a65af 100644
@@ -20,7 +20,6 @@ extern struct sys_timer orion5x_timer;
  * functions to map its interfaces and by the machine-setup to map its on-
  * board devices. Details in /mach-orion/addr-map.c
  */
-extern struct mbus_dram_target_info orion5x_mbus_dram_info;
 void orion5x_setup_cpu_mbus_bridge(void);
 void orion5x_setup_dev_boot_win(u32 base, u32 size);
 void orion5x_setup_dev0_win(u32 base, u32 size);

index bc4a920..ddfa01a 100644
@@ -18,6 +18,7 @@
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
+#include <plat/addr-map.h>
 #include "common.h"
 
 /*****************************************************************************

@@ -145,7 +146,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 	/*
 	 * Generic PCIe unit setup.
 	 */
-	orion_pcie_setup(PCIE_BASE, &orion5x_mbus_dram_info);
+	orion_pcie_setup(PCIE_BASE, &orion_mbus_dram_info);
 
 	/*
 	 * Check whether to apply Orion-1/Orion-NAS PCIe config

@@ -477,7 +478,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
 	/*
 	 * Point PCI unit MBUS decode windows to DRAM space.
 	 */
-	orion5x_setup_pci_wins(&orion5x_mbus_dram_info);
+	orion5x_setup_pci_wins(&orion_mbus_dram_info);
 
 	/*
 	 * Master + Slave enable

index d3abb34..c27ad88 100644
@@ -14,6 +14,8 @@
 #include <linux/io.h>
 #include <plat/addr-map.h>
 
+struct mbus_dram_target_info orion_mbus_dram_info;
+
 /*
  * DDR target is the same on all Orion platforms.
  */

@@ -134,14 +136,13 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
  * Setup MBUS dram target info.
  */
 void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
-					struct mbus_dram_target_info *info,
 					const u32 ddr_window_cpu_base)
 {
 	void __iomem *addr;
 	int i;
 	int cs;
 
-	info->mbus_dram_target_id = TARGET_DDR;
+	orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
 
 	addr = (void __iomem *)ddr_window_cpu_base;
 

@@ -155,12 +156,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
 		if (size & 1) {
 			struct mbus_dram_window *w;
 
-			w = &info->cs[cs++];
+			w = &orion_mbus_dram_info.cs[cs++];
 			w->cs_index = i;
 			w->mbus_attr = 0xf & ~(1 << i);
 			w->base = base & 0xffff0000;
 			w->size = (size | 0x0000ffff) + 1;
 		}
 	}
-	info->num_cs = cs;
+	orion_mbus_dram_info.num_cs = cs;
 }

index 55e40f4..fd556f7 100644
@@ -11,6 +11,8 @@
 #ifndef __PLAT_ADDR_MAP_H
 #define __PLAT_ADDR_MAP_H
 
+extern struct mbus_dram_target_info orion_mbus_dram_info;
+
 struct orion_addr_map_cfg {
 	const int num_wins;	/* Total number of windows */
 	const int remappable_wins;

@@ -47,6 +49,5 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
 				const u8 attr, const int remap);
 
 void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
-					struct mbus_dram_target_info *info,
 					const u32 ddr_window_cpu_base);
 #endif

index 42e7d22..6c11a4d 100644
@@ -10,7 +10,6 @@
 
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/mbus.h>
 #include <video/vga.h>
 #include <asm/mach/pci.h>
 #include <asm/mach/arch.h>

@@ -51,7 +50,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
 
-	orion_pcie_setup(pp->base, &orion_mbus_dram_info);
+	orion_pcie_setup(pp->base);
 
 	/*
 	 * IORESOURCE_IO

index b0a7d97..43a495f 100644
@@ -10,7 +10,6 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/mbus.h>
 #include <linux/io.h>
 #include <asm/gpio.h>
 #include <mach/hardware.h>

index 8def894..fb451bf 100644
@@ -11,7 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
-#include <linux/mbus.h>
 #include <video/vga.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>

@@ -209,7 +208,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
 
-	orion_pcie_setup(pp->base, &orion_mbus_dram_info);
+	orion_pcie_setup(pp->base);
 
 	return 1;
 }

index 59b7686..34cb967 100644
@@ -10,7 +10,6 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/mbus.h>
 #include <linux/io.h>
 #include <plat/mpp.h>
 #include <asm/gpio.h>

index 9208667..12fcb10 100644
@@ -10,7 +10,6 @@
 
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/mbus.h>
 #include <video/vga.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>

@@ -154,7 +153,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
 	 * Generic PCIe unit setup.
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
-	orion_pcie_setup(pp->base, &orion_mbus_dram_info);
+	orion_pcie_setup(pp->base);
 
 	sys->resource[0] = &pp->res[0];
 	sys->resource[1] = &pp->res[1];

index b6ddd7a..5b70026 100644
@@ -10,7 +10,6 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/mbus.h>
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <plat/mpp.h>

index ddfa01a..a494c47 100644
@@ -146,7 +146,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 	/*
 	 * Generic PCIe unit setup.
 	 */
-	orion_pcie_setup(PCIE_BASE, &orion_mbus_dram_info);
+	orion_pcie_setup(PCIE_BASE);
 
 	/*
 	 * Check whether to apply Orion-1/Orion-NAS PCIe config

195 lines not on this page · raw message

index fd556f7..4be2cac 100644
@@ -50,4 +50,12 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
 
 void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
 					const u32 ddr_window_cpu_base);
+
+void mv_xor_conf_mbus_windows(void __iomem *base);
+void ehci_orion_conf_mbus_windows(void __iomem *base);
+void mv_sata_conf_mbus_windows(void __iomem *base);
+u32 mv643xx_eth_conf_mbus_windows(void __iomem *base);
+void mv_sd_conf_mbus_windows(void __iomem *base);
+void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
+				    unsigned long dma);
 #endif

index cc99163..fe5b9e8 100644
@@ -20,8 +20,7 @@ int orion_pcie_x4_mode(void __iomem *base);
 int orion_pcie_get_local_bus_nr(void __iomem *base);
 void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
 void orion_pcie_reset(void __iomem *base);
-void orion_pcie_setup(void __iomem *base,
-		      struct mbus_dram_target_info *dram);
+void orion_pcie_setup(void __iomem *base);
 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
 		       u32 devfn, int where, int size, u32 *val);
 int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,

index af2d733..86dbb5b 100644
@@ -13,6 +13,7 @@
 #include <linux/mbus.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
+#include <plat/addr-map.h>
 #include <linux/delay.h>
 
 /*

@@ -175,8 +176,7 @@ static void __init orion_pcie_setup_wins(void __iomem *base,
 	writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));
 }
 
-void __init orion_pcie_setup(void __iomem *base,
-			     struct mbus_dram_target_info *dram)
+void __init orion_pcie_setup(void __iomem *base)
 {
 	u16 cmd;
 	u32 mask;

@@ -184,7 +184,7 @@ void __init orion_pcie_setup(void __iomem *base,
 	/*
 	 * Point PCIe unit MBUS decode windows to DRAM space.
 	 */
-	orion_pcie_setup_wins(base, dram);
+	orion_pcie_setup_wins(base, &orion_mbus_dram_info);
 
 	/*
 	 * Master + slave enable.

index 4b6b209..43c6d2a 100644
@@ -62,13 +62,13 @@
 #include <linux/clk.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
-#include <linux/mbus.h>
 #include <linux/bitops.h>
 #include <linux/gfp.h>
 #include <scsi/scsi_host.h>
 #include <scsi/scsi_cmnd.h>
 #include <scsi/scsi_device.h>
 #include <linux/libata.h>
+#include <plat/addr-map.h>
 
 #define DRV_NAME	"sata_mv"
 #define DRV_VERSION	"1.28"

@@ -444,9 +444,6 @@ enum {
 #define IS_PCIE(hpriv) ((hpriv)->hp_flags & MV_HP_PCIE)
 #define IS_SOC(hpriv) ((hpriv)->hp_flags & MV_HP_FLAG_SOC)
 
-#define WINDOW_CTRL(i)		(0x20030 + ((i) << 4))
-#define WINDOW_BASE(i)		(0x20034 + ((i) << 4))
-
 enum {
 	/* DMA boundary 0xffff is required by the s/g splitting
 	 * we need on /length/ in mv_fill-sg().

@@ -3987,27 +3984,6 @@ static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev)
 	return 0;
 }
 
-static void mv_conf_mbus_windows(struct mv_host_priv *hpriv,
-				 struct mbus_dram_target_info *dram)
-{
-	int i;
-
-	for (i = 0; i < 4; i++) {
-		writel(0, hpriv->base + WINDOW_CTRL(i));
-		writel(0, hpriv->base + WINDOW_BASE(i));
-	}
-
-	for (i = 0; i < dram->num_cs; i++) {
-		struct mbus_dram_window *cs = dram->cs + i;
-
-		writel(((cs->size - 1) & 0xffff0000) |
-			(cs->mbus_attr << 8) |
-			(dram->mbus_dram_target_id << 4) | 1,
-			hpriv->base + WINDOW_CTRL(i));
-		writel(cs->base, hpriv->base + WINDOW_BASE(i));
-	}
-}
-
 /**
  *      mv_platform_probe - handle a positive probe of an soc Marvell
  *      host

@@ -4070,10 +4046,9 @@ static int mv_platform_probe(struct platform_device *pdev)
 #endif
 
 	/*
-	 * (Re-)program MBUS remapping windows if we are asked to.
+	 * (Re-)program MBUS remapping windows.
 	 */
-	if (mv_platform_data->dram != NULL)
-		mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
+	mv_sata_conf_mbus_windows(hpriv->base);
 
 	rc = mv_create_dma_pools(hpriv, &pdev->dev);
 	if (rc)

@@ -4146,10 +4121,9 @@ static int mv_platform_resume(struct platform_device *pdev)
 		const struct mv_sata_platform_data *mv_platform_data = \
 			pdev->dev.platform_data;
 		/*
-		 * (Re-)program MBUS remapping windows if we are asked to.
+		 * (Re-)program MBUS remapping windows.
 		 */
-		if (mv_platform_data->dram != NULL)
-			mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
+		mv_sata_conf_mbus_windows(hpriv->base);
 
 		/* initialize adapter */
 		ret = mv_init_host(host);

index 9a353c2..10f8518 100644
@@ -26,6 +26,7 @@
 #include <linux/platform_device.h>
 #include <linux/memory.h>
 #include <plat/mv_xor.h>
+#include <plat/addr-map.h>
 #include "mv_xor.h"
 
 static void mv_xor_issue_pending(struct dma_chan *chan);

@@ -1248,37 +1249,6 @@ static int __devinit mv_xor_probe(struct platform_device *pdev)
 	return ret;
 }
 
-static void
-mv_xor_conf_mbus_windows(struct mv_xor_shared_private *msp,
-			 struct mbus_dram_target_info *dram)
-{
-	void __iomem *base = msp->xor_base;
-	u32 win_enable = 0;
-	int i;
-
-	for (i = 0; i < 8; i++) {
-		writel(0, base + WINDOW_BASE(i));
-		writel(0, base + WINDOW_SIZE(i));
-		if (i < 4)
-			writel(0, base + WINDOW_REMAP_HIGH(i));
-	}
-
-	for (i = 0; i < dram->num_cs; i++) {
-		struct mbus_dram_window *cs = dram->cs + i;
-
-		writel((cs->base & 0xffff0000) |
-		       (cs->mbus_attr << 8) |
-		       dram->mbus_dram_target_id, base + WINDOW_BASE(i));
-		writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
-
-		win_enable |= (1 << i);
-		win_enable |= 3 << (16 + (2 * i));
-	}
-
-	writel(win_enable, base + WINDOW_BAR_ENABLE(0));
-	writel(win_enable, base + WINDOW_BAR_ENABLE(1));
-}
-
 static struct platform_driver mv_xor_driver = {
 	.probe		= mv_xor_probe,
 	.remove		= __devexit_p(mv_xor_remove),

@@ -1321,10 +1291,9 @@ static int mv_xor_shared_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, msp);
 
 	/*
-	 * (Re-)program MBUS remapping windows if we are asked to.
+	 * (Re-)program MBUS remapping windows.
 	 */
-	if (msd != NULL && msd->dram != NULL)
-		mv_xor_conf_mbus_windows(msp, msd->dram);
+	mv_xor_conf_mbus_windows(msp->xor_base);
 
 	return 0;
 }

index 977b592..b6b13fb 100644
@@ -47,11 +47,6 @@
 #define XOR_ERROR_ADDR(chan)	(chan->mmr_base + 0x60)
 #define XOR_INTR_MASK_VALUE	0x3F5
 
-#define WINDOW_BASE(w)		(0x250 + ((w) << 2))
-#define WINDOW_SIZE(w)		(0x270 + ((w) << 2))
-#define WINDOW_REMAP_HIGH(w)	(0x290 + ((w) << 2))
-#define WINDOW_BAR_ENABLE(chan)	(0x240 + ((chan) << 2))
-
 struct mv_xor_shared_private {
 	void __iomem	*xor_base;
 	void __iomem	*xor_high_base;

index a5bf60e..9e1a1be 100644
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
-#include <linux/mbus.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/dma-mapping.h>

@@ -25,6 +24,7 @@
 #include <asm/sizes.h>
 #include <asm/unaligned.h>
 #include <plat/mvsdio.h>
+#include <plat/addr-map.h>
 
 #include "mvsdio.h"
 

@@ -679,27 +679,6 @@ static const struct mmc_host_ops mvsd_ops = {
 	.enable_sdio_irq	= mvsd_enable_sdio_irq,
 };
 
-static void __init mv_conf_mbus_windows(struct mvsd_host *host,
-					struct mbus_dram_target_info *dram)
-{
-	void __iomem *iobase = host->base;
-	int i;
-
-	for (i = 0; i < 4; i++) {
-		writel(0, iobase + MVSD_WINDOW_CTRL(i));
-		writel(0, iobase + MVSD_WINDOW_BASE(i));
-	}
-
-	for (i = 0; i < dram->num_cs; i++) {
-		struct mbus_dram_window *cs = dram->cs + i;
-		writel(((cs->size - 1) & 0xffff0000) |
-		       (cs->mbus_attr << 8) |
-		       (dram->mbus_dram_target_id << 4) | 1,
-		       iobase + MVSD_WINDOW_CTRL(i));
-		writel(cs->base, iobase + MVSD_WINDOW_BASE(i));
-	}
-}
-
 static int __init mvsd_probe(struct platform_device *pdev)
 {
 	struct mmc_host *mmc = NULL;

@@ -754,9 +733,8 @@ static int __init mvsd_probe(struct platform_device *pdev)
 		goto out;
 	}
 
-	/* (Re-)program MBUS remapping windows if we are asked to. */
-	if (mvsd_data->dram != NULL)
-		mv_conf_mbus_windows(host, mvsd_data->dram);
+	/* (Re-)program MBUS remapping windows. */
+	mvsd_conf_mbus_windows(host->base);
 
 	mvsd_power_down(host);
 

index 7d9727b..7e07793 100644
@@ -63,10 +63,6 @@
 #define MVSD_AUTO_RSP2				0x098
 #define MVSD_CLK_DIV				0x128
 
-#define MVSD_WINDOW_CTRL(i)			(0x108 + ((i) << 3))
-#define MVSD_WINDOW_BASE(i)			(0x10c + ((i) << 3))
-
-
 /*
  * MVSD_CMD
  */

70 lines not on this page · raw message

index 395bdb0..e233865 100644
@@ -11,8 +11,8 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
-#include <linux/mbus.h>
 #include <plat/ehci-orion.h>
+#include <plat/addr-map.h>
 
 #define rdl(off)	__raw_readl(hcd->regs + (off))
 #define wrl(off, val)	__raw_writel((val), hcd->regs + (off))

@@ -21,8 +21,6 @@
 #define USB_MODE		0x1a8
 #define USB_CAUSE		0x310
 #define USB_MASK		0x314
-#define USB_WINDOW_CTRL(i)	(0x320 + ((i) << 4))
-#define USB_WINDOW_BASE(i)	(0x324 + ((i) << 4))
 #define USB_IPG			0x360
 #define USB_PHY_PWR_CTRL	0x400
 #define USB_PHY_TX_CTRL		0x420

@@ -170,27 +168,6 @@ static const struct hc_driver ehci_orion_hc_driver = {
 	.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
 };
 
-static void __init
-ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
-				struct mbus_dram_target_info *dram)
-{
-	int i;
-
-	for (i = 0; i < 4; i++) {
-		wrl(USB_WINDOW_CTRL(i), 0);
-		wrl(USB_WINDOW_BASE(i), 0);
-	}
-
-	for (i = 0; i < dram->num_cs; i++) {
-		struct mbus_dram_window *cs = dram->cs + i;
-
-		wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
-					(cs->mbus_attr << 8) |
-					(dram->mbus_dram_target_id << 4) | 1);
-		wrl(USB_WINDOW_BASE(i), cs->base);
-	}
-}
-
 static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
 {
 	struct orion_ehci_data *pd = pdev->dev.platform_data;

@@ -257,10 +234,9 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
 	ehci->sbrn = 0x20;
 
 	/*
-	 * (Re-)program MBUS remapping windows if we are asked to.
+	 * (Re-)program MBUS remapping windows.
 	 */
-	if (pd != NULL && pd->dram != NULL)
-		ehci_orion_conf_mbus_windows(hcd, pd->dram);
+	ehci_orion_conf_mbus_windows(hcd->regs);
 
 	/*
 	 * setup Orion USB controller.

index cd33de1..ce4b624 100644
@@ -17,8 +17,8 @@
 #include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/dma-mapping.h>
-#include <linux/mbus.h>
 #include <sound/soc.h>
+#include <plat/addr-map.h>
 #include "kirkwood.h"
 
 #define KIRKWOOD_RATES \

@@ -94,30 +94,6 @@ static irqreturn_t kirkwood_dma_irq(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-static void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
-					unsigned long dma,
-					struct mbus_dram_target_info *dram)
-{
-	int i;
-
-	/* First disable and clear windows */
-	writel(0, base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
-	writel(0, base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
-
-	/* try to find matching cs for current dma address */
-	for (i = 0; i < dram->num_cs; i++) {
-		struct mbus_dram_window *cs = dram->cs + i;
-		if ((cs->base & 0xffff0000) < (dma & 0xffff0000)) {
-			writel(cs->base & 0xffff0000,
-				base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
-			writel(((cs->size - 1) & 0xffff0000) |
-				(cs->mbus_attr << 8) |
-				(dram->mbus_dram_target_id << 4) | 1,
-				base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
-		}
-	}
-}
-
 static int kirkwood_dma_open(struct snd_pcm_substream *substream)
 {
 	int err;

@@ -179,11 +155,11 @@ static int kirkwood_dma_open(struct snd_pcm_substream *substream)
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 		prdata->play_stream = substream;
 		kirkwood_dma_conf_mbus_windows(priv->io,
-			KIRKWOOD_PLAYBACK_WIN, addr, priv->dram);
+			KIRKWOOD_PLAYBACK_WIN, addr);
 	} else {
 		prdata->rec_stream = substream;
 		kirkwood_dma_conf_mbus_windows(priv->io,
-			KIRKWOOD_RECORD_WIN, addr, priv->dram);
+			KIRKWOOD_RECORD_WIN, addr);
 	}
 
 	return 0;

index bb6e6a5..1293689 100644
@@ -16,10 +16,6 @@
 #define KIRKWOOD_PLAYBACK_WIN			1
 #define KIRKWOOD_MAX_AUDIO_WIN			2
 
-#define KIRKWOOD_AUDIO_WIN_BASE_REG(win)	(0xA00 + ((win)<<3))
-#define KIRKWOOD_AUDIO_WIN_CTRL_REG(win)	(0xA04 + ((win)<<3))
-
-
 #define KIRKWOOD_RECCTL			0x1000
 #define KIRKWOOD_RECCTL_SPDIF_EN		(1<<11)
 #define KIRKWOOD_RECCTL_I2S_EN			(1<<10)

index c11ff29325..2d8989c6e4 100644
@@ -32,5 +32,17 @@ struct mbus_dram_target_info
 	} cs[4];
 };
 
+/* 
+ * The Marvell mbus is to be found only on SOCs from the Orion family
+ * at the moment.  Provide a dummy stub for other architectures.
+ */
+#ifdef CONFIG_PLAT_ORION
+extern const struct mbus_dram_target_info *mrvl_mbus_dram_info(void);
+#else
+static inline const struct mbus_dram_target_info *mrvl_mbus_dram_info(void)
+{
+	return NULL;
+}
+#endif
 
 #endif

index 29c1881..29ff0d0 100644
@@ -14,7 +14,6 @@
 #include <linux/platform_device.h>
 #include <linux/pci.h>
 #include <linux/clk.h>
-#include <linux/mbus.h>
 #include <linux/ata_platform.h>
 #include <linux/gpio.h>
 #include <asm/page.h>

@@ -72,8 +71,7 @@ void __init dove_map_io(void)
  ****************************************************************************/
 void __init dove_ehci0_init(void)
 {
-	orion_ehci_init(&orion_mbus_dram_info,
-			DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
+	orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
 }
 
 /*****************************************************************************

@@ -81,8 +79,7 @@ void __init dove_ehci0_init(void)
  ****************************************************************************/
 void __init dove_ehci1_init(void)
 {
-	orion_ehci_1_init(&orion_mbus_dram_info,
-			  DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
+	orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
 }
 
 /*****************************************************************************

@@ -90,7 +87,7 @@ void __init dove_ehci1_init(void)
  ****************************************************************************/
 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge00_init(eth_data, &orion_mbus_dram_info,
+	orion_ge00_init(eth_data,
 			DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
 			0, get_tclk());
 }

@@ -108,8 +105,7 @@ void __init dove_rtc_init(void)
  ****************************************************************************/
 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
 {
-	orion_sata_init(sata_data, &orion_mbus_dram_info,
-			DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
+	orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
 
 }
 

@@ -199,8 +195,7 @@ struct sys_timer dove_timer = {
  ****************************************************************************/
 void __init dove_xor0_init(void)
 {
-	orion_xor0_init(&orion_mbus_dram_info,
-			DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
+	orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
 			IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
 }
 

index d8b4ed2..6badde5 100644
@@ -12,7 +12,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
-#include <linux/mbus.h>
 #include <linux/ata_platform.h>
 #include <linux/mtd/nand.h>
 #include <linux/dma-mapping.h>

@@ -74,8 +73,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
 void __init kirkwood_ehci_init(void)
 {
 	kirkwood_clk_ctrl |= CGC_USB0;
-	orion_ehci_init(&orion_mbus_dram_info,
-			USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
+	orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
 }
 
 

@@ -86,7 +84,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
 	kirkwood_clk_ctrl |= CGC_GE0;
 
-	orion_ge00_init(eth_data, &orion_mbus_dram_info,
+	orion_ge00_init(eth_data,
 			GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
 			IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
 }

@@ -100,7 +98,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 
 	kirkwood_clk_ctrl |= CGC_GE1;
 
-	orion_ge01_init(eth_data, &orion_mbus_dram_info,
+	orion_ge01_init(eth_data,
 			GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
 			IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
 }

@@ -179,8 +177,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 	if (sata_data->n_ports > 1)
 		kirkwood_clk_ctrl |= CGC_SATA1;
 
-	orion_sata_init(sata_data, &orion_mbus_dram_info,
-			SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
+	orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 }
 
 

@@ -222,7 +219,6 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 		mvsdio_data->clock = 100000000;
 	else
 		mvsdio_data->clock = 200000000;
-	mvsdio_data->dram = &orion_mbus_dram_info;
 	kirkwood_clk_ctrl |= CGC_SDIO;
 	kirkwood_sdio.dev.platform_data = mvsdio_data;
 	platform_device_register(&kirkwood_sdio);

@@ -286,8 +282,7 @@ static void __init kirkwood_xor0_init(void)
 {
 	kirkwood_clk_ctrl |= CGC_XOR0;
 
-	orion_xor0_init(&orion_mbus_dram_info,
-			XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
+	orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
 			IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 }
 

@@ -365,7 +360,6 @@ static struct resource kirkwood_i2s_resources[] = {
 };
 
 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
-	.dram        = &orion_mbus_dram_info,
 	.burst       = 128,
 };
 

index be0c232..534ce20 100644
@@ -12,7 +12,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
-#include <linux/mbus.h>
 #include <linux/ata_platform.h>
 #include <linux/ethtool.h>
 #include <asm/mach/map.h>

@@ -170,8 +169,7 @@ void __init mv78xx0_map_io(void)
  ****************************************************************************/
 void __init mv78xx0_ehci0_init(void)
 {
-	orion_ehci_init(&orion_mbus_dram_info,
-			USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
+	orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
 }
 
 

@@ -180,8 +178,7 @@ void __init mv78xx0_ehci0_init(void)
  ****************************************************************************/
 void __init mv78xx0_ehci1_init(void)
 {
-	orion_ehci_1_init(&orion_mbus_dram_info,
-			  USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
+	orion_ehci_1_init(USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
 }
 
 

@@ -190,8 +187,7 @@ void __init mv78xx0_ehci1_init(void)
  ****************************************************************************/
 void __init mv78xx0_ehci2_init(void)
 {
-	orion_ehci_2_init(&orion_mbus_dram_info,
-			  USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
+	orion_ehci_2_init(USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
 }
 
 

@@ -200,7 +196,7 @@ void __init mv78xx0_ehci2_init(void)
  ****************************************************************************/
 void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge00_init(eth_data, &orion_mbus_dram_info,
+	orion_ge00_init(eth_data,
 			GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
 			IRQ_MV78XX0_GE_ERR, get_tclk());
 }

@@ -211,7 +207,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  ****************************************************************************/
 void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge01_init(eth_data, &orion_mbus_dram_info,
+	orion_ge01_init(eth_data,
 			GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
 			NO_IRQ, get_tclk());
 }

@@ -235,7 +231,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
 		eth_data->duplex = DUPLEX_FULL;
 	}
 
-	orion_ge10_init(eth_data, &orion_mbus_dram_info,
+	orion_ge10_init(eth_data,
 			GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM,
 			NO_IRQ, get_tclk());
 }

@@ -259,7 +255,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
 		eth_data->duplex = DUPLEX_FULL;
 	}
 
-	orion_ge11_init(eth_data, &orion_mbus_dram_info,
+	orion_ge11_init(eth_data,
 			GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM,
 			NO_IRQ, get_tclk());
 }

@@ -278,8 +274,7 @@ void __init mv78xx0_i2c_init(void)
  ****************************************************************************/
 void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data)
 {
-	orion_sata_init(sata_data, &orion_mbus_dram_info,
-			SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
+	orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
 }
 
 

index 27addd5..c0dea6e 100644
@@ -15,7 +15,6 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/serial_8250.h>
-#include <linux/mbus.h>
 #include <linux/mv643xx_i2c.h>
 #include <linux/ata_platform.h>
 #include <net/dsa.h>

@@ -72,8 +71,7 @@ void __init orion5x_map_io(void)
  ****************************************************************************/
 void __init orion5x_ehci0_init(void)
 {
-	orion_ehci_init(&orion_mbus_dram_info,
-			ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
+	orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
 }
 
 

@@ -82,8 +80,7 @@ void __init orion5x_ehci0_init(void)
  ****************************************************************************/
 void __init orion5x_ehci1_init(void)
 {
-	orion_ehci_1_init(&orion_mbus_dram_info,
-			  ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
+	orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
 }
 
 

@@ -92,7 +89,7 @@ void __init orion5x_ehci1_init(void)
  ****************************************************************************/
 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 {
-	orion_ge00_init(eth_data, &orion_mbus_dram_info,
+	orion_ge00_init(eth_data,
 			ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
 			IRQ_ORION5X_ETH_ERR, orion5x_tclk);
 }

@@ -122,8 +119,7 @@ void __init orion5x_i2c_init(void)
  ****************************************************************************/
 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 {
-	orion_sata_init(sata_data, &orion_mbus_dram_info,
-			ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
+	orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
 }
 
 

@@ -159,8 +155,7 @@ void __init orion5x_uart1_init(void)
  ****************************************************************************/
 void __init orion5x_xor_init(void)
 {
-	orion_xor0_init(&orion_mbus_dram_info,
-			ORION5X_XOR_PHYS_BASE,
+	orion_xor0_init(ORION5X_XOR_PHYS_BASE,
 			ORION5X_XOR_PHYS_BASE + 0x200,
 			IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
 }

169 lines not on this page · raw message

index 9cf1f78..885f8ab 100644
@@ -1,11 +1,8 @@
 #ifndef __PLAT_AUDIO_H
 #define __PLAT_AUDIO_H
 
-#include <linux/mbus.h>
-
 struct kirkwood_asoc_platform_data {
 	u32 tclk;
-	struct mbus_dram_target_info *dram;
 	int burst;
 };
 #endif

index a63c357..0fe08d7 100644
@@ -37,28 +37,24 @@ void __init orion_rtc_init(unsigned long mapbase,
 			   unsigned long irq);
 
 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
-			    struct mbus_dram_target_info *mbus_dram_info,
 			    unsigned long mapbase,
 			    unsigned long irq,
 			    unsigned long irq_err,
 			    int tclk);
 
 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
-			    struct mbus_dram_target_info *mbus_dram_info,
 			    unsigned long mapbase,
 			    unsigned long irq,
 			    unsigned long irq_err,
 			    int tclk);
 
 void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
-			    struct mbus_dram_target_info *mbus_dram_info,
 			    unsigned long mapbase,
 			    unsigned long irq,
 			    unsigned long irq_err,
 			    int tclk);
 
 void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
-			    struct mbus_dram_target_info *mbus_dram_info,
 			    unsigned long mapbase,
 			    unsigned long irq,
 			    unsigned long irq_err,

@@ -82,8 +78,7 @@ void __init orion_spi_1_init(unsigned long mapbase,
 
 void __init orion_wdt_init(unsigned long tclk);
 
-void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info,
-			    unsigned long mapbase_low,
+void __init orion_xor0_init(unsigned long mapbase_low,
 			    unsigned long mapbase_high,
 			    unsigned long irq_0,
 			    unsigned long irq_1);

@@ -93,20 +88,16 @@ void __init orion_xor1_init(unsigned long mapbase_low,
 			    unsigned long irq_0,
 			    unsigned long irq_1);
 
-void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info,
-			    unsigned long mapbase,
+void __init orion_ehci_init(unsigned long mapbase,
 			    unsigned long irq);
 
-void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info,
-			      unsigned long mapbase,
+void __init orion_ehci_1_init(unsigned long mapbase,
 			      unsigned long irq);
 
-void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info,
-			      unsigned long mapbase,
+void __init orion_ehci_2_init(unsigned long mapbase,
 			      unsigned long irq);
 
 void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
-			    struct mbus_dram_target_info *mbus_dram_info,
 			    unsigned long mapbase,
 			    unsigned long irq);
 

index 4ec668e..6fc78e4 100644
@@ -19,7 +19,6 @@ enum orion_ehci_phy_ver {
 };
 
 struct orion_ehci_data {
-	struct mbus_dram_target_info	*dram;
 	enum orion_ehci_phy_ver phy_version;
 };
 

index bd5f3bd..2ba1f7d 100644
@@ -13,12 +13,6 @@
 #define MV_XOR_SHARED_NAME	"mv_xor_shared"
 #define MV_XOR_NAME		"mv_xor"
 
-struct mbus_dram_target_info;
-
-struct mv_xor_platform_shared_data {
-	struct mbus_dram_target_info	*dram;
-};
-
 struct mv_xor_platform_data {
 	struct platform_device		*shared;
 	int				hw_id;

index 14ca886..1190efe 100644
@@ -12,7 +12,6 @@
 #include <linux/mbus.h>
 
 struct mvsdio_platform_data {
-	struct mbus_dram_target_info *dram;
 	unsigned int clock;
 	int gpio_card_detect;
 	int gpio_write_protect;

index 43c6d2a..a9a367a 100644
@@ -4118,8 +4118,6 @@ static int mv_platform_resume(struct platform_device *pdev)
 
 	if (host) {
 		struct mv_host_priv *hpriv = host->private_data;
-		const struct mv_sata_platform_data *mv_platform_data = \
-			pdev->dev.platform_data;
 		/*
 		 * (Re-)program MBUS remapping windows.
 		 */

index 10f8518..2835adb 100644
@@ -1260,7 +1260,6 @@ static struct platform_driver mv_xor_driver = {
 
 static int mv_xor_shared_probe(struct platform_device *pdev)
 {
-	struct mv_xor_platform_shared_data *msd = pdev->dev.platform_data;
 	struct mv_xor_shared_private *msp;
 	struct resource *res;
 

index 9a26c83..b856a2a 100644
@@ -27,10 +27,7 @@ extern int __devexit __pata_platform_remove(struct device *dev);
 /*
  * Marvell SATA private data
  */
-struct mbus_dram_target_info;
-
 struct mv_sata_platform_data {
-	struct mbus_dram_target_info	*dram;
 	int	n_ports; /* number of sata ports */
 };
 

index cfb9ee3..946a4b0 100644
@@ -168,98 +168,83 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
 	orion_mbus_dram_info.num_cs = cs;
 }
 
-#define XOR_WINDOW_BASE(w)		(0x250 + ((w) << 2))
-#define XOR_WINDOW_SIZE(w)		(0x270 + ((w) << 2))
-#define XOR_WINDOW_REMAP_HIGH(w)	(0x290 + ((w) << 2))
-#define XOR_WINDOW_BAR_ENABLE(chan)	(0x240 + ((chan) << 2))
-
-void
-mv_xor_conf_mbus_windows(void __iomem *base)
-{
-	u32 win_enable = 0;
-	struct mbus_dram_window *cs;
-	int i;
-
-	for (i = 0; i < 8; i++) {
-		writel(0, base + XOR_WINDOW_BASE(i));
-		writel(0, base + XOR_WINDOW_SIZE(i));
-		if (i < 4)
-			writel(0, base + XOR_WINDOW_REMAP_HIGH(i));
+#define WIN_X(_X_, _devname_, _off_, _shift_)		\
+	static u32 _devname_ ## _win_ ## _X_(u32 i)	\
+	{						\
+		return _off_ + ((i) << _shift_);	\
+							\
 	}
 
-	for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
-		cs = orion_mbus_dram_info.cs + i;
+#define WIN_BASE(_devname_, _off_, _shift_)	\
+	WIN_X(base, _devname_, _off_, _shift_)
 
-		writel((cs->base & 0xffff0000) |
-		       (cs->mbus_attr << 8) |
-		       orion_mbus_dram_info.mbus_dram_target_id,
-		       base + XOR_WINDOW_BASE(i));
-		writel((cs->size - 1) & 0xffff0000, base + XOR_WINDOW_SIZE(i));
+#define WIN_CTRL(_devname_, _off_, _shift_)	\
+	WIN_X(ctrl, _devname_, _off_, _shift_)
 
-		win_enable |= (1 << i);
-		win_enable |= 3 << (16 + (2 * i));
-	}
+#define WIN_SIZE(_devname_, _off_, _shift_)	\
+	WIN_X(size, _devname_, _off_, _shift_)
 
-	writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(0));
-	writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(1));
-}
+#define WIN_REMAP(_devname_, _off_, _shift_)	\
+	WIN_X(remap, _devname_, _off_, _shift_)
 
-#define USB_WINDOW_CTRL(i)	(0x320 + ((i) << 4))
-#define USB_WINDOW_BASE(i)	(0x324 + ((i) << 4))
-#define rdl(off)	__raw_readl(base + (off))
-#define wrl(off, val)	__raw_writel((val), base + (off))
+WIN_BASE(xor, 0x250, 2);
+WIN_SIZE(xor, 0x270, 2);
+WIN_REMAP(xor, 0x290, 2);
+WIN_CTRL(usb, 0x320, 4);
+WIN_BASE(usb, 0x324, 4);
+WIN_CTRL(sata, 0x20030, 4);
+WIN_BASE(sata, 0x20034, 4);
+WIN_BASE(eth, 0x200, 3);
+WIN_SIZE(eth, 0x204, 3);
+WIN_REMAP(eth, 0x0280, 2);
+WIN_CTRL(mvsd, 0x108, 3);
+WIN_BASE(mvsd, 0x10c, 3);
 
-void __init
-ehci_orion_conf_mbus_windows(void __iomem *base)
+typedef u32 (*woff_t)(u32);
+
+void mbus_windows_base_size(void __iomem *base, woff_t off_base,
+			    woff_t off_size, woff_t off_remap, int maxwin)
 {
 	int i;
 	struct mbus_dram_window *cs;
 
-	for (i = 0; i < 4; i++) {
-		wrl(USB_WINDOW_CTRL(i), 0);
-		wrl(USB_WINDOW_BASE(i), 0);
+	for (i = 0; i < maxwin; i++) {
+		writel(0, base + off_base(i));
+		writel(0, base + off_size(i));
+		if (i < 4)
+			writel(0, base + off_remap(i));
 	}
 
 	for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
 		cs = orion_mbus_dram_info.cs + i;
-
-		wrl(USB_WINDOW_CTRL(i),
-		    ((cs->size - 1) & 0xffff0000) |
-		    (cs->mbus_attr << 8) |
-		    (orion_mbus_dram_info.mbus_dram_target_id << 4) | 1);
-		wrl(USB_WINDOW_BASE(i), cs->base);
+		writel((cs->base & 0xffff0000) |
+		       (cs->mbus_attr << 8) |
+		       orion_mbus_dram_info.mbus_dram_target_id,
+		       base + off_base(i));
+		writel((cs->size - 1) & 0xffff0000, base + off_size(i));
 	}
 }
 
-#define SATA_WINDOW_CTRL(i)		(0x20030 + ((i) << 4))
-#define SATA_WINDOW_BASE(i)		(0x20034 + ((i) << 4))
-
+#define XOR_WINDOW_BAR_ENABLE(chan)	(0x240 + ((chan) << 2))
 
-void mv_sata_conf_mbus_windows(void __iomem *base)
+void
+mv_xor_conf_mbus_windows(void __iomem *base)
 {
+	u32 win_enable = 0;
 	int i;
-	struct mbus_dram_window *cs;
 
-	for (i = 0; i < 4; i++) {
-		writel(0, base + SATA_WINDOW_CTRL(i));
-		writel(0, base + SATA_WINDOW_BASE(i));
-	}
+	mbus_windows_base_size(base, xor_win_base, xor_win_size,
+			       xor_win_remap, 8);
 
 	for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
-		cs = orion_mbus_dram_info.cs + i;
-
-		writel(((cs->size - 1) & 0xffff0000) |
-			(cs->mbus_attr << 8) |
-			(orion_mbus_dram_info.mbus_dram_target_id << 4) | 1,
-			base + SATA_WINDOW_CTRL(i));
-		writel(cs->base, base + SATA_WINDOW_BASE(i));
+		win_enable |= (1 << i);
+		win_enable |= 3 << (16 + (2 * i));
 	}
-}
 
+	writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(0));
+	writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(1));
+}
 
-#define ETH_WINDOW_BASE(w)		(0x0200 + ((w) << 3))
-#define ETH_WINDOW_SIZE(w)		(0x0204 + ((w) << 3))
-#define ETH_WINDOW_REMAP_HIGH(w)	(0x0280 + ((w) << 2))
 #define ETH_WINDOW_BAR_ENABLE		0x0290
 
 u32

@@ -268,26 +253,14 @@ mv643xx_eth_conf_mbus_windows(void __iomem *base)
 	u32 win_enable;
 	u32 win_protect;
 	int i;
-	struct mbus_dram_window *cs;
 
-	for (i = 0; i < 6; i++) {
-		writel(0, base + ETH_WINDOW_BASE(i));
-		writel(0, base + ETH_WINDOW_SIZE(i));
-		if (i < 4)
-			writel(0, base + ETH_WINDOW_REMAP_HIGH(i));
-	}
+	mbus_windows_base_size(base, eth_win_base, eth_win_size,
+			       eth_win_remap, 6);
 
 	win_enable = 0x3f;
 	win_protect = 0;
 
 	for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
-		cs = orion_mbus_dram_info.cs + i;
-		writel((cs->base & 0xffff0000) |
-		       (cs->mbus_attr << 8) |
-		       orion_mbus_dram_info.mbus_dram_target_id,
-		       base + ETH_WINDOW_BASE(i));
-		writel((cs->size - 1) & 0xffff0000, base + ETH_WINDOW_SIZE(i));
-
 		win_enable &= ~(1 << i);
 		win_protect |= 3 << (2 * i);
 	}

@@ -296,29 +269,45 @@ mv643xx_eth_conf_mbus_windows(void __iomem *base)
 	return win_protect;
 }
 
-#define MVSD_WINDOW_CTRL(i)			(0x108 + ((i) << 3))
-#define MVSD_WINDOW_BASE(i)			(0x10c + ((i) << 3))
-
-void mvsd_conf_mbus_windows(void __iomem *base)
+void
+mbus_windows_ctrl_base(void __iomem *base, woff_t off_ctrl, woff_t off_base)
 {
 	int i;
 	struct mbus_dram_window *cs;
 
 	for (i = 0; i < 4; i++) {
-		writel(0, base + MVSD_WINDOW_CTRL(i));
-		writel(0, base + MVSD_WINDOW_BASE(i));
+		writel(0, base + off_ctrl(i));
+		writel(0, base + off_base(i));
 	}
 
 	for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
 		cs = orion_mbus_dram_info.cs + i;
+
 		writel(((cs->size - 1) & 0xffff0000) |
 		       (cs->mbus_attr << 8) |
 		       (orion_mbus_dram_info.mbus_dram_target_id << 4) | 1,
-		       base + MVSD_WINDOW_CTRL(i));
-		writel(cs->base, base + MVSD_WINDOW_BASE(i));
+		       base + off_ctrl(i));
+		writel(cs->base, base + off_base(i));
 	}
 }
 
+void __init
+ehci_orion_conf_mbus_windows(void __iomem *base)
+{
+	mbus_windows_ctrl_base(base, usb_win_ctrl, usb_win_base);
+}
+
+void mv_sata_conf_mbus_windows(void __iomem *base)
+{
+	mbus_windows_ctrl_base(base, sata_win_ctrl, sata_win_base);
+}
+
+void mvsd_conf_mbus_windows(void __iomem *base)
+{
+	mbus_windows_ctrl_base(base, mvsd_win_ctrl, mvsd_win_base);
+}
+
+
 #define KIRKWOOD_AUDIO_WIN_BASE_REG(win)	(0xA00 + ((win)<<3))
 #define KIRKWOOD_AUDIO_WIN_CTRL_REG(win)	(0xA04 + ((win)<<3))
 

@@ -337,12 +326,12 @@ void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
 		cs = orion_mbus_dram_info.cs + i;
 		if ((cs->base & 0xffff0000) < (dma & 0xffff0000)) {
 			writel(cs->base & 0xffff0000,
-				base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
+			       base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
 			writel(((cs->size - 1) & 0xffff0000) |
-				(cs->mbus_attr << 8) |
-				(orion_mbus_dram_info.mbus_dram_target_id << 4)
+			       (cs->mbus_attr << 8) |
+			       (orion_mbus_dram_info.mbus_dram_target_id << 4)
 			       | 1,
-				base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
+			       base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
 		}
 	}
 }