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x86, amd: Add missing feature flags for fam15h models 10h-1fh processors

PATCH Superseded Andreas Herrmann 1 participant 3 messages Jan 5, 2012 – Jan 26, 2012 x86

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#0 lore raw

PATCH 1/1 x86, amd: Add missing feature flags for fam15h models 10h-1fh processors

---
 arch/x86/include/asm/cpufeature.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
arch/x86/include/asm/cpufeature.h +2 -0
index f3444f7..6f20bd7 100644
@@ -159,6 +159,7 @@
 #define X86_FEATURE_WDT		(6*32+13) /* Watchdog timer */
 #define X86_FEATURE_LWP		(6*32+15) /* Light Weight Profiling */
 #define X86_FEATURE_FMA4	(6*32+16) /* 4 operands MAC instructions */
+#define X86_FEATURE_TCE		(6*32+17) /* translation cache extension */
 #define X86_FEATURE_NODEID_MSR	(6*32+19) /* NodeId MSR */
 #define X86_FEATURE_TBM		(6*32+21) /* trailing bit manipulations */
 #define X86_FEATURE_TOPOEXT	(6*32+22) /* topology extensions CPUID leafs */
@@ -197,6 +198,7 @@
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
 #define X86_FEATURE_FSGSBASE	(9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
+#define X86_FEATURE_BMI1	(9*32+ 3) /* bit manipulation instructions */
 #define X86_FEATURE_SMEP	(9*32+ 7) /* Supervisor Mode Execution Protection */
 #define X86_FEATURE_ERMS	(9*32+ 9) /* Enhanced REP MOVSB/STOSB */
 
Signature · 1 line
1.7.5.rc3
#1 lore raw

PATCH RESEND 1/1 x86, amd: Add missing feature flag for fam15h models 10h-1fh processors

That is the last one missing for those CPUs.

Others were recently added with commits

fb215366b3c7320ac25dca766a0152df16534932
(KVM: expose latest Intel cpu new features (BMI1/BMI2/FMA/AVX2) to guest)

and

commit 969df4b82904a30fef19a67398a0c854d223ea67 (x86: Report cpb and eff_freq_ro flags correctly)

---

Please apply.

Thanks,

Andreas

 arch/x86/include/asm/cpufeature.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/x86/include/asm/cpufeature.h +1 -0
index 17c5d4b..8d67d42 100644
@@ -159,6 +159,7 @@
 #define X86_FEATURE_WDT		(6*32+13) /* Watchdog timer */
 #define X86_FEATURE_LWP		(6*32+15) /* Light Weight Profiling */
 #define X86_FEATURE_FMA4	(6*32+16) /* 4 operands MAC instructions */
+#define X86_FEATURE_TCE		(6*32+17) /* translation cache extension */
 #define X86_FEATURE_NODEID_MSR	(6*32+19) /* NodeId MSR */
 #define X86_FEATURE_TBM		(6*32+21) /* trailing bit manipulations */
 #define X86_FEATURE_TOPOEXT	(6*32+22) /* topology extensions CPUID leafs */
Signature · 1 line
1.7.8.3
#2 lore raw

[tip:x86/urgent] x86/amd: Add missing feature flag for fam15h models 10h-1fh processors

Commit-ID:  652847aa449cfe364d40018849223f57f31a38e2
Gitweb:     http://git.kernel.org/tip/652847aa449cfe364d40018849223f57f31a38e2
Author:     Andreas Herrmann <[email protected]>
AuthorDate: Fri, 20 Jan 2012 17:38:23 +0100
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 26 Jan 2012 12:06:38 +0100

x86/amd: Add missing feature flag for fam15h models 10h-1fh processors

That is the last one missing for those CPUs.

Others were recently added with commits

fb215366b3c7320ac25dca766a0152df16534932
(KVM: expose latest Intel cpu new features (BMI1/BMI2/FMA/AVX2) to guest)

and

commit 969df4b82904a30fef19a67398a0c854d223ea67 (x86: Report cpb and eff_freq_ro flags correctly)

---
 arch/x86/include/asm/cpufeature.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/x86/include/asm/cpufeature.h +1 -0
index 17c5d4b..8d67d42 100644
@@ -159,6 +159,7 @@
 #define X86_FEATURE_WDT		(6*32+13) /* Watchdog timer */
 #define X86_FEATURE_LWP		(6*32+15) /* Light Weight Profiling */
 #define X86_FEATURE_FMA4	(6*32+16) /* 4 operands MAC instructions */
+#define X86_FEATURE_TCE		(6*32+17) /* translation cache extension */
 #define X86_FEATURE_NODEID_MSR	(6*32+19) /* NodeId MSR */
 #define X86_FEATURE_TBM		(6*32+21) /* trailing bit manipulations */
 #define X86_FEATURE_TOPOEXT	(6*32+22) /* topology extensions CPUID leafs */