ARM: dt: Add binding for Tegra PMC
PATCH 1/3 ARM: dt: Add binding for Tegra PMC
The Tegra PMC (Power Management Controller) interfaces with an external PMU (Power Management Unit), and controls wake-up from sleep modes.
This initial binding is the bare minimum required to control the PMC's inversion of the PMU's interrupt signal.
--- .../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 19 +++++++++++++++++++ arch/arm/boot/dts/tegra-harmony.dts | 4 ++++ arch/arm/boot/dts/tegra20.dtsi | 5 +++++ arch/arm/boot/dts/tegra30.dtsi | 5 +++++ 4 files changed, 33 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt new file +19 -0
@@ -0,0 +1,19 @@ +NVIDIA Tegra Power Management Controller (PMC) + +Properties: +- name : Should be pmc +- compatible : Should contain "nvidia,tegra<chip>-pmc". +- reg : Offset and length of the register set for the device +- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal. + The PMU is an external Power Management Unit, whose interrupt output + signal is fed into the PMC. This signal is optionally inverted, and then + fed into the ARM GIC. The PMC is not involved in the detection or + handling of this interrupt signal, merely its inversion. + +Example: + +pmc at 7000f400 { + compatible = "nvidia,tegra20-pmc"; + reg = <0x7000e400 0x400>; + nvidia,invert-interrupt; +};
arch/arm/boot/dts/tegra-harmony.dts +4 -0
@@ -10,6 +10,10 @@ reg = < 0x00000000 0x40000000 >; }; + pmc at 7000f400 { + nvidia,invert-interrupt; + }; + i2c at 7000c000 { clock-frequency = <400000>;
arch/arm/boot/dts/tegra20.dtsi +5 -0
@@ -4,6 +4,11 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&intc>; + pmc at 7000f400 { + compatible = "nvidia,tegra20-pmc"; + reg = <0x7000e400 0x400>; + }; + intc: interrupt-controller at 50041000 { compatible = "arm,cortex-a9-gic"; interrupt-controller;
arch/arm/boot/dts/tegra30.dtsi +5 -0
@@ -4,6 +4,11 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; + pmc at 7000f400 { + compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; + reg = <0x7000e400 0x400>; + }; + intc: interrupt-controller at 50041000 { compatible = "arm,cortex-a9-gic"; interrupt-controller;
Signature · 1 line
1.7.0.4
PATCH 2/3 ARM: tegra: Add a simple PMC driver
This PMC driver is enough to parse the nvidia,invert-interrupt property from device tree, and configure the PMC's to honor that.
In the future, this file could expand to centralize all other PMC accesses within the mach-tegra code.
--- arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/common.c | 3 ++ arch/arm/mach-tegra/pmc.c | 76 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/pmc.h | 23 +++++++++++++ 4 files changed, 103 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-tegra/pmc.c create mode 100644 arch/arm/mach-tegra/pmc.h
arch/arm/mach-tegra/Makefile +1 -0
@@ -6,6 +6,7 @@ obj-y += irq.o obj-y += clock.o obj-y += timer.o obj-y += fuse.o +obj-y += pmc.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
arch/arm/mach-tegra/common.c +3 -0
@@ -32,6 +32,7 @@#include "board.h" #include "clock.h" #include "fuse.h" +#include "pmc.h" /* * Storage for debug-macro.S's state.
@@ -117,6 +118,7 @@ void __init tegra20_init_early(void)tegra2_init_clocks ();tegra_clk_init_from_table (tegra20_clk_init_table);tegra_init_cache (0x331 ,0x441 ); + tegra_pmc_init(); }#endif #ifdef CONFIG_ARCH_TEGRA_3x_SOC
@@ -124,5 +126,6 @@ void __init tegra30_init_early(void) {tegra30_init_clocks ();tegra_init_cache (0x441 ,0x551 ); +tegra_pmc_init (); }#endif
arch/arm/mach-tegra/pmc.c new file +76 -0
76 lines not on this page · raw message
arch/arm/mach-tegra/pmc.h new file +23 -0
@@ -0,0 +1,23 @@ +/* +* Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see <http://www.gnu.org/licenses/>. +* +*/ + +#ifndef __MACH_TEGRA_PMC_H +#define __MACH_TEGRA_PMC_H + +void tegra_pmc_init (void ); + +#endif
Signature · 1 line
1.7.0.4
PATCH 3/3 ARM: tegra: Remove duplicate PMU interrupt inversion code
In reply to Stephen WarrenThe new PMC driver now configures the PMU interrupt inversion, so board files don't need to poke the PMC registers directly to achieve this.
--- arch/arm/mach-tegra/board-harmony-power.c | 15 --------------- 1 files changed, 0 insertions(+), 15 deletions(-)
arch/arm/mach-tegra/board-harmony-power.c +0 -15
@@ -18,18 +18,13 @@#include <linux/i2c.h> #include <linux/platform_device.h> #include <linux/gpio.h> -#include <linux/io.h> #include <linux/regulator/machine.h> #include <linux/mfd/tps6586x.h> -#include <mach/iomap.h> #include <mach/irqs.h> #include "board-harmony.h" -#define PMC_CTRL 0x0 -#define PMC_CTRL_INTR_LOW (1 << 17) -static struct regulator_consumer_supply tps658621_ldo0_supply[] = {REGULATOR_SUPPLY ("pex_clk" ,NULL ), };
@@ -114,16 +109,6 @@ static struct i2c_board_info __initdata harmony_regulators[] = {int __init harmony_regulator_init (void ) { -void __iomem *pmc =IO_ADDRESS (TEGRA_PMC_BASE ); -u32 pmc_ctrl; - -/* -* Configure the power management controller to trigger PMU -* interrupts when low -*/ - pmc_ctrl =readl (pmc +PMC_CTRL ); -writel (pmc_ctrl |PMC_CTRL_INTR_LOW , pmc +PMC_CTRL ); -i2c_register_board_info (3 , harmony_regulators,1 );return 0 ;
Signature · 1 line
1.7.0.4
PATCH 1/3 ARM: dt: Add binding for Tegra PMC
In reply to Stephen WarrenQuoted 7 lines · Stephen Warren
The Tegra PMC (Power Management Controller) interfaces with an external PMU (Power Management Unit), and controls wake-up from sleep modes.
This initial binding is the bare minimum required to control the PMC's inversion of the PMU's interrupt signal.
Signed-off-by Stephen Warren <[email protected]>
Thanks, looks reasonable enough. Applied 1-3.
-Olof