ARM: head-nommu.S: use long distance encoding for branch instruction
PATCH 1/1 ARM: head-nommu.S: use long distance encoding for branch instruction
This fixes a linker error when the kernel image gets bigger than approx. 1 MiB.
This is done analogous to the change to head.S in commit
a75e524 (ARM: 6504/1: Thumb-2: Fix long-distance conditional branches in head.S for Thumb-2.)
---
Hello,
compared to a75e524 I didn't put the it instruction into THUMB(). I think this is OK? If so I can follow up with a patch that removes these THUMB()s from head.S, too.
And I wonder if it's correct that head-nommu.S doesn't check the machine type.
I don't see a need to get this in before the next merge window.
Best regards
Uwe
arch/arm/kernel/head-nommu.S | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/kernel/head-nommu.S +1 -0
@@ -51,6 +51,7 @@ ENTRY(stext) #endif bl __lookup_processor_type @ r5=procinfo r9=cpuid movs r10, r5 @ invalid processor (r5=0)? + it eq beq __error_p @ yes, error 'p' adr lr, BSYM(__after_proc_init) @ return (PIC) address
Signature · 1 line
1.7.8.3
PATCH 1/1 ARM: head-nommu.S: use long distance encoding for branch instruction
Quoted 7 lines · Uwe Kleine-K??nig
This fixes a linker error when the kernel image gets bigger than approx. 1 MiB.
This is done analogous to the change to
head.Sin commita75e524 (ARM: 6504/1: Thumb-2: Fix long-distance conditional branches in
head.Sfor Thumb-2.)
Quoted 7 lines
Signed-off-by Uwe Kleine-K??nig <[email protected]>---
Hello,compared to a75e524 I didn't put the it instruction into
THUMB(). I think this is OK? If so I can follow up with a patch that removes these THUMB()s fromhead.S, too.
I believe it can be outside THUMB()... there are macros in <asm/unified.h> which expand to nothing if necessary.
However, after the original patch, I think that it may be better to code it like this:
ldreq pc, =___error_p
This may end up being slightly less efficient, but on an error path that doesn't really matter. The good part is that we don't need any ARM or Thumb special-case code. Because the target address is loaded from the literal pool, it can be relocated to absolutely any address without difficulty. From my point of view, this also cleaner and more manitainable in the source code, since it uses a traditional, well- understood method of achieving the long branch.
If you want to keep to your existing suggestion for consistency, I'd be happy with that too, though.
Quoted 3 lines
And I wonder if it's correct that
head-nommu.Sdoesn't check the machine type.
I don't know the answer to that -- it does sound a bit strange though. Maybe that check happens somewhere else in the nommu case? (Or maybe people just never got around to adding the check, since the kernel build and hardware tend to be very tightly coupled for nommu.)
Quoted 25 lines
I don't see a need to get this in before the next merge window.
Best regards
Uwearch/arm/kernel/head-nommu.S | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)arch/arm/kernel/head-nommu.S +1
-0@@ -51,6 +51,7 @@ ENTRY(stext) #endif bl __lookup_processor_type @ r5=procinfo r9=cpuid movs r10, r5 @ invalid processor (r5=0)? + it eq beq __error_p @ yes, error 'p' adr lr, BSYM(__after_proc_init) @ return (PIC) addressSignature · 1 line
1.7.8.3