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irq_domain for imx tzic and gpio

PATCH New Shawn Guo 5 participants 16 messages Feb 15, 2012 – Feb 16, 2012

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Shawn Guo

author
#0 lore raw

v2 cover irq_domain for imx tzic and gpio

Changes since v1:
* Drop the change on generic-irq, which was naked by Rob
* Separate DT initializtion flow from non-DT for tzic
* Use legacy domain for non-DT and linear for DT

Shawn Guo (7):
dt: add empty of_find_compatible_node function
ARM: imx5: adopt generic_chip irq_domain support for tzic
ARM: imx: eliminate macro IMX_GPIO_TO_IRQ()
ARM: imx: eliminate macro IOMUX_TO_IRQ()
ARM: imx: eliminate macro IRQ_GPIOx()
gpio/mxc: adopt irq_domain for gpio interrupt support
ARM: imx: remove macro MXC_GPIO_IRQ_START

 arch/arm/boot/dts/imx51.dtsi                 |    6 +++
 arch/arm/boot/dts/imx53.dtsi                 |    6 +++
 arch/arm/mach-imx/eukrea_mbimx27-baseboard.c |    3 +-
 arch/arm/mach-imx/mach-apf9328.c             |    6 ++-
 arch/arm/mach-imx/mach-armadillo5x0.c        |   12 ++++--
 arch/arm/mach-imx/mach-cpuimx27.c            |   12 ++++--
 arch/arm/mach-imx/mach-cpuimx35.c            |    3 +-
 arch/arm/mach-imx/mach-imx27_visstrim_m10.c  |    8 ++--
 arch/arm/mach-imx/mach-imx6q.c               |   14 ------
 arch/arm/mach-imx/mach-kzm_arm11_01.c        |   20 +++++++--
 arch/arm/mach-imx/mach-mx21ads.c             |    5 +-
 arch/arm/mach-imx/mach-mx27_3ds.c            |    3 +-
 arch/arm/mach-imx/mach-mx27ads.c             |   12 +++---
 arch/arm/mach-imx/mach-mx31_3ds.c            |   13 +++---
 arch/arm/mach-imx/mach-mx31ads.c             |   14 ++++--
 arch/arm/mach-imx/mach-mx31lilly.c           |   10 +++-
 arch/arm/mach-imx/mach-mx31lite.c            |   10 +++-
 arch/arm/mach-imx/mach-mx31moboard.c         |    4 +-
 arch/arm/mach-imx/mach-mxt_td60.c            |    6 +-
 arch/arm/mach-imx/mach-pca100.c              |    4 +-
 arch/arm/mach-imx/mach-pcm037.c              |   18 +++++---
 arch/arm/mach-imx/mach-pcm038.c              |    4 +-
 arch/arm/mach-imx/mach-qong.c                |    9 ++--
 arch/arm/mach-imx/mach-scb9328.c             |    6 ++-
 arch/arm/mach-imx/mach-vpr200.c              |    3 +-
 arch/arm/mach-imx/mx31lilly-db.c             |    5 +-
 arch/arm/mach-imx/mx31lite-db.c              |    5 +-
 arch/arm/mach-imx/pcm970-baseboard.c         |   13 +++---
 arch/arm/mach-mx5/board-cpuimx51.c           |   12 ++++--
 arch/arm/mach-mx5/board-cpuimx51sd.c         |    6 ++-
 arch/arm/mach-mx5/board-mx53_ard.c           |    5 +-
 arch/arm/mach-mx5/clock-mx51-mx53.c          |   47 +++++++++++++++++++--
 arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c |    3 +-
 arch/arm/mach-mx5/imx51-dt.c                 |   30 ++++++-------
 arch/arm/mach-mx5/imx53-dt.c                 |   30 ++++++-------
 arch/arm/mach-mx5/mm.c                       |    6 +-
 arch/arm/mach-mx5/mx51_efika.c               |    3 +-
 arch/arm/plat-mxc/include/mach/common.h      |    3 +-
 arch/arm/plat-mxc/include/mach/hardware.h    |    2 -
 arch/arm/plat-mxc/include/mach/iomux-mx3.h   |    3 -
 arch/arm/plat-mxc/include/mach/iomux-v1.h    |   12 +++---
 arch/arm/plat-mxc/include/mach/irqs.h        |    2 -
 arch/arm/plat-mxc/tzic.c                     |   32 +++++++-------
 drivers/gpio/gpio-mxc.c                      |   59 ++++++++++---------------
 include/linux/of.h                           |    8 ++++
 45 files changed, 287 insertions(+), 210 deletions(-)
author
#1 lore raw

PATCH v2 1/7 dt: add empty of_find_compatible_node function

Add empty of_find_compatible_node function for !CONFIG_OF build.

---
 include/linux/of.h |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)
include/linux/of.h +8 -0
index a75a831..92cf6ad 100644
@@ -281,6 +281,14 @@ static inline struct property *of_find_property(const struct device_node *np,
 	return NULL;
 }
 
+static inline struct device_node *of_find_compatible_node(
+						struct device_node *from,
+						const char *type,
+						const char *compat)
+{
+	return NULL;
+}
+
 static inline int of_property_read_u32_array(const struct device_node *np,
 					     const char *propname,
 					     u32 *out_values, size_t sz)
Signature · 1 line
1.7.5.4
Applied
#2 lore raw

PATCH v2 1/7 dt: add empty of_find_compatible_node function

Quoted 3 lines · Shawn Guo

Add empty of_find_compatible_node function for !CONFIG_OF build.

Applied, thanks.

g.

Quoted 26 lines
---
 include/linux/of.h |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)
include/linux/of.h +8 -0
index a75a831..92cf6ad 100644
@@ -281,6 +281,14 @@ static inline struct property *of_find_property(const struct device_node *np,
 	return NULL;
 }
 
+static inline struct device_node *of_find_compatible_node(
+						struct device_node *from,
+						const char *type,
+						const char *compat)
+{
+	return NULL;
+}
+
 static inline int of_property_read_u32_array(const struct device_node *np,
 					     const char *propname,
 					     u32 *out_values, size_t sz)
Signature · 1 line
1.7.5.4
author
#3 lore raw

PATCH v2 2/7 ARM: imx5: adopt generic_chip irq_domain support for tzic

In reply to Shawn Guo

It separates the DT initialization for tzic and gpt from non-DT code path, so that base address and irq can retrieved from device tree rather than static definition.

With the DT initialization flow corrected as above, the generic_chip irq_domain support is adopted for tzic interrupt controller, so that the irq_domain initialization for tzic in imx5 DT platform code can be removed.

---
 arch/arm/boot/dts/imx51.dtsi            |    6 ++++
 arch/arm/boot/dts/imx53.dtsi            |    6 ++++
 arch/arm/mach-mx5/clock-mx51-mx53.c     |   47 ++++++++++++++++++++++++++++--
 arch/arm/mach-mx5/imx51-dt.c            |   22 ++++++++++----
 arch/arm/mach-mx5/imx53-dt.c            |   22 ++++++++++----
 arch/arm/mach-mx5/mm.c                  |    6 ++--
 arch/arm/plat-mxc/include/mach/common.h |    3 +-
 arch/arm/plat-mxc/tzic.c                |   32 ++++++++++-----------
 8 files changed, 105 insertions(+), 39 deletions(-)
arch/arm/boot/dts/imx51.dtsi +6 -0
index 6663986..a5fda43 100644
@@ -171,6 +171,12 @@
 				status = "disabled";
 			};
 
+			gpt at 73fa0000 {
+				compatible = "fsl,imx51-gpt", "fsl,gpt";
+				reg = <0x73fa0000 0x4000>;
+				interrupts = <39>;
+			};
+
 			uart1: uart at 73fbc000 {
 				compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 				reg = <0x73fbc000 0x4000>;
arch/arm/boot/dts/imx53.dtsi +6 -0
index 5dd91b9..05e6412 100644
@@ -173,6 +173,12 @@
 				status = "disabled";
 			};
 
+			gpt at 53fa0000 {
+				compatible = "fsl,imx53-gpt", "fsl,gpt";
+				reg = <0x53fa0000 0x4000>;
+				interrupts = <39>;
+			};
+
 			uart1: uart at 53fbc000 {
 				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
 				reg = <0x53fbc000 0x4000>;
arch/arm/mach-mx5/clock-mx51-mx53.c +43 -4

85 lines not on this page · raw message

arch/arm/mach-mx5/imx51-dt.c +15 -7
index 1e03ef4..636ef34 100644
@@ -12,6 +12,7 @@
 
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
@@ -44,10 +45,14 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
 	{ /* sentinel */ }
 };
 
-static int __init imx51_tzic_add_irq_domain(struct device_node *np,
-				struct device_node *interrupt_parent)
+static int __init imx51_tzic_init_cb(struct device_node *np,
+				     struct device_node *interrupt_parent)
 {
-	irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
+	void __iomem *base = of_iomap(np, 0);
+
+	WARN_ON(!base);
+	tzic_init_irq(base, np);
+
 	return 0;
 }
 
@@ -63,7 +68,7 @@ static int __init imx51_gpio_add_irq_domain(struct device_node *np,
 }
 
 static const struct of_device_id imx51_irq_match[] __initconst = {
-	{ .compatible = "fsl,imx51-tzic", .data = imx51_tzic_add_irq_domain, },
+	{ .compatible = "fsl,imx51-tzic", .data = imx51_tzic_init_cb, },
 	{ .compatible = "fsl,imx51-gpio", .data = imx51_gpio_add_irq_domain, },
 	{ /* sentinel */ }
 };
@@ -73,14 +78,17 @@ static const struct of_device_id imx51_iomuxc_of_match[] __initconst = {
 	{ /* sentinel */ }
 };
 
+static void __init imx51_dt_irq_init(void)
+{
+	of_irq_init(imx51_irq_match);
+}
+
 static void __init imx51_dt_init(void)
 {
 	struct device_node *node;
 	const struct of_device_id *of_id;
 	void (*func)(void);
 
-	of_irq_init(imx51_irq_match);
-
 	node = of_find_matching_node(NULL, imx51_iomuxc_of_match);
 	if (node) {
 		of_id = of_match_node(imx51_iomuxc_of_match, node);
@@ -110,7 +118,7 @@ static const char *imx51_dt_board_compat[] __initdata = {
 DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
 	.map_io		= mx51_map_io,
 	.init_early	= imx51_init_early,
-	.init_irq	= mx51_init_irq,
+	.init_irq	= imx51_dt_irq_init,
 	.handle_irq	= imx51_handle_irq,
 	.timer		= &imx51_timer,
 	.init_machine	= imx51_dt_init,
arch/arm/mach-mx5/imx53-dt.c +15 -7
index fd5be0f..ce2b700 100644
@@ -13,6 +13,7 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
@@ -48,10 +49,14 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
 	{ /* sentinel */ }
 };
 
-static int __init imx53_tzic_add_irq_domain(struct device_node *np,
-				struct device_node *interrupt_parent)
+static int __init imx53_tzic_init_cb(struct device_node *np,
+				     struct device_node *interrupt_parent)
 {
-	irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
+	void __iomem *base = of_iomap(np, 0);
+
+	WARN_ON(!base);
+	tzic_init_irq(base, np);
+
 	return 0;
 }
 
@@ -67,7 +72,7 @@ static int __init imx53_gpio_add_irq_domain(struct device_node *np,
 }
 
 static const struct of_device_id imx53_irq_match[] __initconst = {
-	{ .compatible = "fsl,imx53-tzic", .data = imx53_tzic_add_irq_domain, },
+	{ .compatible = "fsl,imx53-tzic", .data = imx53_tzic_init_cb, },
 	{ .compatible = "fsl,imx53-gpio", .data = imx53_gpio_add_irq_domain, },
 	{ /* sentinel */ }
 };
@@ -80,14 +85,17 @@ static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
 	{ /* sentinel */ }
 };
 
+static void __init imx53_dt_irq_init(void)
+{
+	of_irq_init(imx53_irq_match);
+}
+
 static void __init imx53_dt_init(void)
 {
 	struct device_node *node;
 	const struct of_device_id *of_id;
 	void (*func)(void);
 
-	of_irq_init(imx53_irq_match);
-
 	node = of_find_matching_node(NULL, imx53_iomuxc_of_match);
 	if (node) {
 		of_id = of_match_node(imx53_iomuxc_of_match, node);
@@ -120,7 +128,7 @@ static const char *imx53_dt_board_compat[] __initdata = {
 DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
 	.map_io		= mx53_map_io,
 	.init_early	= imx53_init_early,
-	.init_irq	= mx53_init_irq,
+	.init_irq	= imx53_dt_irq_init,
 	.handle_irq	= imx53_handle_irq,
 	.timer		= &imx53_timer,
 	.init_machine	= imx53_dt_init,
arch/arm/mach-mx5/mm.c +3 -3
index bc17dfe..bed8562 100644
@@ -120,17 +120,17 @@ void __init imx53_init_early(void)
 
 void __init mx50_init_irq(void)
 {
-	tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
+	tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR), NULL);
 }
 
 void __init mx51_init_irq(void)
 {
-	tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
+	tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR), NULL);
 }
 
 void __init mx53_init_irq(void)
 {
-	tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
+	tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR), NULL);
 }
 
 static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
arch/arm/plat-mxc/include/mach/common.h +2 -1
index 1bf0df8..4291992 100644
@@ -11,6 +11,7 @@
 #ifndef __ASM_ARCH_MXC_COMMON_H__
 #define __ASM_ARCH_MXC_COMMON_H__
 
+struct device_node;
 struct platform_device;
 struct clk;
 enum mxc_cpu_pwr_mode;
@@ -34,7 +35,7 @@ extern void imx50_init_early(void);
 extern void imx51_init_early(void);
 extern void imx53_init_early(void);
 extern void mxc_init_irq(void __iomem *);
-extern void tzic_init_irq(void __iomem *);
+extern void tzic_init_irq(void __iomem *, struct device_node *np);
 extern void mx1_init_irq(void);
 extern void mx21_init_irq(void);
 extern void mx25_init_irq(void);
arch/arm/plat-mxc/tzic.c +15 -17
index 98308ec..8288187 100644
@@ -15,6 +15,7 @@
 #include <linux/device.h>
 #include <linux/errno.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
 
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
@@ -49,6 +50,7 @@
 #define TZIC_ID0	0x0FD0	/* Indentification Register 0 */
 
 void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
+static struct irq_chip_generic *tzic_gc;
 
 #define TZIC_NUM_IRQS 128
 
@@ -77,15 +79,14 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type)
 static void tzic_irq_suspend(struct irq_data *d)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	int idx = gc->irq_base >> 5;
+	int idx = d->hwirq / 32;
 
 	__raw_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx));
 }
 
 static void tzic_irq_resume(struct irq_data *d)
 {
-	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	int idx = gc->irq_base >> 5;
+	int idx = d->hwirq / 32;
 
 	__raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(idx)),
 		     tzic_base + TZIC_WAKEUP0(idx));
@@ -102,18 +103,14 @@ static struct mxc_extra_irq tzic_extra_irq = {
 #endif
 };
 
-static __init void tzic_init_gc(unsigned int irq_start)
+static __init void tzic_init_gc(struct irq_chip_generic *gc)
 {
-	struct irq_chip_generic *gc;
-	struct irq_chip_type *ct;
-	int idx = irq_start >> 5;
+	struct irq_chip_type *ct = gc->chip_types;
+	int idx = gc->hwirq_base / 32;
 
-	gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base,
-				    handle_level_irq);
-	gc->private = &tzic_extra_irq;
+	tzic_gc = gc;
 	gc->wake_enabled = IRQ_MSK(32);
 
-	ct = gc->chip_types;
 	ct->chip.irq_mask = irq_gc_mask_disable_reg;
 	ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
 	ct->chip.irq_set_wake = irq_gc_set_wake;
@@ -121,8 +118,6 @@ static __init void tzic_init_gc(unsigned int irq_start)
 	ct->chip.irq_resume = tzic_irq_resume;
 	ct->regs.disable = TZIC_ENCLEAR0(idx);
 	ct->regs.enable = TZIC_ENSET0(idx);
-
-	irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
 }
 
 asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
@@ -140,7 +135,8 @@ asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
 			while (stat) {
 				handled = 1;
 				irqofs = fls(stat) - 1;
-				handle_IRQ(irqofs + i * 32, regs);
+				handle_IRQ(irq_find_mapping(tzic_gc->domain,
+						irqofs + i * 32), regs);
 				stat &= ~(1 << irqofs);
 			}
 		}
@@ -152,7 +148,7 @@ asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
  * interrupts. It registers the interrupt enable and disable functions
  * to the kernel for each interrupt source.
  */
-void __init tzic_init_irq(void __iomem *irqbase)
+void __init tzic_init_irq(void __iomem *irqbase, struct device_node *np)
 {
 	int i;
 
@@ -175,8 +171,10 @@ void __init tzic_init_irq(void __iomem *irqbase)
 
 	/* all IRQ no FIQ Warning :: No selection */
 
-	for (i = 0; i < TZIC_NUM_IRQS; i += 32)
-		tzic_init_gc(i);
+	irq_setup_generic_chip_domain("tzic", np, 1, 0, tzic_base,
+				      handle_level_irq, TZIC_NUM_IRQS, 0,
+				      IRQ_NOREQUEST, 0,
+				      tzic_init_gc, &tzic_extra_irq);
 
 #ifdef CONFIG_FIQ
 	/* Initialize FIQ */
Signature · 1 line
1.7.5.4
#4 lore raw

PATCH v2 2/7 ARM: imx5: adopt generic_chip irq_domain support for tzic

Quoted 10 lines · Shawn Guo

It separates the DT initialization for tzic and gpt from non-DT code path, so that base address and irq can retrieved from device tree rather than static definition.

With the DT initialization flow corrected as above, the generic_chip irq_domain support is adopted for tzic interrupt controller, so that the irq_domain initialization for tzic in imx5 DT platform code can be removed.

One comment below, otherwise:

Quoted 129 lines
---
 arch/arm/boot/dts/imx51.dtsi            |    6 ++++
 arch/arm/boot/dts/imx53.dtsi            |    6 ++++
 arch/arm/mach-mx5/clock-mx51-mx53.c     |   47 ++++++++++++++++++++++++++++--
 arch/arm/mach-mx5/imx51-dt.c            |   22 ++++++++++----
 arch/arm/mach-mx5/imx53-dt.c            |   22 ++++++++++----
 arch/arm/mach-mx5/mm.c                  |    6 ++--
 arch/arm/plat-mxc/include/mach/common.h |    3 +-
 arch/arm/plat-mxc/tzic.c                |   32 ++++++++++-----------
 8 files changed, 105 insertions(+), 39 deletions(-)
arch/arm/boot/dts/imx51.dtsi +6 -0
index 6663986..a5fda43 100644
@@ -171,6 +171,12 @@
 				status = "disabled";
 			};
 
+			gpt at 73fa0000 {
+				compatible = "fsl,imx51-gpt", "fsl,gpt";
+				reg = <0x73fa0000 0x4000>;
+				interrupts = <39>;
+			};
+
 			uart1: uart at 73fbc000 {
 				compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 				reg = <0x73fbc000 0x4000>;
arch/arm/boot/dts/imx53.dtsi +6 -0
index 5dd91b9..05e6412 100644
@@ -173,6 +173,12 @@
 				status = "disabled";
 			};
 
+			gpt at 53fa0000 {
+				compatible = "fsl,imx53-gpt", "fsl,gpt";
+				reg = <0x53fa0000 0x4000>;
+				interrupts = <39>;
+			};
+
 			uart1: uart at 53fbc000 {
 				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
 				reg = <0x53fbc000 0x4000>;
arch/arm/mach-mx5/clock-mx51-mx53.c +33 -4
index 4cb2769..200a3d7 100644
@@ -16,6 +16,8 @@
 #include <linux/io.h>
 #include <linux/clkdev.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <asm/div64.h>
 
@@ -1555,10 +1557,16 @@ static void clk_tree_init(void)
 	__raw_writel(reg, MXC_CCM_CBCDR);
 }
 
+static inline void __iomem *get_gpt_base_dt(struct device_node *np);
+static inline int get_gpt_irq_dt(struct device_node *np);
+
 int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
 			unsigned long ckih1, unsigned long ckih2)
 {
 	int i;
+	int gpt_irq = MX51_INT_GPT;
+	void __iomem *gpt_base = MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR);
+	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,gpt");
 
 	external_low_reference = ckil;
 	external_high_reference = ckih1;
@@ -1592,8 +1600,12 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_set_rate(&esdhc2_clk, 166250000);
 
 	/* System timer */
-	mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
-		MX51_INT_GPT);
+	if (np) {
+		gpt_base = get_gpt_base_dt(np);
+		gpt_irq = get_gpt_irq_dt(np);
+	}
+	WARN_ON(!gpt_base);
+	mxc_timer_init(&gpt_clk, gpt_base, gpt_irq);
 	return 0;
 }
 
@@ -1601,6 +1613,9 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
 			unsigned long ckih1, unsigned long ckih2)
 {
 	int i;
+	int gpt_irq = MX53_INT_GPT;
+	void __iomem *gpt_base = MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR);
+	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,gpt");
 
 	external_low_reference = ckil;
 	external_high_reference = ckih1;
@@ -1629,8 +1644,12 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_set_rate(&esdhc3_mx53_clk, 200000000);
 
 	/* System timer */
-	mxc_timer_init(&gpt_clk, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR),
-		MX53_INT_GPT);
+	if (np) {
+		gpt_base = get_gpt_base_dt(np);
+		gpt_irq = get_gpt_irq_dt(np);
+	}
+	WARN_ON(!gpt_base);
+	mxc_timer_init(&gpt_clk, gpt_base, gpt_irq);
 	return 0;
 }
 
@@ -1672,4 +1691,24 @@ int __init mx53_clocks_init_dt(void)
 	clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
 	return mx53_clocks_init(ckil, osc, ckih1, ckih2);
 }
+
+static inline void __iomem *get_gpt_base_dt(struct device_node *np)
+{
+	return of_iomap(np, 0);
+}
+
+static inline int get_gpt_irq_dt(struct device_node *np)
+{
+	return irq_of_parse_and_map(np, 0);
+}

arch/arm/mach-mx5/clock-mx51-mx53.c int __init mx53_clocks_init_dt(void) · line 1713

Quoted 10 lines
arch/arm/mach-mx5/clock-mx51-mx53.c +10 -0
+#else
+static inline void __iomem *get_gpt_base_dt(struct device_node *np)
+{
+	return NULL;
+}
+
+static inline int get_gpt_irq_dt(struct device_node *np)
+{
+	return -ENODEV;
+}

Reorder so you don't need forward declarations.

Once again, I think this is too intermixed with DT and non-DT, but you are getting the data from DT so I guess it's fine for now.

Quoted 285 lines
arch/arm/mach-mx5/clock-mx51-mx53.c +0 -0
 #endif
arch/arm/mach-mx5/imx51-dt.c +15 -7
index 1e03ef4..636ef34 100644
@@ -12,6 +12,7 @@
 
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
@@ -44,10 +45,14 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
 	{ /* sentinel */ }
 };
 
-static int __init imx51_tzic_add_irq_domain(struct device_node *np,
-				struct device_node *interrupt_parent)
+static int __init imx51_tzic_init_cb(struct device_node *np,
+				     struct device_node *interrupt_parent)
 {
-	irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
+	void __iomem *base = of_iomap(np, 0);
+
+	WARN_ON(!base);
+	tzic_init_irq(base, np);
+
 	return 0;
 }
 
@@ -63,7 +68,7 @@ static int __init imx51_gpio_add_irq_domain(struct device_node *np,
 }
 
 static const struct of_device_id imx51_irq_match[] __initconst = {
-	{ .compatible = "fsl,imx51-tzic", .data = imx51_tzic_add_irq_domain, },
+	{ .compatible = "fsl,imx51-tzic", .data = imx51_tzic_init_cb, },
 	{ .compatible = "fsl,imx51-gpio", .data = imx51_gpio_add_irq_domain, },
 	{ /* sentinel */ }
 };
@@ -73,14 +78,17 @@ static const struct of_device_id imx51_iomuxc_of_match[] __initconst = {
 	{ /* sentinel */ }
 };
 
+static void __init imx51_dt_irq_init(void)
+{
+	of_irq_init(imx51_irq_match);
+}
+
 static void __init imx51_dt_init(void)
 {
 	struct device_node *node;
 	const struct of_device_id *of_id;
 	void (*func)(void);
 
-	of_irq_init(imx51_irq_match);
-
 	node = of_find_matching_node(NULL, imx51_iomuxc_of_match);
 	if (node) {
 		of_id = of_match_node(imx51_iomuxc_of_match, node);
@@ -110,7 +118,7 @@ static const char *imx51_dt_board_compat[] __initdata = {
 DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
 	.map_io		= mx51_map_io,
 	.init_early	= imx51_init_early,
-	.init_irq	= mx51_init_irq,
+	.init_irq	= imx51_dt_irq_init,
 	.handle_irq	= imx51_handle_irq,
 	.timer		= &imx51_timer,
 	.init_machine	= imx51_dt_init,
arch/arm/mach-mx5/imx53-dt.c +15 -7
index fd5be0f..ce2b700 100644
@@ -13,6 +13,7 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
@@ -48,10 +49,14 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
 	{ /* sentinel */ }
 };
 
-static int __init imx53_tzic_add_irq_domain(struct device_node *np,
-				struct device_node *interrupt_parent)
+static int __init imx53_tzic_init_cb(struct device_node *np,
+				     struct device_node *interrupt_parent)
 {
-	irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
+	void __iomem *base = of_iomap(np, 0);
+
+	WARN_ON(!base);
+	tzic_init_irq(base, np);
+
 	return 0;
 }
 
@@ -67,7 +72,7 @@ static int __init imx53_gpio_add_irq_domain(struct device_node *np,
 }
 
 static const struct of_device_id imx53_irq_match[] __initconst = {
-	{ .compatible = "fsl,imx53-tzic", .data = imx53_tzic_add_irq_domain, },
+	{ .compatible = "fsl,imx53-tzic", .data = imx53_tzic_init_cb, },
 	{ .compatible = "fsl,imx53-gpio", .data = imx53_gpio_add_irq_domain, },
 	{ /* sentinel */ }
 };
@@ -80,14 +85,17 @@ static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
 	{ /* sentinel */ }
 };
 
+static void __init imx53_dt_irq_init(void)
+{
+	of_irq_init(imx53_irq_match);
+}
+
 static void __init imx53_dt_init(void)
 {
 	struct device_node *node;
 	const struct of_device_id *of_id;
 	void (*func)(void);
 
-	of_irq_init(imx53_irq_match);
-
 	node = of_find_matching_node(NULL, imx53_iomuxc_of_match);
 	if (node) {
 		of_id = of_match_node(imx53_iomuxc_of_match, node);
@@ -120,7 +128,7 @@ static const char *imx53_dt_board_compat[] __initdata = {
 DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
 	.map_io		= mx53_map_io,
 	.init_early	= imx53_init_early,
-	.init_irq	= mx53_init_irq,
+	.init_irq	= imx53_dt_irq_init,
 	.handle_irq	= imx53_handle_irq,
 	.timer		= &imx53_timer,
 	.init_machine	= imx53_dt_init,
arch/arm/mach-mx5/mm.c +3 -3
index bc17dfe..bed8562 100644
@@ -120,17 +120,17 @@ void __init imx53_init_early(void)
 
 void __init mx50_init_irq(void)
 {
-	tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
+	tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR), NULL);
 }
 
 void __init mx51_init_irq(void)
 {
-	tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
+	tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR), NULL);
 }
 
 void __init mx53_init_irq(void)
 {
-	tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
+	tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR), NULL);
 }
 
 static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
arch/arm/plat-mxc/include/mach/common.h +2 -1
index 1bf0df8..4291992 100644
@@ -11,6 +11,7 @@
 #ifndef __ASM_ARCH_MXC_COMMON_H__
 #define __ASM_ARCH_MXC_COMMON_H__
 
+struct device_node;
 struct platform_device;
 struct clk;
 enum mxc_cpu_pwr_mode;
@@ -34,7 +35,7 @@ extern void imx50_init_early(void);
 extern void imx51_init_early(void);
 extern void imx53_init_early(void);
 extern void mxc_init_irq(void __iomem *);
-extern void tzic_init_irq(void __iomem *);
+extern void tzic_init_irq(void __iomem *, struct device_node *np);
 extern void mx1_init_irq(void);
 extern void mx21_init_irq(void);
 extern void mx25_init_irq(void);
arch/arm/plat-mxc/tzic.c +15 -17
index 98308ec..8288187 100644
@@ -15,6 +15,7 @@
 #include <linux/device.h>
 #include <linux/errno.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
 
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
@@ -49,6 +50,7 @@
 #define TZIC_ID0	0x0FD0	/* Indentification Register 0 */
 
 void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
+static struct irq_chip_generic *tzic_gc;
 
 #define TZIC_NUM_IRQS 128
 
@@ -77,15 +79,14 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type)
 static void tzic_irq_suspend(struct irq_data *d)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	int idx = gc->irq_base >> 5;
+	int idx = d->hwirq / 32;
 
 	__raw_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx));
 }
 
 static void tzic_irq_resume(struct irq_data *d)
 {
-	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	int idx = gc->irq_base >> 5;
+	int idx = d->hwirq / 32;
 
 	__raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(idx)),
 		     tzic_base + TZIC_WAKEUP0(idx));
@@ -102,18 +103,14 @@ static struct mxc_extra_irq tzic_extra_irq = {
 #endif
 };
 
-static __init void tzic_init_gc(unsigned int irq_start)
+static __init void tzic_init_gc(struct irq_chip_generic *gc)
 {
-	struct irq_chip_generic *gc;
-	struct irq_chip_type *ct;
-	int idx = irq_start >> 5;
+	struct irq_chip_type *ct = gc->chip_types;
+	int idx = gc->hwirq_base / 32;
 
-	gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base,
-				    handle_level_irq);
-	gc->private = &tzic_extra_irq;
+	tzic_gc = gc;
 	gc->wake_enabled = IRQ_MSK(32);
 
-	ct = gc->chip_types;
 	ct->chip.irq_mask = irq_gc_mask_disable_reg;
 	ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
 	ct->chip.irq_set_wake = irq_gc_set_wake;
@@ -121,8 +118,6 @@ static __init void tzic_init_gc(unsigned int irq_start)
 	ct->chip.irq_resume = tzic_irq_resume;
 	ct->regs.disable = TZIC_ENCLEAR0(idx);
 	ct->regs.enable = TZIC_ENSET0(idx);
-
-	irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
 }
 
 asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
@@ -140,7 +135,8 @@ asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
 			while (stat) {
 				handled = 1;
 				irqofs = fls(stat) - 1;
-				handle_IRQ(irqofs + i * 32, regs);
+				handle_IRQ(irq_find_mapping(tzic_gc->domain,
+						irqofs + i * 32), regs);
 				stat &= ~(1 << irqofs);
 			}
 		}
@@ -152,7 +148,7 @@ asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
  * interrupts. It registers the interrupt enable and disable functions
  * to the kernel for each interrupt source.
  */
-void __init tzic_init_irq(void __iomem *irqbase)
+void __init tzic_init_irq(void __iomem *irqbase, struct device_node *np)
 {
 	int i;
 
@@ -175,8 +171,10 @@ void __init tzic_init_irq(void __iomem *irqbase)
 
 	/* all IRQ no FIQ Warning :: No selection */
 
-	for (i = 0; i < TZIC_NUM_IRQS; i += 32)
-		tzic_init_gc(i);
+	irq_setup_generic_chip_domain("tzic", np, 1, 0, tzic_base,
+				      handle_level_irq, TZIC_NUM_IRQS, 0,
+				      IRQ_NOREQUEST, 0,
+				      tzic_init_gc, &tzic_extra_irq);
 
 #ifdef CONFIG_FIQ
 	/* Initialize FIQ */
author
#5 lore raw

PATCH v2 2/7 ARM: imx5: adopt generic_chip irq_domain support for tzic

On Wed, Feb 15, 2012 at 09:43:01PM -0600, Rob Herring wrote:
...

Quoted 71 lines
Quoted 71 lines
arch/arm/mach-mx5/clock-mx51-mx53.c +35 -4
+static inline void __iomem *get_gpt_base_dt(struct device_node *np);
+static inline int get_gpt_irq_dt(struct device_node *np);
+
 int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
 			unsigned long ckih1, unsigned long ckih2)
 {
 	int i;
+	int gpt_irq = MX51_INT_GPT;
+	void __iomem *gpt_base = MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR);
+	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,gpt");
 
 	external_low_reference = ckil;
 	external_high_reference = ckih1;
@@ -1592,8 +1600,12 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_set_rate(&esdhc2_clk, 166250000);
 
 	/* System timer */
-	mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
-		MX51_INT_GPT);
+	if (np) {
+		gpt_base = get_gpt_base_dt(np);
+		gpt_irq = get_gpt_irq_dt(np);
+	}
+	WARN_ON(!gpt_base);
+	mxc_timer_init(&gpt_clk, gpt_base, gpt_irq);
 	return 0;
 }
 
@@ -1601,6 +1613,9 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
 			unsigned long ckih1, unsigned long ckih2)
 {
 	int i;
+	int gpt_irq = MX53_INT_GPT;
+	void __iomem *gpt_base = MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR);
+	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,gpt");
 
 	external_low_reference = ckil;
 	external_high_reference = ckih1;
@@ -1629,8 +1644,12 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_set_rate(&esdhc3_mx53_clk, 200000000);
 
 	/* System timer */
-	mxc_timer_init(&gpt_clk, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR),
-		MX53_INT_GPT);
+	if (np) {
+		gpt_base = get_gpt_base_dt(np);
+		gpt_irq = get_gpt_irq_dt(np);
+	}
+	WARN_ON(!gpt_base);
+	mxc_timer_init(&gpt_clk, gpt_base, gpt_irq);
 	return 0;
 }
 
@@ -1672,4 +1691,24 @@ int __init mx53_clocks_init_dt(void)
 	clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
 	return mx53_clocks_init(ckil, osc, ckih1, ckih2);
 }
+
+static inline void __iomem *get_gpt_base_dt(struct device_node *np)
+{
+	return of_iomap(np, 0);
+}
+
+static inline int get_gpt_irq_dt(struct device_node *np)
+{
+	return irq_of_parse_and_map(np, 0);
+}
+#else
+static inline void __iomem *get_gpt_base_dt(struct device_node *np)
+{
+	return NULL;
Quoted 9 lines

arch/arm/mach-mx5/clock-mx51-mx53.c int __init mx53_clocks_init_dt(void) · line 1713

Quoted 6 lines
arch/arm/mach-mx5/clock-mx51-mx53.c +6 -0
+}
+
+static inline int get_gpt_irq_dt(struct device_node *np)
+{
+	return -ENODEV;
+}

Reorder so you don't need forward declarations.

I'm trying to save one more occurrence of "#ifdef CONFIG_OF", or I to move around the whole block wrapped by #ifdef, which will make unnecessary diffstat churn.

I hope we can stop this nasty #ifdef at some point by select CONFIG_OF for the imx architecture.

Quoted 3 lines

Once again, I think this is too intermixed with DT and non-DT, but you are getting the data from DT so I guess it's fine for now.

I guess that's the situation we have to live with until the non-DT support gets completely removed.

Signature · 2 lines
Regards,
Shawn
author
#6 lore raw

PATCH v2 3/7 ARM: imx: eliminate macro IMX_GPIO_TO_IRQ()

In reply to Shawn Guo

This patch changes all the static gpio irq number assigning with IMX_GPIO_TO_IRQ() to run-time assigning with gpio_to_irq call, and in turn eliminates the macro IMX_GPIO_TO_IRQ().

---
 arch/arm/mach-imx/mach-cpuimx35.c            |    3 ++-
 arch/arm/mach-imx/mach-mx27_3ds.c            |    3 ++-
 arch/arm/mach-imx/mach-vpr200.c              |    3 ++-
 arch/arm/mach-mx5/board-cpuimx51.c           |   12 ++++++++----
 arch/arm/mach-mx5/board-cpuimx51sd.c         |    6 ++++--
 arch/arm/mach-mx5/board-mx53_ard.c           |    5 +++--
 arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c |    3 ++-
 arch/arm/mach-mx5/mx51_efika.c               |    3 ++-
 arch/arm/plat-mxc/include/mach/hardware.h    |    2 --
 9 files changed, 25 insertions(+), 15 deletions(-)
arch/arm/mach-imx/mach-cpuimx35.c +2 -1
index 8ecc872..ad52a61 100644
@@ -72,7 +72,7 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
 		I2C_BOARD_INFO("tsc2007", 0x48),
 		.type		= "tsc2007",
 		.platform_data	= &tsc2007_info,
-		.irq		= IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
+		/* irq number is run-time assigned */
 	},
 };
 
@@ -173,6 +173,7 @@ static void __init eukrea_cpuimx35_init(void)
 	imx35_add_imx_uart0(&uart_pdata);
 	imx35_add_mxc_nand(&eukrea_cpuimx35_nand_board_info);
 
+	eukrea_cpuimx35_i2c_devices[1].irq = gpio_to_irq(TSC2007_IRQGPIO);
 	i2c_register_board_info(0, eukrea_cpuimx35_i2c_devices,
 			ARRAY_SIZE(eukrea_cpuimx35_i2c_devices));
 	imx35_add_imx_i2c0(&eukrea_cpuimx35_i2c0_data);
arch/arm/mach-imx/mach-mx27_3ds.c +2 -1
index 18f3581..0b0d9f0 100644
@@ -356,7 +356,7 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
 		.bus_num	= 1,
 		.chip_select	= 0, /* SS0 */
 		.platform_data	= &mc13783_pdata,
-		.irq = IMX_GPIO_TO_IRQ(PMIC_INT),
+		/* irq number is run-time assigned */
 		.mode = SPI_CS_HIGH,
 	}, {
 		.modalias	= "l4f00242t03",
@@ -398,6 +398,7 @@ static void __init mx27pdk_init(void)
 
 	imx27_add_spi_imx1(&spi2_pdata);
 	imx27_add_spi_imx0(&spi1_pdata);
+	mx27_3ds_spi_devs[0].irq = gpio_to_irq(PMIC_INT);
 	spi_register_board_info(mx27_3ds_spi_devs,
 						ARRAY_SIZE(mx27_3ds_spi_devs));
 
arch/arm/mach-imx/mach-vpr200.c +2 -1
index 033257e..7b06020 100644
@@ -162,7 +162,7 @@ static struct i2c_board_info vpr200_i2c_devices[] = {
 	}, {
 		I2C_BOARD_INFO("mc13892", 0x08),
 		.platform_data = &vpr200_pmic,
-		.irq = IMX_GPIO_TO_IRQ(GPIO_PMIC_INT),
+		/* irq number is run-time assigned */
 	}
 };
 
@@ -299,6 +299,7 @@ static void __init vpr200_board_init(void)
 	imx35_add_mxc_nand(&vpr200_nand_board_info);
 	imx35_add_sdhci_esdhc_imx(0, NULL);
 
+	vpr200_i2c_devices[1].irq = gpio_to_irq(GPIO_PMIC_INT);
 	i2c_register_board_info(0, vpr200_i2c_devices,
 			ARRAY_SIZE(vpr200_i2c_devices));
 
arch/arm/mach-mx5/board-cpuimx51.c +8 -4
index 944025d..156a692 100644
@@ -54,7 +54,7 @@
 static struct plat_serial8250_port serial_platform_data[] = {
 	{
 		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTA_GPIO),
+		/* irq number is run-time assigned */
 		.irqflags = IRQF_TRIGGER_HIGH,
 		.uartclk = CPUIMX51_QUART_XTAL,
 		.regshift = CPUIMX51_QUART_REGSHIFT,
@@ -62,7 +62,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
 	}, {
 		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTB_GPIO),
+		/* irq number is run-time assigned */
 		.irqflags = IRQF_TRIGGER_HIGH,
 		.uartclk = CPUIMX51_QUART_XTAL,
 		.regshift = CPUIMX51_QUART_REGSHIFT,
@@ -70,7 +70,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
 	}, {
 		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTC_GPIO),
+		/* irq number is run-time assigned */
 		.irqflags = IRQF_TRIGGER_HIGH,
 		.uartclk = CPUIMX51_QUART_XTAL,
 		.regshift = CPUIMX51_QUART_REGSHIFT,
@@ -78,7 +78,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
 	}, {
 		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTD_GPIO),
+		/* irq number is run-time assigned */
 		.irqflags = IRQF_TRIGGER_HIGH,
 		.uartclk = CPUIMX51_QUART_XTAL,
 		.regshift = CPUIMX51_QUART_REGSHIFT,
@@ -260,6 +260,10 @@ static void __init eukrea_cpuimx51_init(void)
 	gpio_free(CPUIMX51_QUARTD_GPIO);
 
 	imx51_add_fec(NULL);
+	serial_platform_data[0].irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO);
+	serial_platform_data[1].irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO);
+	serial_platform_data[2].irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO);
+	serial_platform_data[3].irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO);
 	platform_add_devices(devices, ARRAY_SIZE(devices));
 
 	imx51_add_imx_i2c(1, &eukrea_cpuimx51_i2c_data);
arch/arm/mach-mx5/board-cpuimx51sd.c +4 -2
index 9fbe923..674fd10 100644
@@ -126,7 +126,7 @@ static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {
 		I2C_BOARD_INFO("tsc2007", 0x49),
 		.type		= "tsc2007",
 		.platform_data	= &tsc2007_info,
-		.irq		= IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
+		/* irq number is run-time assigned */
 	},
 };
 
@@ -242,7 +242,7 @@ static struct spi_board_info cpuimx51sd_spi_device[] = {
 		.mode		= SPI_MODE_0,
 		.chip_select     = 0,
 		.platform_data   = &mcp251x_info,
-		.irq             = IMX_GPIO_TO_IRQ(CAN_IRQGPIO)
+		/* irq number is run-time assigned */
 	},
 };
 
@@ -288,6 +288,7 @@ static void __init eukrea_cpuimx51sd_init(void)
 	msleep(20);
 	gpio_set_value(CAN_RST, 1);
 	imx51_add_ecspi(0, &cpuimx51sd_ecspi1_pdata);
+	cpuimx51sd_spi_device[0].irq = gpio_to_irq(CAN_IRQGPIO);
 	spi_register_board_info(cpuimx51sd_spi_device,
 				ARRAY_SIZE(cpuimx51sd_spi_device));
 
@@ -295,6 +296,7 @@ static void __init eukrea_cpuimx51sd_init(void)
 	gpio_direction_input(TSC2007_IRQGPIO);
 	gpio_free(TSC2007_IRQGPIO);
 
+	eukrea_cpuimx51sd_i2c_devices[1].irq = gpio_to_irq(TSC2007_IRQGPIO);
 	i2c_register_board_info(0, eukrea_cpuimx51sd_i2c_devices,
 			ARRAY_SIZE(eukrea_cpuimx51sd_i2c_devices));
 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
arch/arm/mach-mx5/board-mx53_ard.c +3 -2
index 5f224f1..4a24765 100644
@@ -134,8 +134,7 @@ static struct resource ard_smsc911x_resources[] = {
 		.flags = IORESOURCE_MEM,
 	},
 	{
-		.start =  IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
-		.end =  IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
+		/* irq number is run-time assigned */
 		.flags = IORESOURCE_IRQ,
 	},
 };
@@ -231,6 +230,8 @@ static void __init mx53_ard_board_init(void)
 
 	imx53_ard_common_init();
 	mx53_ard_io_init();
+	ard_smsc911x_resources[1].start = gpio_to_irq(ARD_ETHERNET_INT_B);
+	ard_smsc911x_resources[1].end = gpio_to_irq(ARD_ETHERNET_INT_B);
 	platform_add_devices(devices, ARRAY_SIZE(devices));
 
 	imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +2 -1
index a6a3ab8..2e686f2 100644
@@ -159,7 +159,7 @@ struct tsc2007_platform_data tsc2007_data = {
 static struct i2c_board_info mbimx51_i2c_devices[] = {
 	{
 		I2C_BOARD_INFO("tsc2007", 0x49),
-		.irq  = IMX_GPIO_TO_IRQ(MBIMX51_TSC2007_GPIO),
+		/* irq number is run-time assigned */
 		.platform_data = &tsc2007_data,
 	}, {
 		I2C_BOARD_INFO("tlv320aic23", 0x1a),
@@ -198,6 +198,7 @@ void __init eukrea_mbimx51_baseboard_init(void)
 	gpio_direction_input(MBIMX51_TSC2007_GPIO);
 	irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO),
 					IRQF_TRIGGER_FALLING);
+	mbimx51_i2c_devices[0].irq = gpio_to_irq(MBIMX51_TSC2007_GPIO);
 	i2c_register_board_info(1, mbimx51_i2c_devices,
 				ARRAY_SIZE(mbimx51_i2c_devices));
 
arch/arm/mach-mx5/mx51_efika.c +2 -1
index ec6ca91..ee870c4 100644
@@ -587,7 +587,7 @@ static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
 		.bus_num = 0,
 		.chip_select = 0,
 		.platform_data = &mx51_efika_mc13892_data,
-		.irq = IMX_GPIO_TO_IRQ(EFIKAMX_PMIC),
+		/* irq number is run-time assigned */
 	},
 };
 
@@ -620,6 +620,7 @@ void __init efika_board_common_init(void)
 
 	gpio_request(EFIKAMX_PMIC, "pmic irq");
 	gpio_direction_input(EFIKAMX_PMIC);
+	mx51_efika_spi_board_info[1].irq = gpio_to_irq(EFIKAMX_PMIC);
 	spi_register_board_info(mx51_efika_spi_board_info,
 		ARRAY_SIZE(mx51_efika_spi_board_info));
 	imx51_add_ecspi(0, &mx51_efika_spi_pdata);
arch/arm/plat-mxc/include/mach/hardware.h +0 -2
index a599f01..f743a95 100644
@@ -131,6 +131,4 @@
 /* range e.g. GPIO_1_5 is gpio 5 under linux */
 #define IMX_GPIO_NR(bank, nr)		(((bank) - 1) * 32 + (nr))
 
-#define IMX_GPIO_TO_IRQ(gpio)	(MXC_GPIO_IRQ_START + (gpio))
-
 #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
Signature · 1 line
1.7.5.4
author
#7 lore raw

PATCH v2 4/7 ARM: imx: eliminate macro IOMUX_TO_IRQ()

In reply to Shawn Guo

This patch changes all the static gpio irq number assigning with IOMUX_TO_IRQ() to run-time assigning with gpio_to_irq call, and in turn eliminates the macro IOMUX_TO_IRQ().

---
 arch/arm/mach-imx/mach-armadillo5x0.c      |   12 ++++++++----
 arch/arm/mach-imx/mach-kzm_arm11_01.c      |   20 +++++++++++++++-----
 arch/arm/mach-imx/mach-mx31_3ds.c          |   13 ++++++-------
 arch/arm/mach-imx/mach-mx31ads.c           |   14 +++++++++-----
 arch/arm/mach-imx/mach-mx31lilly.c         |   10 +++++++---
 arch/arm/mach-imx/mach-mx31lite.c          |   10 +++++++---
 arch/arm/mach-imx/mach-mx31moboard.c       |    4 +++-
 arch/arm/mach-imx/mach-pcm037.c            |   18 ++++++++++++------
 arch/arm/mach-imx/mach-qong.c              |    9 +++++----
 arch/arm/mach-imx/mx31lilly-db.c           |    5 +++--
 arch/arm/mach-imx/mx31lite-db.c            |    5 +++--
 arch/arm/plat-mxc/include/mach/iomux-mx3.h |    3 ---
 12 files changed, 78 insertions(+), 45 deletions(-)
arch/arm/mach-imx/mach-armadillo5x0.c +8 -4
index e4f426a..ad56ff0 100644
@@ -406,7 +406,8 @@ static int armadillo5x0_sdhc1_init(struct device *dev,
 	gpio_direction_input(gpio_wp);
 
 	/* When supported the trigger type have to be BOTH */
-	ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
+	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)),
+			  detect_irq,
 			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 			  "sdhc-detect", data);
 
@@ -427,7 +428,7 @@ err_gpio_free:
 
 static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
 {
-	free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
+	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)), data);
 	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
 	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
 }
@@ -448,8 +449,7 @@ static struct resource armadillo5x0_smc911x_resources[] = {
 		.end	= MX31_CS3_BASE_ADDR + SZ_32M - 1,
 		.flags	= IORESOURCE_MEM,
 	}, {
-		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
-		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
+		/* irq number is run-time assigned */
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 	},
 };
@@ -489,6 +489,10 @@ static void __init armadillo5x0_init(void)
 	mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
 			ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
 
+	armadillo5x0_smc911x_resources[1].start =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
+	armadillo5x0_smc911x_resources[1].end =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
 	platform_add_devices(devices, ARRAY_SIZE(devices));
 	imx_add_gpio_keys(&armadillo5x0_button_data);
 	imx31_add_imx_i2c1(NULL);
arch/arm/mach-imx/mach-kzm_arm11_01.c +15 -5
index fc78e80..e8b41ec 100644
@@ -71,7 +71,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 	{
 		.membase	= KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
 		.mapbase	= KZM_ARM11_16550,
-		.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
+		/* irq number is run-time assigned */
 		.irqflags	= IRQ_TYPE_EDGE_RISING,
 		.uartclk	= 14745600,
 		.regshift	= 0,
@@ -89,8 +89,7 @@ static struct resource serial8250_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
-		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
+		/* irq number is run-time assigned */
 		.flags	= IORESOURCE_IRQ,
 	},
 };
@@ -123,6 +122,13 @@ static int __init kzm_init_ext_uart(void)
 	tmp |= 0x2;
 	__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
 
+	serial_platform_data[0].irq =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
+	serial8250_resources[1].start =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
+	serial8250_resources[1].end =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
+
 	return platform_device_register(&serial_device);
 }
 #else
@@ -150,8 +156,7 @@ static struct resource kzm_smsc9118_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
-		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
+		/* irq number is run-time assigned */
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	},
 };
@@ -175,6 +180,11 @@ static int __init kzm_init_smsc9118(void)
 	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
 	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
 
+	kzm_smsc9118_resources[1].start =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
+	kzm_smsc9118_resources[1].end =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
+
 	return platform_device_register(&kzm_smsc9118_device);
 }
 #else
arch/arm/mach-imx/mach-mx31_3ds.c +6 -7
index 4d1aab1..ab56702 100644
@@ -44,9 +44,6 @@
 
 #include "devices-imx31.h"
 
-/* CPLD IRQ line for external uart, external ethernet etc */
-#define EXPIO_PARENT_INT	IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
-
 static int mx31_3ds_pins[] = {
 	/* UART1 */
 	MX31_PIN_CTS1__CTS1,
@@ -312,7 +309,7 @@ static int mx31_3ds_sdhc1_init(struct device *dev,
 		return ret;
 	}
 
-	ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
+	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)),
 			  detect_irq, IRQF_DISABLED |
 			  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 			  "sdhc1-detect", data);
@@ -331,7 +328,7 @@ gpio_free:
 
 static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
 {
-	free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), data);
+	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)), data);
 	gpio_free_array(mx31_3ds_sdhc1_gpios,
 			 ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
 }
@@ -523,7 +520,7 @@ static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
 		.bus_num	= 1,
 		.chip_select	= 1, /* SS2 */
 		.platform_data	= &mc13783_pdata,
-		.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+		/* irq number is run-time assigned */
 		.mode = SPI_CS_HIGH,
 	}, {
 		.modalias	= "l4f00242t03",
@@ -698,6 +695,7 @@ static void __init mx31_3ds_init(void)
 	imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
 
 	imx31_add_spi_imx1(&spi1_pdata);
+	mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
 	spi_register_board_info(mx31_3ds_spi_devs,
 						ARRAY_SIZE(mx31_3ds_spi_devs));
 
@@ -720,7 +718,8 @@ static void __init mx31_3ds_init(void)
 	if (!otg_mode_host)
 		imx31_add_fsl_usb2_udc(&usbotg_pdata);
 
-	if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
+	if (mxc_expio_init(MX31_CS5_BASE_ADDR,
+			   gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1))))
 		printk(KERN_WARNING "Init of the debug board failed, all "
 				    "devices on the debug board are unusable.\n");
 	imx31_add_imx2_wdt(NULL);
arch/arm/mach-imx/mach-mx31ads.c +9 -5
index 4917aab..2e878ee 100644
@@ -60,7 +60,6 @@
 #define PBC_INTSTATUS_REG	(PBC_INTSTATUS + PBC_BASE_ADDRESS)
 #define PBC_INTMASK_SET_REG	(PBC_INTMASK_SET + PBC_BASE_ADDRESS)
 #define PBC_INTMASK_CLEAR_REG	(PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
-#define EXPIO_PARENT_INT	IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
 
 #define MXC_IRQ_TO_EXPIO(irq)	((irq) - MXC_EXP_IO_BASE)
 
@@ -184,7 +183,7 @@ static struct irq_chip expio_irq_chip = {
 
 static void __init mx31ads_init_expio(void)
 {
-	int i;
+	int i, irq;
 
 	printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n");
 
@@ -201,8 +200,9 @@ static void __init mx31ads_init_expio(void)
 		irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
 		set_irq_flags(i, IRQF_VALID);
 	}
-	irq_set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
-	irq_set_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
+	irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_4));
+	irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
+	irq_set_chained_handler(irq, mx31ads_expio_irq_handler);
 }
 
 #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
@@ -463,13 +463,17 @@ static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = {
 	{
 		I2C_BOARD_INFO("wm8350", 0x1a),
 		.platform_data = &mx31_wm8350_pdata,
-		.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+		/* irq number is run-time assigned */
 	},
 #endif
 };
 
 static void __init mxc_init_i2c(void)
 {
+#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
+	mx31ads_i2c1_devices[0].irq =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
+#endif
 	i2c_register_board_info(1, mx31ads_i2c1_devices,
 				ARRAY_SIZE(mx31ads_i2c1_devices));
 
arch/arm/mach-imx/mach-mx31lilly.c +7 -3
index 02401bb..2ba43aa 100644
@@ -63,8 +63,7 @@ static struct resource smsc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
-		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
+		/* irq number is run-time assigned */
 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
 	}
 };
@@ -231,7 +230,7 @@ static struct spi_board_info mc13783_dev __initdata = {
 	.bus_num	= 1,
 	.chip_select	= 0,
 	.platform_data	= &mc13783_pdata,
-	.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+	/* irq number is run-time assigned */
 };
 
 static struct platform_device *devices[] __initdata = {
@@ -278,8 +277,13 @@ static void __init mx31lilly_board_init(void)
 
 	imx31_add_spi_imx0(&spi0_pdata);
 	imx31_add_spi_imx1(&spi1_pdata);
+	mc13783_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
 	spi_register_board_info(&mc13783_dev, 1);
 
+	smsc91x_resources[1].start =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
+	smsc91x_resources[1].end =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
 	platform_add_devices(devices, ARRAY_SIZE(devices));
 
 	/* USB */
arch/arm/mach-imx/mach-mx31lite.c +7 -3
index ef80751..8adb1fc 100644
@@ -81,8 +81,7 @@ static struct resource smsc911x_resources[] = {
 		.end		= MX31_CS4_BASE_ADDR + 0x100,
 		.flags		= IORESOURCE_MEM,
 	}, {
-		.start		= IOMUX_TO_IRQ(MX31_PIN_SFS6),
-		.end		= IOMUX_TO_IRQ(MX31_PIN_SFS6),
+		/* irq number is run-time assigned */
 		.flags		= IORESOURCE_IRQ,
 	},
 };
@@ -122,7 +121,7 @@ static struct spi_board_info mc13783_spi_dev __initdata = {
 	.bus_num	= 1,
 	.chip_select    = 0,
 	.platform_data  = &mc13783_pdata,
-	.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+	/* irq number is run-time assigned */
 };
 
 /*
@@ -251,6 +250,7 @@ static void __init mx31lite_init(void)
 	imx31_add_mxc_nand(&mx31lite_nand_board_info);
 
 	imx31_add_spi_imx1(&spi1_pdata);
+	mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
 	spi_register_board_info(&mc13783_spi_dev, 1);
 
 	/* USB */
@@ -265,6 +265,10 @@ static void __init mx31lite_init(void)
 		pr_warning("could not get LAN irq gpio\n");
 	else {
 		gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
+		smsc911x_resources[1].start =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
+		smsc911x_resources[1].end =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 		platform_device_register(&smsc911x_device);
 	}
 }
arch/arm/mach-imx/mach-mx31moboard.c +3 -1
index f225262..4ff84c0 100644
@@ -289,7 +289,7 @@ static struct mc13xxx_platform_data moboard_pmic = {
 static struct spi_board_info moboard_spi_board_info[] __initdata = {
 	{
 		.modalias = "mc13783",
-		.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+		/* irq number is run-time assigned */
 		.max_speed_hz = 300000,
 		.bus_num = 1,
 		.chip_select = 0,
@@ -541,6 +541,8 @@ static void __init mx31moboard_init(void)
 
 	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq");
 	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
+	moboard_spi_board_info[0].irq =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
 	spi_register_board_info(moboard_spi_board_info,
 		ARRAY_SIZE(moboard_spi_board_info));
 
arch/arm/mach-imx/mach-pcm037.c +12 -6
index e48854b..92dc17c 100644
@@ -223,8 +223,7 @@ static struct resource smsc911x_resources[] = {
 		.end		= MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
 		.flags		= IORESOURCE_MEM,
 	}, {
-		.start		= IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
-		.end		= IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
+		/* irq number is run-time assigned */
 		.flags		= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 	},
 };
@@ -369,7 +368,7 @@ static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
 	gpio_direction_input(SDHC1_GPIO_WP);
 #endif
 
-	ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
+	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SCK6)), detect_irq,
 			IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 				"sdhc-detect", data);
 	if (ret)
@@ -389,7 +388,7 @@ err_gpio_free:
 
 static void pcm970_sdhc1_exit(struct device *dev, void *data)
 {
-	free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
+	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SCK6)), data);
 	gpio_free(SDHC1_GPIO_DET);
 	gpio_free(SDHC1_GPIO_WP);
 }
@@ -509,8 +508,7 @@ static struct resource pcm970_sja1000_resources[] = {
 		.end     = MX31_CS5_BASE_ADDR + 0x100 - 1,
 		.flags   = IORESOURCE_MEM,
 	}, {
-		.start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
-		.end     = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
+		/* irq number is run-time assigned */
 		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 	},
 };
@@ -624,6 +622,10 @@ static void __init pcm037_init(void)
 		pr_warning("could not get LAN irq gpio\n");
 	else {
 		gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
+		smsc911x_resources[1].start =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
+		smsc911x_resources[1].end =
+			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
 		platform_device_register(&pcm037_eth);
 	}
 
@@ -650,6 +652,10 @@ static void __init pcm037_init(void)
 
 	pcm037_init_camera();
 
+	pcm970_sja1000_resources[1].start =
+			gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
+	pcm970_sja1000_resources[1].end =
+			gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
 	platform_device_register(&pcm970_sja1000);
 
 	if (otg_mode_host) {
arch/arm/mach-imx/mach-qong.c +5 -4
index 2606210..b6f11d2 100644
@@ -51,8 +51,6 @@
 	(QONG_FPGA_BASEADDR + QONG_DNET_ID * QONG_FPGA_PERIPH_SIZE)
 #define QONG_DNET_SIZE		0x00001000
 
-#define QONG_FPGA_IRQ		IOMUX_TO_IRQ(MX31_PIN_DTR_DCE1)
-
 static const struct imxuart_platform_data uart_pdata __initconst = {
 	.flags = IMXUART_HAVE_RTSCTS,
 };
@@ -78,8 +76,7 @@ static struct resource dnet_resources[] = {
 		.end	= QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
 	}, {
-		.start	= QONG_FPGA_IRQ,
-		.end	= QONG_FPGA_IRQ,
+		/* irq number is run-time assigned */
 		.flags	= IORESOURCE_IRQ,
 	},
 };
@@ -95,6 +92,10 @@ static int __init qong_init_dnet(void)
 {
 	int ret;
 
+	dnet_resources[1].start =
+		gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1));
+	dnet_resources[1].end =
+		gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1));
 	ret = platform_device_register(&dnet_device);
 	return ret;
 }
arch/arm/mach-imx/mx31lilly-db.c +3 -2
index 7d26f76..2df625b 100644
@@ -130,7 +130,8 @@ static int mxc_mmc1_init(struct device *dev,
 	gpio_direction_input(gpio_det);
 	gpio_direction_input(gpio_wp);
 
-	ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), detect_irq,
+	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)),
+			  detect_irq,
 			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 			  "MMC detect", data);
 	if (ret)
@@ -151,7 +152,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
 {
 	gpio_free(gpio_det);
 	gpio_free(gpio_wp);
-	free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
+	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)), data);
 }
 
 static const struct imxmmc_platform_data mmc_pdata __initconst = {
arch/arm/mach-imx/mx31lite-db.c +3 -2
index bf0fb87..d639391 100644
@@ -116,7 +116,8 @@ static int mxc_mmc1_init(struct device *dev,
 	gpio_direction_input(gpio_det);
 	gpio_direction_input(gpio_wp);
 
-	ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq,
+	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)),
+			  detect_irq,
 			  IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 			  "MMC detect", data);
 	if (ret)
@@ -137,7 +138,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
 {
 	gpio_free(gpio_det);
 	gpio_free(gpio_wp);
-	free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data);
+	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)), data);
 }
 
 static const struct imxmmc_platform_data mmc_pdata __initconst = {
arch/arm/plat-mxc/include/mach/iomux-mx3.h +0 -3
index 63f22a0..d8b65b5 100644
@@ -160,9 +160,6 @@ int mxc_iomux_mode(unsigned int pin_mode);
 
 #define IOMUX_TO_GPIO(iomux_pin) \
 	((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT)
-#define IOMUX_TO_IRQ(iomux_pin) \
-	(((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) + \
-	MXC_GPIO_IRQ_START)
 
 /*
  * This enumeration is constructed based on the Section
Signature · 1 line
1.7.5.4
author
#8 lore raw

PATCH v2 5/7 ARM: imx: eliminate macro IRQ_GPIOx()

In reply to Shawn Guo

This patch changes all the static gpio irq number assigning with IRQ_GPIOA() ... IRQ_GPIOF() to run-time assigning with gpio_to_irq call, and in turn eliminates these macros.

---
 arch/arm/mach-imx/eukrea_mbimx27-baseboard.c |    3 ++-
 arch/arm/mach-imx/mach-apf9328.c             |    6 ++++--
 arch/arm/mach-imx/mach-cpuimx27.c            |   12 ++++++++----
 arch/arm/mach-imx/mach-imx27_visstrim_m10.c  |    8 ++++----
 arch/arm/mach-imx/mach-mx21ads.c             |    5 ++---
 arch/arm/mach-imx/mach-mx27ads.c             |   12 ++++++------
 arch/arm/mach-imx/mach-mxt_td60.c            |    6 +++---
 arch/arm/mach-imx/mach-pca100.c              |    4 ++--
 arch/arm/mach-imx/mach-pcm038.c              |    4 +++-
 arch/arm/mach-imx/mach-scb9328.c             |    6 ++++--
 arch/arm/mach-imx/pcm970-baseboard.c         |   13 +++++++------
 arch/arm/plat-mxc/include/mach/iomux-v1.h    |   12 ++++++------
 12 files changed, 51 insertions(+), 40 deletions(-)
arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +2 -1
index 5db3e14..420ef06 100644
@@ -267,7 +267,7 @@ static struct spi_board_info __maybe_unused
 		.bus_num	= 0,
 		.chip_select	= 0,
 		.max_speed_hz	= 1500000,
-		.irq		= IRQ_GPIOD(25),
+		/* irq number is run-time assigned */
 		.platform_data	= &ads7846_config,
 		.mode           = SPI_MODE_2,
 	},
@@ -349,6 +349,7 @@ void __init eukrea_mbimx27_baseboard_init(void)
 	/* SPI_CS0 init */
 	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
 	imx27_add_spi_imx0(&eukrea_mbimx27_spi0_data);
+	eukrea_mbimx27_spi_board_info[0].irq = gpio_to_irq(IMX_GPIOD(25));
 	spi_register_board_info(eukrea_mbimx27_spi_board_info,
 			ARRAY_SIZE(eukrea_mbimx27_spi_board_info));
 
arch/arm/mach-imx/mach-apf9328.c +4 -2
index f4a63ee..1265b33 100644
@@ -18,6 +18,7 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
 #include <linux/dm9000.h>
+#include <linux/gpio.h>
 #include <linux/i2c.h>
 
 #include <asm/mach-types.h>
@@ -87,8 +88,7 @@ static struct resource dm9000_resources[] = {
 		.end    = MX1_CS4_PHYS + 0x00C00003,
 		.flags  = IORESOURCE_MEM,
 	}, {
-		.start  = IRQ_GPIOB(14),
-		.end    = IRQ_GPIOB(14),
+		/* irq number is run-time assigned */
 		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 	},
 };
@@ -129,6 +129,8 @@ static void __init apf9328_init(void)
 
 	imx1_add_imx_i2c(&apf9328_i2c_data);
 
+	dm9000_resources[2].start = gpio_to_irq(IMX_GPIOB(14));
+	dm9000_resources[2].end = gpio_to_irq(IMX_GPIOB(14));
 	platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
arch/arm/mach-imx/mach-cpuimx27.c +8 -4
index d085aea..5c3792c 100644
@@ -169,28 +169,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
 static struct plat_serial8250_port serial_platform_data[] = {
 	{
 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
-		.irq = IRQ_GPIOB(23),
+		/* irq number is run-time assigned */
 		.uartclk = 14745600,
 		.regshift = 1,
 		.iotype = UPIO_MEM,
 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
 	}, {
 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
-		.irq = IRQ_GPIOB(22),
+		/* irq number is run-time assigned */
 		.uartclk = 14745600,
 		.regshift = 1,
 		.iotype = UPIO_MEM,
 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
 	}, {
 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
-		.irq = IRQ_GPIOB(27),
+		/* irq number is run-time assigned */
 		.uartclk = 14745600,
 		.regshift = 1,
 		.iotype = UPIO_MEM,
 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
 	}, {
 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
-		.irq = IRQ_GPIOB(30),
+		/* irq number is run-time assigned */
 		.uartclk = 14745600,
 		.regshift = 1,
 		.iotype = UPIO_MEM,
@@ -279,6 +279,10 @@ static void __init eukrea_cpuimx27_init(void)
 #endif
 
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
+	serial_platform_data[0].irq = IMX_GPIOB(23);
+	serial_platform_data[1].irq = IMX_GPIOB(22);
+	serial_platform_data[2].irq = IMX_GPIOB(27);
+	serial_platform_data[3].irq = IMX_GPIOB(30);
 	platform_device_register(&serial_device);
 #endif
 
arch/arm/mach-imx/mach-imx27_visstrim_m10.c +4 -4
index c2766ae..603ee9a 100644
@@ -40,7 +40,7 @@
 #include "devices-imx27.h"
 
 #define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
-#define SDHC1_IRQ IRQ_GPIOB(25)
+#define SDHC1_IRQ_GPIO IMX_GPIOB(25)
 
 static const int visstrim_m10_pins[] __initconst = {
 	/* UART1 (console) */
@@ -142,14 +142,14 @@ static int visstrim_m10_sdhc1_init(struct device *dev,
 {
 	int ret;
 
-	ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
-				"mmc-detect", data);
+	ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
+			  IRQF_TRIGGER_FALLING, "mmc-detect", data);
 	return ret;
 }
 
 static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
 {
-	free_irq(SDHC1_IRQ, data);
+	free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
 }
 
 static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
arch/arm/mach-imx/mach-mx21ads.c +2 -3
index 8d9f955..a3bce99 100644
@@ -37,7 +37,6 @@
 #define MX21ADS_REG_ADDR(offset)    (void __force __iomem *) \
 		(MX21ADS_MMIO_BASE_ADDR + (offset))
 
-#define MX21ADS_CS8900A_IRQ         IRQ_GPIOE(11)
 #define MX21ADS_CS8900A_IOBASE_REG  MX21ADS_REG_ADDR(0x000000)
 #define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
 #define MX21ADS_VERSION_REG         MX21ADS_REG_ADDR(0x400000)
@@ -229,13 +228,13 @@ static int mx21ads_sdhc_get_ro(struct device *dev)
 static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
 	void *data)
 {
-	return request_irq(IRQ_GPIOD(25), detect_irq,
+	return request_irq(gpio_to_irq(IMX_GPIOD(25)), detect_irq,
 		IRQF_TRIGGER_FALLING, "mmc-detect", data);
 }
 
 static void mx21ads_sdhc_exit(struct device *dev, void *data)
 {
-	free_irq(IRQ_GPIOD(25), data);
+	free_irq(gpio_to_irq(IMX_GPIOD(25)), data);
 }
 
 static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
arch/arm/mach-imx/mach-mx27ads.c +6 -6
index 0228d2e..9be8e50 100644
@@ -246,25 +246,25 @@ static const struct imx_fb_platform_data mx27ads_fb_data __initconst = {
 static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
 			      void *data)
 {
-	return request_irq(IRQ_GPIOE(21), detect_irq, IRQF_TRIGGER_RISING,
-			   "sdhc1-card-detect", data);
+	return request_irq(gpio_to_irq(IMX_GPIOE(21)), detect_irq,
+			   IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
 }
 
 static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
 			      void *data)
 {
-	return request_irq(IRQ_GPIOB(7), detect_irq, IRQF_TRIGGER_RISING,
-			   "sdhc2-card-detect", data);
+	return request_irq(gpio_to_irq(IMX_GPIOB(7)), detect_irq,
+			   IRQF_TRIGGER_RISING, "sdhc2-card-detect", data);
 }
 
 static void mx27ads_sdhc1_exit(struct device *dev, void *data)
 {
-	free_irq(IRQ_GPIOE(21), data);
+	free_irq(gpio_to_irq(IMX_GPIOE(21)), data);
 }
 
 static void mx27ads_sdhc2_exit(struct device *dev, void *data)
 {
-	free_irq(IRQ_GPIOB(7), data);
+	free_irq(gpio_to_irq(IMX_GPIOB(7)), data);
 }
 
 static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
arch/arm/mach-imx/mach-mxt_td60.c +3 -3
index 8b3d3f0..45e63ec 100644
@@ -213,13 +213,13 @@ static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
 static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
 				void *data)
 {
-	return request_irq(IRQ_GPIOF(8), detect_irq, IRQF_TRIGGER_FALLING,
-				"sdhc1-card-detect", data);
+	return request_irq(gpio_to_irq(IMX_GPIOF(8)), detect_irq,
+			   IRQF_TRIGGER_FALLING, "sdhc1-card-detect", data);
 }
 
 static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
 {
-	free_irq(IRQ_GPIOF(8), data);
+	free_irq(gpio_to_irq(IMX_GPIOF(8)), data);
 }
 
 static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
arch/arm/mach-imx/mach-pca100.c +2 -2
index d3b9c6b..8cd7c6f 100644
@@ -246,7 +246,7 @@ static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
 {
 	int ret;
 
-	ret = request_irq(IRQ_GPIOC(29), detect_irq,
+	ret = request_irq(gpio_to_irq(IMX_GPIOC(29)), detect_irq,
 			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 			  "imx-mmc-detect", data);
 	if (ret)
@@ -258,7 +258,7 @@ static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
 
 static void pca100_sdhc2_exit(struct device *dev, void *data)
 {
-	free_irq(IRQ_GPIOC(29), data);
+	free_irq(gpio_to_irq(IMX_GPIOC(29)), data);
 }
 
 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
arch/arm/mach-imx/mach-pcm038.c +3 -1
index 16f126d..3255d7b 100644
@@ -27,6 +27,7 @@
 #include <linux/mfd/mc13783.h>
 #include <linux/spi/spi.h>
 #include <linux/irq.h>
+#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -274,7 +275,7 @@ static struct mc13xxx_platform_data pcm038_pmic = {
 static struct spi_board_info pcm038_spi_board_info[] __initdata = {
 	{
 		.modalias = "mc13783",
-		.irq = IRQ_GPIOB(23),
+		/* irq number is run-time assigned */
 		.max_speed_hz = 300000,
 		.bus_num = 0,
 		.chip_select = 0,
@@ -325,6 +326,7 @@ static void __init pcm038_init(void)
 	mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
 
 	imx27_add_spi_imx0(&pcm038_spi0_data);
+	pcm038_spi_board_info[0].irq = gpio_to_irq(IMX_GPIOB(23));
 	spi_register_board_info(pcm038_spi_board_info,
 				ARRAY_SIZE(pcm038_spi_board_info));
 
arch/arm/mach-imx/mach-scb9328.c +4 -2
index cb9ceae..3c94228 100644
@@ -14,6 +14,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/interrupt.h>
 #include <linux/dm9000.h>
+#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -78,8 +79,7 @@ static struct resource dm9000x_resources[] = {
 		.end	= MX1_CS5_PHYS + 5,
 		.flags	= IORESOURCE_MEM,	/* data access */
 	}, {
-		.start	= IRQ_GPIOC(3),
-		.end	= IRQ_GPIOC(3),
+		/* irq number is run-time assigned */
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 	},
 };
@@ -123,6 +123,8 @@ static void __init scb9328_init(void)
 	imx1_add_imx_uart0(&uart_pdata);
 
 	printk(KERN_INFO"Scb9328: Adding devices\n");
+	dm9000x_resources[2].start = gpio_to_irq(IMX_GPIOC(3));
+	dm9000x_resources[2].end = gpio_to_irq(IMX_GPIOC(3));
 	platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
arch/arm/mach-imx/pcm970-baseboard.c +7 -6
index 99afbc3..8ca349e 100644
@@ -95,14 +95,14 @@ static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void
 {
 	int ret;
 
-	ret = request_irq(IRQ_GPIOC(29), detect_irq, IRQF_TRIGGER_FALLING,
-				"imx-mmc-detect", data);
+	ret = request_irq(gpio_to_irq(IMX_GPIOC(29)), detect_irq,
+			  IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
 	if (ret)
 		return ret;
 
 	ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro");
 	if (ret) {
-		free_irq(IRQ_GPIOC(29), data);
+		free_irq(gpio_to_irq(IMX_GPIOC(29)), data);
 		return ret;
 	}
 
@@ -113,7 +113,7 @@ static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void
 
 static void pcm970_sdhc2_exit(struct device *dev, void *data)
 {
-	free_irq(IRQ_GPIOC(29), data);
+	free_irq(gpio_to_irq(IMX_GPIOC(29)), data);
 	gpio_free(GPIO_PORTC + 28);
 }
 
@@ -192,8 +192,7 @@ static struct resource pcm970_sja1000_resources[] = {
 		.end     = MX27_CS4_BASE_ADDR + 0x100 - 1,
 		.flags   = IORESOURCE_MEM,
 	}, {
-		.start   = IRQ_GPIOE(19),
-		.end     = IRQ_GPIOE(19),
+		/* irq number is run-time assigned */
 		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 	},
 };
@@ -227,5 +226,7 @@ void __init pcm970_baseboard_init(void)
 	imx27_add_imx_fb(&pcm038_fb_data);
 	mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN);
 	imx27_add_mxc_mmc(1, &sdhc_pdata);
+	pcm970_sja1000_resources[1].start = gpio_to_irq(IMX_GPIOE(19));
+	pcm970_sja1000_resources[1].end = gpio_to_irq(IMX_GPIOE(19));
 	platform_device_register(&pcm970_sja1000);
 }
arch/arm/plat-mxc/include/mach/iomux-v1.h +6 -6
index 6fa8a70..2820341 100644
@@ -85,12 +85,12 @@
 #define GPIO_BOUT_0	(2 << GPIO_BOUT_SHIFT)
 #define GPIO_BOUT_1	(3 << GPIO_BOUT_SHIFT)
 
-#define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
-#define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
-#define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
-#define IRQ_GPIOD(x)  (IRQ_GPIOC(32) + x)
-#define IRQ_GPIOE(x)  (IRQ_GPIOD(32) + x)
-#define IRQ_GPIOF(x)  (IRQ_GPIOE(32) + x)
+#define IMX_GPIOA(x)  (GPIO_PORTA + x)
+#define IMX_GPIOB(x)  (GPIO_PORTB + x)
+#define IMX_GPIOC(x)  (GPIO_PORTC + x)
+#define IMX_GPIOD(x)  (GPIO_PORTD + x)
+#define IMX_GPIOE(x)  (GPIO_PORTE + x)
+#define IMX_GPIOF(x)  (GPIO_PORTF + x)
 
 extern int mxc_gpio_mode(int gpio_mode);
 extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
Signature · 1 line
1.7.5.4
reviewer
#9 lore raw

PATCH v2 5/7 ARM: imx: eliminate macro IRQ_GPIOx()

Review

Quoted 6 lines · Shawn Guo
(quoted diff) +6 -0
+#define IMX_GPIOA(x) ?(GPIO_PORTA + x)
+#define IMX_GPIOB(x) ?(GPIO_PORTB + x)
+#define IMX_GPIOC(x) ?(GPIO_PORTC + x)
+#define IMX_GPIOD(x) ?(GPIO_PORTD + x)
+#define IMX_GPIOE(x) ?(GPIO_PORTE + x)
+#define IMX_GPIOF(x) ?(GPIO_PORTF + x)

Do we really need this new macros?

Why not use the standard IMX_GPIO_NR macro instead?

author
#10 lore raw

PATCH v2 5/7 ARM: imx: eliminate macro IRQ_GPIOx()

Quoted 11 lines · Fabio Estevam

Review

Quoted 6 lines · Shawn Guo
(quoted diff) +6 -0
+#define IMX_GPIOA(x) ?(GPIO_PORTA + x)
+#define IMX_GPIOB(x) ?(GPIO_PORTB + x)
+#define IMX_GPIOC(x) ?(GPIO_PORTC + x)
+#define IMX_GPIOD(x) ?(GPIO_PORTD + x)
+#define IMX_GPIOE(x) ?(GPIO_PORTE + x)
+#define IMX_GPIOF(x) ?(GPIO_PORTF + x)

Do we really need this new macros?

They are not brand new. They are here to help a plain translation from IRQ_GPIOx() to IMX_GPIOx().

Quoted 1 line

Why not use the standard IMX_GPIO_NR macro instead?

It can be another patch, if you are interested.

Signature · 2 lines
Regards,
Shawn
author
#11 lore raw

PATCH v2 6/7 gpio/mxc: adopt irq_domain for gpio interrupt support

In reply to Shawn Guo

It adopts irq_domain for imx gpio interrupt support, and fixes the translation between irq and gpio number for DT users.

As the results, macro MXC_GPIO_IRQ_START is referenced nowhere in gpio-mxc driver, and the gpio irq_domain initilization in DT platform code is removed.

---
 arch/arm/mach-imx/mach-imx6q.c |   14 ---------
 arch/arm/mach-mx5/imx51-dt.c   |   12 --------
 arch/arm/mach-mx5/imx53-dt.c   |   12 --------
 drivers/gpio/gpio-mxc.c        |   59 ++++++++++++++++-----------------------
 4 files changed, 24 insertions(+), 73 deletions(-)
arch/arm/mach-imx/mach-imx6q.c +0 -14
index 6075d4d..8268471 100644
@@ -14,7 +14,6 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/irq.h>
-#include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -91,21 +90,8 @@ static void __init imx6q_map_io(void)
 	imx6q_clock_map_io();
 }
 
-static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
-				struct device_node *interrupt_parent)
-{
-	static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
-
-	gpio_irq_base -= 32;
-	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
-			      NULL);
-
-	return 0;
-}
-
 static const struct of_device_id imx6q_irq_match[] __initconst = {
 	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
-	{ .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
 	{ /* sentinel */ }
 };
 
arch/arm/mach-mx5/imx51-dt.c +0 -12
index 636ef34..035a147 100644
@@ -56,20 +56,8 @@ static int __init imx51_tzic_init_cb(struct device_node *np,
 	return 0;
 }
 
-static int __init imx51_gpio_add_irq_domain(struct device_node *np,
-				struct device_node *interrupt_parent)
-{
-	static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
-
-	gpio_irq_base -= 32;
-	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
-
-	return 0;
-}
-
 static const struct of_device_id imx51_irq_match[] __initconst = {
 	{ .compatible = "fsl,imx51-tzic", .data = imx51_tzic_init_cb, },
-	{ .compatible = "fsl,imx51-gpio", .data = imx51_gpio_add_irq_domain, },
 	{ /* sentinel */ }
 };
 
arch/arm/mach-mx5/imx53-dt.c +0 -12
index ce2b700..d59f4db 100644
@@ -60,20 +60,8 @@ static int __init imx53_tzic_init_cb(struct device_node *np,
 	return 0;
 }
 
-static int __init imx53_gpio_add_irq_domain(struct device_node *np,
-				struct device_node *interrupt_parent)
-{
-	static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
-
-	gpio_irq_base -= 32;
-	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
-
-	return 0;
-}
-
 static const struct of_device_id imx53_irq_match[] __initconst = {
 	{ .compatible = "fsl,imx53-tzic", .data = imx53_tzic_init_cb, },
-	{ .compatible = "fsl,imx53-gpio", .data = imx53_gpio_add_irq_domain, },
 	{ /* sentinel */ }
 };
 
drivers/gpio/gpio-mxc.c +24 -35

157 lines not on this page · raw message

Signature · 1 line
1.7.5.4
author
#12 lore raw

PATCH v2 7/7 ARM: imx: remove macro MXC_GPIO_IRQ_START

In reply to Shawn Guo

Now, macro MXC_GPIO_IRQ_START is referenced nowhere, so remove it.

---
 arch/arm/plat-mxc/include/mach/irqs.h |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)
arch/arm/plat-mxc/include/mach/irqs.h +0 -2
index fd9efb0..612fcf1 100644
@@ -28,8 +28,6 @@
 #define MXC_INTERNAL_IRQS	64
 #endif
 
-#define MXC_GPIO_IRQ_START	MXC_INTERNAL_IRQS
-
 /*
  * The next 16 interrupts are for board specific purposes.  Since
  * the kernel can only run on one machine at a time, we can re-use
Signature · 1 line
1.7.5.4
#13 lore raw

PATCH v2 7/7 ARM: imx: remove macro MXC_GPIO_IRQ_START

Quoted 3 lines · Shawn Guo

Now, macro MXC_GPIO_IRQ_START is referenced nowhere, so remove it.

Series looks okay to me on a brief review. I'll let Rob pick it up since it needs to be based on top of his generic_irq work. There will still need to be some rebasing while I stablize the irq_domain tree, but I'll try to do that ASAP.

g.

Quoted 20 lines
---
 arch/arm/plat-mxc/include/mach/irqs.h |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)
arch/arm/plat-mxc/include/mach/irqs.h +0 -2
index fd9efb0..612fcf1 100644
@@ -28,8 +28,6 @@
 #define MXC_INTERNAL_IRQS	64
 #endif
 
-#define MXC_GPIO_IRQ_START	MXC_INTERNAL_IRQS
-
 /*
  * The next 16 interrupts are for board specific purposes.  Since
  * the kernel can only run on one machine at a time, we can re-use
Signature · 1 line
1.7.5.4
author
#14 lore raw

PATCH v2 7/7 ARM: imx: remove macro MXC_GPIO_IRQ_START

Quoted 10 lines · Grant Likely
Quoted 3 lines · Shawn Guo

Now, macro MXC_GPIO_IRQ_START is referenced nowhere, so remove it.

Series looks okay to me on a brief review. I'll let Rob pick it up since it needs to be based on top of his generic_irq work. There will still need to be some rebasing while I stablize the irq_domain tree, but I'll try to do that ASAP.

Thanks for looking at it, Grant. But it does not work properly with your irqdomain/next yet. It requires some little change on irq_domain side, which is mentioned in another reply to you.

Signature · 2 lines
Regards,
Shawn
maintainer
#15 lore raw

v2 cover irq_domain for imx tzic and gpio

In reply to Shawn Guo
Quoted 5 lines · Shawn Guo

Changes since v1:
* Drop the change on generic-irq, which was naked by Rob
* Separate DT initializtion flow from non-DT for tzic
* Use legacy domain for non-DT and linear for DT

Quoted 8 lines

Shawn Guo (7):
dt: add empty of_find_compatible_node function
ARM: imx5: adopt generic_chip irq_domain support for tzic
ARM: imx: eliminate macro IMX_GPIO_TO_IRQ()
ARM: imx: eliminate macro IOMUX_TO_IRQ()
ARM: imx: eliminate macro IRQ_GPIOx()
gpio/mxc: adopt irq_domain for gpio interrupt support
ARM: imx: remove macro MXC_GPIO_IRQ_START

Signature · 4 lines
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