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GPIO: LPC32xx: Fix missing bit selection mask

PATCH Superseded Roland Stigge 3 participants 4 messages Feb 21, 2012 – Feb 25, 2012

Subsystems (2)
GPIO Arm/LPC32XX SoC support

v2 of 3 Superseded Latest is v3 →

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Roland Stigge

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#0 lore raw

PATCH v2 1/2 GPIO: LPC32xx: Fix missing bit selection mask

Add missing mask to pin bit selection in gpio-lpc32xx.c (#define GPIO3_PIN_IN_SEL)

Signed-off-by Roland Stigge <[email protected]>
---
 drivers/gpio/gpio-lpc32xx.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpio/gpio-lpc32xx.c +1 -1
@@ -59,7 +59,7 @@
 #define GPO3_PIN_TO_BIT(x)			(1 << (x))
 #define GPIO012_PIN_IN_SEL(x, y)		(((x) >> (y)) & 1)
 #define GPIO3_PIN_IN_SHIFT(x)			((x) == 5 ? 24 : 10 + (x))
-#define GPIO3_PIN_IN_SEL(x, y)			((x) >> GPIO3_PIN_IN_SHIFT(y))
+#define GPIO3_PIN_IN_SEL(x, y)			(((x) >> GPIO3_PIN_IN_SHIFT(y)) & 1)
 #define GPIO3_PIN5_IN_SEL(x)			(((x) >> 24) & 1)
 #define GPI3_PIN_IN_SEL(x, y)			(((x) >> (y)) & 1)
author
#1 lore raw

PATCH v2 2/2 GPIO: LPC32xx: Add output reading to GPO P3

The chip offers the function to detect the current state of output of the GPO P3 pins. Useful for reading GPIO output state in Linux' GPIO API, e.g. via sysfs

Signed-off-by Roland Stigge <[email protected]>
---
 drivers/gpio/gpio-lpc32xx.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)
drivers/gpio/gpio-lpc32xx.c +17 -0
@@ -62,9 +62,11 @@
 #define GPIO3_PIN_IN_SEL(x, y)			(((x) >> GPIO3_PIN_IN_SHIFT(y)) & 1)
 #define GPIO3_PIN5_IN_SEL(x)			(((x) >> 24) & 1)
 #define GPI3_PIN_IN_SEL(x, y)			(((x) >> (y)) & 1)
+#define GPO3_PIN_IN_SEL(x, y)			(((x) >> (y)) & 1)
 
 struct gpio_regs {
 	void __iomem *inp_state;
+	void __iomem *outp_state;
 	void __iomem *outp_set;
 	void __iomem *outp_clr;
 	void __iomem *dir_set;

@@ -145,6 +147,7 @@ static struct gpio_regs gpio_grp_regs_p2
 
 static struct gpio_regs gpio_grp_regs_p3 = {
 	.inp_state	= LPC32XX_GPIO_P3_INP_STATE,
+	.outp_state	= LPC32XX_GPIO_P3_OUTP_STATE,
 	.outp_set	= LPC32XX_GPIO_P3_OUTP_SET,
 	.outp_clr	= LPC32XX_GPIO_P3_OUTP_CLR,
 	.dir_set	= LPC32XX_GPIO_P2_DIR_SET,

@@ -240,6 +243,12 @@ static int __get_gpi_state_p3(struct lpc
 	return GPI3_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), pin);
 }
 
+static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group,
+	unsigned pin)
+{
+	return GPO3_PIN_IN_SEL(__raw_readl(group->gpio_grp->outp_state), pin);
+}
+
 /*
  * GENERIC_GPIO primitives.
  */

@@ -340,6 +349,13 @@ static void lpc32xx_gpo_set_value(struct
 	__set_gpo_level_p3(group, pin, value);
 }
 
+static int lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin)
+{
+	struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
+
+	return __get_gpo_state_p3(group, pin);
+}
+
 static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin)
 {
 	if (pin < chip->ngpio)

@@ -427,6 +443,7 @@ static struct lpc32xx_gpio_chip lpc32xx_
 			.label			= "gpo_p3",
 			.direction_output	= lpc32xx_gpio_dir_out_always,
 			.set			= lpc32xx_gpo_set_value,
+			.get			= lpc32xx_gpo_get_value,
 			.request		= lpc32xx_gpio_request,
 			.base			= LPC32XX_GPO_P3_GRP,
 			.ngpio			= LPC32XX_GPO_P3_MAX,
#2 lore raw

PATCH v2 2/2 GPIO: LPC32xx: Add output reading to GPO P3

Quoted 6 lines

The chip offers the function to detect the current state of output of the GPO P3 pins. Useful for reading GPIO output state in Linux' GPIO API, e.g. via sysfs

Signed-off-by Roland Stigge <[email protected]>

I hate to be picky on this one, but can a comment be added that this only reads the programmed output state and not the actual state of the pin? (Unfortunately) GPO pins have no method to monitor their actual output state.