Skip to contentSkip to conversation

ARM hugetlb support

PATCH New Bill Carson 4 participants 28 messages Feb 13, 2012 – Mar 8, 2012 Arm (32-bit)

lore
Share & tools
lore

Bill Carson

author
#0 lore raw

PATCH v2 1/1 ARM hugetlb support

Hi All

This is 2nd RFC PATCH for ARM huge page support. 2MB(two 1MB page)/16MB huge page are supported, Versatile Express Cortex-A9x4 tile is used as test board. Verification is done with libhugetlbfs with both arm/thumb2 instruction.

ChangeLog From V1:
- Drop L_PTE_HUGEPAGE defines
- Check whether super-section is supported through mmfr3
- Using mmu_context_t to store huge linux pte instead of mm_struct

Any suggestions would be truly welcome :)

Bill Carson(3)
- Add hugetlb high level hooks
- Using mmu_context_t to store huge linux pte
- Introduce set_hugepte_ext to set hardware pte

Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/Kconfig                      |   29 ++++++
 arch/arm/include/asm/glue-proc.h      |    3 +
 arch/arm/include/asm/hugetlb.h        |  178 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/mmu.h            |    4 +
 arch/arm/include/asm/page.h           |   15 +++
 arch/arm/include/asm/pgtable-2level.h |    3 +
 arch/arm/include/asm/pgtable.h        |    9 ++
 arch/arm/include/asm/proc-fns.h       |    3 +
 arch/arm/mm/Makefile                  |    1 +
 arch/arm/mm/dma-mapping.c             |    3 -
 arch/arm/mm/fault.c                   |   15 +++
 arch/arm/mm/hugetlb.c                 |  132 ++++++++++++++++++++++++
 arch/arm/mm/pgd.c                     |   11 ++
 arch/arm/mm/proc-v7-2level.S          |   87 ++++++++++++++++
 14 files changed, 490 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/include/asm/hugetlb.h
 create mode 100644 arch/arm/mm/hugetlb.c
author
#1 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/include/asm/hugetlb.h |  178 ++++++++++++++++++++++++++++++++++++++++
 arch/arm/include/asm/page.h    |   15 ++++
 arch/arm/mm/hugetlb.c          |  132 +++++++++++++++++++++++++++++
 3 files changed, 325 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/hugetlb.h
 create mode 100644 arch/arm/mm/hugetlb.c
arch/arm/include/asm/hugetlb.h new file +178 -0
new file mode 100644
index 0000000..3c34528
@@ -0,0 +1,178 @@
+/*
+ * hugetlb.h, ARM Huge Tlb Page support.
+ *
+ * Copyright (c) Bill Carson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_HUGETLB_H
+#define __ASM_HUGETLB_H
+
+#include <asm/page.h>
+#include <asm/pgtable-2level.h>
+#include <asm/tlb.h>
+
+
+/* 2M and 16M hugepage linux ptes are stored in mmu_context_t->huge_linux_pte
+ *
+ * 2M hugepage
+ * ===========
+ * one huge linux pte caters to two HW ptes,
+ *
+ * 16M hugepage
+ * ============
+ * one huge linux pte caters for sixteen HW ptes,
+ *
+ * The number of huge linux ptes depends on PAGE_OFFSET configuration
+ * which is defined as following:
+ */
+#define HUGE_LINUX_PTE_COUNT	( PAGE_OFFSET >> HPAGE_SHIFT)
+#define HUGE_LINUX_PTE_SIZE		(HUGE_LINUX_PTE_COUNT * sizeof(pte_t *))
+#define HUGE_LINUX_PTE_INDEX(addr) (addr >> HPAGE_SHIFT)
+
+static inline int is_hugepage_only_range(struct mm_struct *mm,
+					 unsigned long addr,
+					 unsigned long len)
+{
+	return 0;
+}
+
+static inline int prepare_hugepage_range(struct file *file,
+					 unsigned long addr,
+					 unsigned long len)
+{
+	struct hstate *h = hstate_file(file);
+	/* addr/len should be aligned with huge page size */
+	if (len & ~huge_page_mask(h))
+		return -EINVAL;
+	if (addr & ~huge_page_mask(h))
+		return -EINVAL;
+
+	return 0;
+}
+
+static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)
+{
+}
+
+static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,
+			unsigned long addr, unsigned long end,
+			unsigned long floor, unsigned long ceiling)
+{
+}
+
+static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+				   pte_t *ptep, pte_t pte)
+{
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd;
+	pte_t *linuxpte = mm->context.huge_linux_pte;
+
+	BUG_ON(linuxpte == NULL);
+	BUG_ON(HUGE_LINUX_PTE_INDEX(addr) >= HUGE_LINUX_PTE_COUNT);
+	BUG_ON(ptep != &linuxpte[HUGE_LINUX_PTE_INDEX(addr)]);
+
+	/* set huge linux pte first */
+	*ptep = pte;
+	
+	/* then set hardware pte */
+	addr &= HPAGE_MASK;
+	pgd = pgd_offset(mm, addr);
+	pud = pud_offset(pgd, addr);
+	pmd = pmd_offset(pud, addr);
+	set_hugepte_at(mm, addr, pmd, pte);
+}
+
+static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
+					    unsigned long addr, pte_t *ptep)
+{
+	pte_t pte = *ptep;
+	pte_t fake = L_PTE_YOUNG;
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd;
+
+	/* clear linux pte */
+	*ptep = 0;
+
+	/* let set_hugepte_at clear HW entry */
+	addr &= HPAGE_MASK;
+	pgd = pgd_offset(mm, addr);
+	pud = pud_offset(pgd, addr);
+	pmd = pmd_offset(pud, addr);
+	set_hugepte_at(mm, addr, pmd, fake);
+	return pte;
+}
+
+static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
+					 unsigned long addr, pte_t *ptep)
+{
+	if (HPAGE_SHIFT == SUPERSECTION_SHIFT)
+		flush_tlb_page(vma, addr & SUPERSECTION_MASK);
+	else {
+		flush_tlb_page(vma, addr & SECTION_MASK);
+		flush_tlb_page(vma, (addr & SECTION_MASK)^0x100000);
+	}
+}
+
+static inline int huge_pte_none(pte_t pte)
+{
+	return pte_none(pte);
+}
+
+static inline pte_t huge_pte_wrprotect(pte_t pte)
+{
+	return pte_wrprotect(pte);
+}
+
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+					   unsigned long addr, pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
+}
+
+static inline pte_t huge_ptep_get(pte_t *ptep)
+{
+	return *ptep;
+}
+
+static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
+					     unsigned long addr,
+					     pte_t *ptep, pte_t pte,
+					     int dirty)
+{
+	int changed = !pte_same(huge_ptep_get(ptep), pte);
+	if (changed) {
+		set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
+		huge_ptep_clear_flush(vma, addr, &pte);
+	}
+
+	return changed;
+}
+
+static inline int arch_prepare_hugepage(struct page *page)
+{
+	return 0;
+}
+
+static inline void arch_release_hugepage(struct page *page)
+{
+}
+
+#endif /* __ASM_HUGETLB_H */
+
arch/arm/include/asm/page.h +15 -0
index 97b440c..3e6769a 100644
@@ -15,6 +15,21 @@
 #define PAGE_SIZE		(_AC(1,UL) << PAGE_SHIFT)
 #define PAGE_MASK		(~(PAGE_SIZE-1))
 
+#ifdef CONFIG_HUGEPAGE_SIZE_2MB
+/* we have 2MB hugepage for two 1MB section mapping */
+#define HPAGE_SHIFT		(SECTION_SHIFT + 1)
+#define HPAGE_SIZE		(_AC(1, UL) << HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
+#ifdef CONFIG_HUGEPAGE_SIZE_16MB
+#define HPAGE_SHIFT		SUPERSECTION_SHIFT
+#define HPAGE_SIZE		(_AC(1, UL) << HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
 #ifndef __ASSEMBLY__
 
 #ifndef CONFIG_MMU
arch/arm/mm/hugetlb.c new file +132 -0

132 lines not on this page · raw message

Signature · 1 line
1.7.1
#2 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 12 lines · Bill Carson
arch/arm/include/asm/page.h +4 -0
index 97b440c..3e6769a 100644
@@ -15,6 +15,21 @@
 #define PAGE_SIZE		(_AC(1,UL) << PAGE_SHIFT)
 #define PAGE_MASK		(~(PAGE_SIZE-1))
 
+#ifdef CONFIG_HUGEPAGE_SIZE_2MB
+/* we have 2MB hugepage for two 1MB section mapping */
+#define HPAGE_SHIFT		(SECTION_SHIFT + 1)
+#define HPAGE_SIZE		(_AC(1, UL) << HPAGE_SHIFT)

arch/arm/include/asm/page.h line 31

Quoted 10 lines
arch/arm/include/asm/page.h +10 -0
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
+#ifdef CONFIG_HUGEPAGE_SIZE_16MB
+#define HPAGE_SHIFT		SUPERSECTION_SHIFT
+#define HPAGE_SIZE		(_AC(1, UL) << HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif

Ah, you still have these just config time options. Can you not make an hpage_shift variable like PowerPC or IA-64?

(I haven't yet reviewed the rest of the code)

Signature · 1 line
Catalin
author
#3 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 18 lines · Catalin Marinas
Quoted 17 lines · Bill Carson
arch/arm/include/asm/page.h +9 -0
index 97b440c..3e6769a 100644
@@ -15,6 +15,21 @@
  #define PAGE_SIZE		(_AC(1,UL)<<  PAGE_SHIFT)
  #define PAGE_MASK		(~(PAGE_SIZE-1))
 
+#ifdef CONFIG_HUGEPAGE_SIZE_2MB
+/* we have 2MB hugepage for two 1MB section mapping */
+#define HPAGE_SHIFT		(SECTION_SHIFT + 1)
+#define HPAGE_SIZE		(_AC(1, UL)<<  HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
+#ifdef CONFIG_HUGEPAGE_SIZE_16MB
Quoted 9 lines

arch/arm/include/asm/page.h line 31

Quoted 5 lines
arch/arm/include/asm/page.h +5 -0
+#define HPAGE_SHIFT		SUPERSECTION_SHIFT
+#define HPAGE_SIZE		(_AC(1, UL)<<  HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif

Ah, you still have these just config time options. Can you not make an hpage_shift variable like PowerPC or IA-64?

Hi, Catalin

Thank you for reviewing this patch.

unsigned int hpage_shift = SECTION_SHIFT + 1; /* default to 2MB page */ #define HPAGE_SHIFT hpage_shift

then user could configure hpage_shift through "hugepagesz" parameter. I think this is what I am supposed to do,
If so, hugepage_setup_sz/cpu_v7_set_hugepte_ext needs modification

Quoted 2 lines

(I haven't yet reviewed the rest of the code)

So, should I send another version now, or wait until you walk through the reset of patch set?

And again, thanks for the patch reviewing:)

Signature · 4 lines
I am a slow learner
but I will keep trying to fight for my dreams!

--bill
#4 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 28 lines · On Wed, Feb 29, 2012 at 02:34:34AM +0000, bill4carson wrote:
Quoted 18 lines · Catalin Marinas
Quoted 17 lines · Bill Carson
arch/arm/include/asm/page.h +9 -0
index 97b440c..3e6769a 100644
@@ -15,6 +15,21 @@
  #define PAGE_SIZE		(_AC(1,UL)<<  PAGE_SHIFT)
  #define PAGE_MASK		(~(PAGE_SIZE-1))
 
+#ifdef CONFIG_HUGEPAGE_SIZE_2MB
+/* we have 2MB hugepage for two 1MB section mapping */
+#define HPAGE_SHIFT		(SECTION_SHIFT + 1)
+#define HPAGE_SIZE		(_AC(1, UL)<<  HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
+#ifdef CONFIG_HUGEPAGE_SIZE_16MB
Quoted 8 lines

arch/arm/include/asm/page.h line 31

Quoted 5 lines
arch/arm/include/asm/page.h +5 -0
+#define HPAGE_SHIFT		SUPERSECTION_SHIFT
+#define HPAGE_SIZE		(_AC(1, UL)<<  HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif

Ah, you still have these just config time options. Can you not make an hpage_shift variable like PowerPC or IA-64?

Quoted 1 line

Thank you for reviewing this patch.

I haven't finished yet (another email to come :)).

Quoted 2 lines

unsigned int hpage_shift = SECTION_SHIFT + 1; /* default to 2MB page */ #define HPAGE_SHIFT hpage_shift

Something like that. You could even use PMD_SHIFT which is 21 already and it makes it clearer that we use huge pages at the pmd level.

Quoted 2 lines

So, should I send another version now, or wait until you walk through the reset of patch set?

Just wait, I'll have a look through all the patches.

BTW, there are several coding style issues, I won't go through them but it would help if you have a look at Documentation/CodingStyle (especially comment style, if/else brackets).

Thanks.

Signature · 1 line
Catalin
author
#5 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 29 lines · Catalin Marinas
Quoted 28 lines · On Wed, Feb 29, 2012 at 02:34:34AM +0000, bill4carson wrote:
Quoted 26 lines · Catalin Marinas
Quoted 12 lines · Bill Carson
arch/arm/include/asm/page.h +4 -0
index 97b440c..3e6769a 100644
@@ -15,6 +15,21 @@
   #define PAGE_SIZE		(_AC(1,UL)<<   PAGE_SHIFT)
   #define PAGE_MASK		(~(PAGE_SIZE-1))
 
+#ifdef CONFIG_HUGEPAGE_SIZE_2MB
+/* we have 2MB hugepage for two 1MB section mapping */
+#define HPAGE_SHIFT		(SECTION_SHIFT + 1)
+#define HPAGE_SIZE		(_AC(1, UL)<<   HPAGE_SHIFT)

arch/arm/include/asm/page.h line 31

Quoted 10 lines
arch/arm/include/asm/page.h +10 -0
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
+#ifdef CONFIG_HUGEPAGE_SIZE_16MB
+#define HPAGE_SHIFT		SUPERSECTION_SHIFT
+#define HPAGE_SIZE		(_AC(1, UL)<<   HPAGE_SHIFT)
+#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+#endif

Ah, you still have these just config time options. Can you not make an hpage_shift variable like PowerPC or IA-64?

Quoted 4 lines
Quoted 1 line

Thank you for reviewing this patch.

I haven't finished yet (another email to come :)).

I'm looking forward any comments/suggestions ^_^

Quoted 6 lines
Quoted 2 lines

unsigned int hpage_shift = SECTION_SHIFT + 1; /* default to 2MB page */ #define HPAGE_SHIFT hpage_shift

Something like that. You could even use PMD_SHIFT which is 21 already and it makes it clearer that we use huge pages at the pmd level.

OK, I will keep that in mind for V3.

Quoted 9 lines
Quoted 2 lines

So, should I send another version now, or wait until you walk through the reset of patch set?

Just wait, I'll have a look through all the patches.

BTW, there are several coding style issues, I won't go through them but it would help if you have a look at Documentation/CodingStyle (especially comment style, if/else brackets).

Yes, I forgot to run checkpatch.pl to sanitize this patch set. Will keep in mind for all next version.

thanks

Quoted 2 lines

Thanks.

Signature · 4 lines
I am a slow learner
but I will keep trying to fight for my dreams!

--bill
#6 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 6 lines · On 29 February 2012 10:21, bill4carson <[email protected]> wrote:
Quoted 3 lines · Catalin Marinas

BTW, there are several coding style issues, I won't go through them but it would help if you have a look at Documentation/CodingStyle (especially comment style, if/else brackets).

Yes, I forgot to run checkpatch.pl to sanitize this patch set.

Don't just rely on checkpatch.pl, have a look at the CodingStyle doc :)

Signature · 1 line
Catalin
#7 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

In reply to Bill Carson
Quoted 2 lines · Bill Carson
arch/arm/include/asm/hugetlb.h new file +0 -0

...

arch/arm/include/asm/hugetlb.h line 25

Quoted 2 lines
arch/arm/include/asm/hugetlb.h new file +2 -0
+#include <asm/page.h>
+#include <asm/pgtable-2level.h>

Just include asm/pgtable.h, it includes the right 2level.h file automatically (and I plan to add LPAE support as well).

Quoted 11 lines
arch/arm/include/asm/hugetlb.h new file +11 -0
+static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+				   pte_t *ptep, pte_t pte)
+{
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd;
+	pte_t *linuxpte = mm->context.huge_linux_pte;
+
+	BUG_ON(linuxpte == NULL);
+	BUG_ON(HUGE_LINUX_PTE_INDEX(addr) >= HUGE_LINUX_PTE_COUNT);
+	BUG_ON(ptep != &linuxpte[HUGE_LINUX_PTE_INDEX(addr)]);

arch/arm/include/asm/hugetlb.h line 97

Quoted 10 lines
arch/arm/include/asm/hugetlb.h new file +10 -0
+
+	/* set huge linux pte first */
+	*ptep = pte;
+	
+	/* then set hardware pte */
+	addr &= HPAGE_MASK;
+	pgd = pgd_offset(mm, addr);
+	pud = pud_offset(pgd, addr);
+	pmd = pmd_offset(pud, addr);
+	set_hugepte_at(mm, addr, pmd, pte);

You may want to add a comment here that we only have two levels of page tables (and there is no need for pud_none() checks).

Also I would say the set_hugepte_at function name is easily confused with set_huge_pte_at(), maybe change it to __set_huge_pte_at() or something else.

Quoted 8 lines
arch/arm/include/asm/hugetlb.h new file +8 -0
+static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
+					    unsigned long addr, pte_t *ptep)
+{
+	pte_t pte = *ptep;
+	pte_t fake = L_PTE_YOUNG;
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd;

arch/arm/include/asm/hugetlb.h line 117

Quoted 10 lines
arch/arm/include/asm/hugetlb.h new file +10 -0
+
+	/* clear linux pte */
+	*ptep = 0;
+
+	/* let set_hugepte_at clear HW entry */
+	addr &= HPAGE_MASK;
+	pgd = pgd_offset(mm, addr);
+	pud = pud_offset(pgd, addr);
+	pmd = pmd_offset(pud, addr);
+	set_hugepte_at(mm, addr, pmd, fake);

Same here.

arch/arm/include/asm/hugetlb.h line 147

Quoted 6 lines
arch/arm/include/asm/hugetlb.h new file +6 -0
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+					   unsigned long addr, pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
+}

You could use the generic ptep_set_wrprotect()

arch/arm/include/asm/hugetlb.h line 166

Quoted 13 lines
arch/arm/include/asm/hugetlb.h new file +13 -0
+static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
+					     unsigned long addr,
+					     pte_t *ptep, pte_t pte,
+					     int dirty)
+{
+	int changed = !pte_same(huge_ptep_get(ptep), pte);
+	if (changed) {
+		set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
+		huge_ptep_clear_flush(vma, addr, &pte);
+	}
+
+	return changed;
+}

I could also use the generic ptep_set_access_flags().

Quoted 2 lines
arch/arm/mm/hugetlb.c new file +0 -0

...

arch/arm/mm/hugetlb.c line 32

Quoted 10 lines
arch/arm/mm/hugetlb.c new file +10 -0
+pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr,
+		      unsigned long sz)
+{
+	pte_t *linuxpte = mm->context.huge_linux_pte;
+	int index;
+
+	if (linuxpte == NULL) {
+		linuxpte = kzalloc(HUGE_LINUX_PTE_SIZE, GFP_ATOMIC);
+		if (linuxpte == NULL) {
+			printk(KERN_ERR "Cannot allocate memory for huge linux pte\n");

pr_err()?

Quoted 15 lines
arch/arm/mm/hugetlb.c new file +15 -0
+			return NULL;
+		}
+		mm->context.huge_linux_pte = linuxpte;
+	}
+	/* huge page mapping only cover user space address */
+	BUG_ON(HUGE_LINUX_PTE_INDEX(addr) >= HUGE_LINUX_PTE_COUNT);
+	index = HUGE_LINUX_PTE_INDEX(addr);
+	return &linuxpte[HUGE_LINUX_PTE_INDEX(addr)];
+}
+
+pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
+{
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd = NULL;

arch/arm/mm/hugetlb.c line 57

Quoted 10 lines
arch/arm/mm/hugetlb.c new file +10 -0
+	pte_t *linuxpte = mm->context.huge_linux_pte;
+
+	/* check this mapping exist at pmd level */
+	pgd = pgd_offset(mm, addr);
+	if (pgd_present(*pgd)) {
+		pud = pud_offset(pgd, addr);
+		pmd = pmd_offset(pud, addr);
+		if (!pmd_present(*pmd))
+			return NULL;
+	}

You could add checks for the pud as well, they would be optimised out by the compiler but it would be easier to add support for LPAE as well. In my LPAE hugetlb implementation, I have something like this:

	pgd = pgd_offset(mm, addr);
	if (pgd_present(*pgd)) {
		pud = pud_offset(pgd, addr);
		if (pud_present(*pud))
			pmd = pmd_offset(pud, addr);
	}

arch/arm/mm/hugetlb.c line 61

Quoted 3 lines
arch/arm/mm/hugetlb.c new file +3 -0
+	BUG_ON(HUGE_LINUX_PTE_INDEX(addr) >= HUGE_LINUX_PTE_COUNT);
+	BUG_ON((*pmd & PMD_TYPE_MASK) != PMD_TYPE_SECT);
+	return &linuxpte[HUGE_LINUX_PTE_INDEX(addr)];

You could add a macro to make it easier for LPAE:

#define huge_pte(mm, pmd, addr)		\
	(&mm->context.huge_linux_pte(HUGE_LINUX_PTE_INDEX(addr)))

With LPAE, it would simply be a (pte_t *)pmd cast.

arch/arm/mm/hugetlb.c line 82

Quoted 3 lines
arch/arm/mm/hugetlb.c new file +3 -0
+int pud_huge(pud_t pud)
+{
+	return  0; } struct page * follow_huge_pmd(struct mm_struct *mm, unsigned long address, pmd_t *pmd, int write)

Something went wrong around here.

arch/arm/mm/hugetlb.c

Quoted 2 lines
arch/arm/mm/hugetlb.c new file +2 -0
+{
+	struct page *page = NULL;

You don't need to initialise page here.

Quoted 7 lines
arch/arm/mm/hugetlb.c new file +7 -0
+	unsigned long pfn;
+
+	BUG_ON((pmd_val(*pmd) & PMD_TYPE_MASK) != PMD_TYPE_SECT);
+	pfn = ((pmd_val(*pmd) & HPAGE_MASK) >> PAGE_SHIFT);
+	page = pfn_to_page(pfn);
+	return page;
+}

arch/arm/mm/hugetlb.c line 101

Quoted 10 lines
arch/arm/mm/hugetlb.c new file +10 -0
+
+static int __init add_huge_page_size(unsigned long long size)
+{
+	int shift = __ffs(size);
+	u32 mmfr3 = 0;
+
+	/* Check that it is a page size supported by the hardware and
+	 * that it fits within pagetable and slice limits. */
+	if (!is_power_of_2(size) || (shift != HPAGE_SHIFT))
+		return -EINVAL;

You could use get_order() instead of __ffs(), the latter just finds the first bit set.

But here you should have set hpage_shift.

Signature · 1 line
Catalin
author
#8 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 26 lines · Catalin Marinas
Quoted 2 lines · Bill Carson
arch/arm/include/asm/hugetlb.h new file +0 -0

...

arch/arm/include/asm/hugetlb.h

Quoted 2 lines
arch/arm/include/asm/hugetlb.h new file +2 -0
+#include<asm/page.h>
+#include<asm/pgtable-2level.h>

Just include asm/pgtable.h, it includes the right 2level.h file automatically (and I plan to add LPAE support as well).

Quoted 16 lines
arch/arm/include/asm/hugetlb.h new file +16 -0
+static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+				   pte_t *ptep, pte_t pte)
+{
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd;
+	pte_t *linuxpte = mm->context.huge_linux_pte;
+
+	BUG_ON(linuxpte == NULL);
+	BUG_ON(HUGE_LINUX_PTE_INDEX(addr)>= HUGE_LINUX_PTE_COUNT);
+	BUG_ON(ptep !=&linuxpte[HUGE_LINUX_PTE_INDEX(addr)]);
+
+	/* set huge linux pte first */
+	*ptep = pte;
+	
+	/* then set hardware pte */
Quoted 9 lines

arch/arm/include/asm/hugetlb.h line 97

Quoted 5 lines
arch/arm/include/asm/hugetlb.h new file +5 -0
+	addr&= HPAGE_MASK;
+	pgd = pgd_offset(mm, addr);
+	pud = pud_offset(pgd, addr);
+	pmd = pmd_offset(pud, addr);
+	set_hugepte_at(mm, addr, pmd, pte);

You may want to add a comment here that we only have two levels of page tables (and there is no need for pud_none() checks).

I will add a comment to clarify this.

Quoted 4 lines

Also I would say the set_hugepte_at function name is easily confused with set_huge_pte_at(), maybe change it to __set_huge_pte_at() or something else.

yes, I will make that change.

Quoted 21 lines
Quoted 8 lines
arch/arm/include/asm/hugetlb.h new file +8 -0
+static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
+					    unsigned long addr, pte_t *ptep)
+{
+	pte_t pte = *ptep;
+	pte_t fake = L_PTE_YOUNG;
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd;

arch/arm/include/asm/hugetlb.h line 117

Quoted 10 lines
arch/arm/include/asm/hugetlb.h new file +10 -0
+
+	/* clear linux pte */
+	*ptep = 0;
+
+	/* let set_hugepte_at clear HW entry */
+	addr&= HPAGE_MASK;
+	pgd = pgd_offset(mm, addr);
+	pud = pud_offset(pgd, addr);
+	pmd = pmd_offset(pud, addr);
+	set_hugepte_at(mm, addr, pmd, fake);

Same here.

Quoted 8 lines

arch/arm/include/asm/hugetlb.h line 147

Quoted 6 lines
arch/arm/include/asm/hugetlb.h new file +6 -0
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+					   unsigned long addr, pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
+}

You could use the generic ptep_set_wrprotect()

I'm a bit of confused about this.

generic ptep_set_wrprotect() can not set huge pte, that's why set_huge_pte_at is used instead here.

Quoted 16 lines
Quoted 4 lines
arch/arm/include/asm/hugetlb.h new file +3 -0
+static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
+					     unsigned long addr,
+					     pte_t *ptep, pte_t pte,

arch/arm/include/asm/hugetlb.h line 166

Quoted 10 lines
arch/arm/include/asm/hugetlb.h new file +10 -0
+					     int dirty)
+{
+	int changed = !pte_same(huge_ptep_get(ptep), pte);
+	if (changed) {
+		set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
+		huge_ptep_clear_flush(vma, addr,&pte);
+	}
+
+	return changed;
+}

I could also use the generic ptep_set_access_flags().

Same as above.

IMHO, cannot use generic hooks here, cause we are setting huge pte with a different set pte API than set_pte_at.

Quoted 4 lines
Quoted 3 lines
arch/arm/mm/hugetlb.c new file +0 -0

...

Quoted 12 lines

arch/arm/mm/hugetlb.c line 32

Quoted 10 lines
arch/arm/mm/hugetlb.c new file +10 -0
+pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr,
+		      unsigned long sz)
+{
+	pte_t *linuxpte = mm->context.huge_linux_pte;
+	int index;
+
+	if (linuxpte == NULL) {
+		linuxpte = kzalloc(HUGE_LINUX_PTE_SIZE, GFP_ATOMIC);
+		if (linuxpte == NULL) {
+			printk(KERN_ERR "Cannot allocate memory for huge linux pte\n");

pr_err()?

Yes, pr_err should be used in here.
thanks

Quoted 31 lines
Quoted 16 lines
arch/arm/mm/hugetlb.c new file +15 -0
+			return NULL;
+		}
+		mm->context.huge_linux_pte = linuxpte;
+	}
+	/* huge page mapping only cover user space address */
+	BUG_ON(HUGE_LINUX_PTE_INDEX(addr)>= HUGE_LINUX_PTE_COUNT);
+	index = HUGE_LINUX_PTE_INDEX(addr);
+	return&linuxpte[HUGE_LINUX_PTE_INDEX(addr)];
+}
+
+pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
+{
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd = NULL;

arch/arm/mm/hugetlb.c line 57

Quoted 10 lines
arch/arm/mm/hugetlb.c new file +10 -0
+	pte_t *linuxpte = mm->context.huge_linux_pte;
+
+	/* check this mapping exist at pmd level */
+	pgd = pgd_offset(mm, addr);
+	if (pgd_present(*pgd)) {
+		pud = pud_offset(pgd, addr);
+		pmd = pmd_offset(pud, addr);
+		if (!pmd_present(*pmd))
+			return NULL;
+	}

You could add checks for the pud as well, they would be optimised out by the compiler but it would be easier to add support for LPAE as well. In my LPAE hugetlb implementation, I have something like this:

Quoted 7 lines
	pgd = pgd_offset(mm, addr);
	if (pgd_present(*pgd)) {
		pud = pud_offset(pgd, addr);
		if (pud_present(*pud))
			pmd = pmd_offset(pud, addr);
	}

Ok, I will add the pud checks as per your comment.

Quoted 9 lines

arch/arm/mm/hugetlb.c

Quoted 3 lines
arch/arm/mm/hugetlb.c new file +3 -0
+	BUG_ON(HUGE_LINUX_PTE_INDEX(addr)>= HUGE_LINUX_PTE_COUNT);
+	BUG_ON((*pmd&  PMD_TYPE_MASK) != PMD_TYPE_SECT);
+	return&linuxpte[HUGE_LINUX_PTE_INDEX(addr)];

You could add a macro to make it easier for LPAE:

#define huge_pte(mm, pmd, addr)		\
	(&mm->context.huge_linux_pte(HUGE_LINUX_PTE_INDEX(addr)))

Nice, I will keep this in V3.

Quoted 8 lines

With LPAE, it would simply be a (pte_t *)pmd cast.

arch/arm/mm/hugetlb.c line 82

Quoted 3 lines
arch/arm/mm/hugetlb.c new file +3 -0
+int pud_huge(pud_t pud)
+{
+	return  0; } struct page * follow_huge_pmd(struct mm_struct *mm, unsigned long address, pmd_t *pmd, int write)

Something went wrong around here.

crap! I will make it cleaner next time. I promise!

Quoted 4 lines

arch/arm/mm/hugetlb.c

Quoted 2 lines
arch/arm/mm/hugetlb.c new file +2 -0
+{
+	struct page *page = NULL;

You don't need to initialise page here.

OK, I will drop the "NULL".

Quoted 13 lines
Quoted 13 lines
arch/arm/mm/hugetlb.c new file +12 -0
+	unsigned long pfn;
+
+	BUG_ON((pmd_val(*pmd)&  PMD_TYPE_MASK) != PMD_TYPE_SECT);
+	pfn = ((pmd_val(*pmd)&  HPAGE_MASK)>>  PAGE_SHIFT);
+	page = pfn_to_page(pfn);
+	return page;
+}
+
+static int __init add_huge_page_size(unsigned long long size)
+{
+	int shift = __ffs(size);
+	u32 mmfr3 = 0;
Quoted 8 lines

arch/arm/mm/hugetlb.c line 101

Quoted 5 lines
arch/arm/mm/hugetlb.c new file +5 -0
+
+	/* Check that it is a page size supported by the hardware and
+	 * that it fits within pagetable and slice limits. */
+	if (!is_power_of_2(size) || (shift != HPAGE_SHIFT))
+		return -EINVAL;

You could use get_order() instead of __ffs(), the latter just finds the first bit set.

With all due respect, I'm afraid I can't agree with you on this. here, we should use __ffs to return this "shift" not the order.

For "hugepagesz=2M", hpage_shift/HPAGE_SHIFT should be set to 21, *not* the order 9(21-12), that's what HUGETLB_PAGE_ORDER for.

Quoted 3 lines

But here you should have set hpage_shift.

Signature · 4 lines
I am a slow learner
but I will keep trying to fight for my dreams!

--bill
#9 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 15 lines · On Wed, Feb 29, 2012 at 11:28:30AM +0000, bill4carson wrote:
Quoted 13 lines · Catalin Marinas

arch/arm/mm/hugetlb.c line 101

Quoted 9 lines · Bill Carson
arch/arm/mm/hugetlb.c new file +9 -0
+static int __init add_huge_page_size(unsigned long long size)
+{
+	int shift = __ffs(size);
+	u32 mmfr3 = 0;
+
+	/* Check that it is a page size supported by the hardware and
+	 * that it fits within pagetable and slice limits. */
+	if (!is_power_of_2(size) || (shift != HPAGE_SHIFT))
+		return -EINVAL;

You could use get_order() instead of __ffs(), the latter just finds the first bit set.

Quoted 5 lines

With all due respect, I'm afraid I can't agree with you on this. here, we should use __ffs to return this "shift" not the order.

For "hugepagesz=2M", hpage_shift/HPAGE_SHIFT should be set to 21, *not* the order 9(21-12), that's what HUGETLB_PAGE_ORDER for.

I agree (I got confused by get_order() and log2()).

Signature · 1 line
Catalin
#10 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

In reply to bill4carson
Quoted 11 lines · On Wed, Feb 29, 2012 at 11:28:30AM +0000, bill4carson wrote:
Quoted 9 lines · Catalin Marinas

arch/arm/include/asm/hugetlb.h line 147

Quoted 6 lines · Bill Carson
arch/arm/include/asm/hugetlb.h new file +6 -0
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+					   unsigned long addr, pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
+}

You could use the generic ptep_set_wrprotect()

Quoted 4 lines

I'm a bit of confused about this.

generic ptep_set_wrprotect() can not set huge pte, that's why set_huge_pte_at is used instead here.

Ah, the generic one can only work with with LPAE where set_huge_pte_at() is just a set_pte_at(). So this part looks good.

Signature · 1 line
Catalin
author
#11 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 12 lines · Catalin Marinas
Quoted 11 lines · On Wed, Feb 29, 2012 at 11:28:30AM +0000, bill4carson wrote:
Quoted 9 lines · Catalin Marinas

arch/arm/include/asm/hugetlb.h line 147

Quoted 6 lines · Bill Carson
arch/arm/include/asm/hugetlb.h new file +6 -0
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+					   unsigned long addr, pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
+}

You could use the generic ptep_set_wrprotect()

Quoted 8 lines
Quoted 4 lines

I'm a bit of confused about this.

generic ptep_set_wrprotect() can not set huge pte, that's why set_huge_pte_at is used instead here.

Ah, the generic one can only work with with LPAE where set_huge_pte_at() is just a set_pte_at(). So this part looks good.

Hi, Catalin

Thanks for your time to review PATCH1/7 :)

I'm wondering if reset of this patch set is ok, I would like to start working on V3 as per your comments.

Signature · 4 lines
I am a slow learner
but I will keep trying to fight for my dreams!

--bill
#12 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 18 lines · On Thu, Mar 08, 2012 at 12:35:36AM +0000, bill4carson wrote:
Quoted 17 lines · Catalin Marinas
Quoted 15 lines · On Wed, Feb 29, 2012 at 11:28:30AM +0000, bill4carson wrote:
Quoted 9 lines · Catalin Marinas

arch/arm/include/asm/hugetlb.h line 147

Quoted 6 lines · Bill Carson
arch/arm/include/asm/hugetlb.h new file +6 -0
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+					   unsigned long addr, pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
+}

You could use the generic ptep_set_wrprotect()

I'm a bit of confused about this.

generic ptep_set_wrprotect() can not set huge pte, that's why set_huge_pte_at is used instead here.

Quoted 7 lines
Quoted 2 lines

Ah, the generic one can only work with with LPAE where set_huge_pte_at() is just a set_pte_at(). So this part looks good.

Thanks for your time to review PATCH1/7 :)

I'm wondering if reset of this patch set is ok, I would like to start working on V3 as per your comments.

I haven't finished looking through the patches. Probably I will by the end of this week.

Signature · 1 line
Catalin
#13 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

In reply to Bill Carson

arch/arm/include/asm/hugetlb.h line 34

Quoted 7 lines · Bill Carson
arch/arm/include/asm/hugetlb.h new file +7 -0
+
+/* 2M and 16M hugepage linux ptes are stored in mmu_context_t->huge_linux_pte
+ *
+ * 2M hugepage
+ * ===========
+ * one huge linux pte caters to two HW ptes,
+ *

I think this needs more explanation. Why do you use a 2MB hugepage with two ptes here? Wouldn't it be more logical to use 1MB hugepages?

Arnd

#14 lore raw

PATCH 1/7 Add various hugetlb arm high level hooks

Quoted 11 lines · Arnd Bergmann

arch/arm/include/asm/hugetlb.h line 34

Quoted 7 lines · Bill Carson
arch/arm/include/asm/hugetlb.h new file +7 -0
+
+/* 2M and 16M hugepage linux ptes are stored in mmu_context_t->huge_linux_pte
+ *
+ * 2M hugepage
+ * ===========
+ * one huge linux pte caters to two HW ptes,
+ *

I think this needs more explanation. Why do you use a 2MB hugepage with two ptes here? Wouldn't it be more logical to use 1MB hugepages?

That's because how pgd_t is defined for the classic MMU (PMD_SHIFT also being 21). I think Bill explained in the first series of the patch why using 1MB for huge pages doesn't go that well. But I agree, the explanation should go in here as well.

Signature · 1 line
Catalin
author
#15 lore raw

PATCH 2/7 Add various hugetlb page table fix

In reply to Bill Carson
Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/include/asm/pgtable-2level.h |    3 +++
 arch/arm/include/asm/pgtable.h        |    9 +++++++++
 2 files changed, 12 insertions(+), 0 deletions(-)
arch/arm/include/asm/pgtable-2level.h +3 -0
index 2317a71..031c50e 100644
@@ -178,6 +178,9 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
 #define pmd_addr_end(addr,end) (end)
 
 #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
+#ifdef CONFIG_ARM_HUGETLB_SUPPORT
+#define set_hugepte_ext(ptep,pte,ext) cpu_set_hugepte_ext(ptep,pte,ext)
+#endif
 
 #endif /* __ASSEMBLY__ */
arch/arm/include/asm/pgtable.h +9 -0
index f66626d..a119ac6 100644
@@ -213,6 +213,14 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 		set_pte_ext(ptep, pteval, PTE_EXT_NG);
 	}
 }
+#ifdef CONFIG_ARM_HUGETLB_SUPPORT
+static inline void set_hugepte_at(struct mm_struct *mm, unsigned long addr,
+			      pte_t *ptep, pte_t pteval)
+{
+	__sync_icache_dcache(pteval);
+	set_hugepte_ext(ptep, pteval, PTE_EXT_NG);
+}
+#endif
 
 #define pte_none(pte)		(!pte_val(pte))
 #define pte_present(pte)	(pte_val(pte) & L_PTE_PRESENT)

@@ -236,6 +244,7 @@ PTE_BIT_FUNC(mkdirty,   |= L_PTE_DIRTY);
 PTE_BIT_FUNC(mkold,     &= ~L_PTE_YOUNG);
 PTE_BIT_FUNC(mkyoung,   |= L_PTE_YOUNG);
 
+static inline pte_t pte_mkhuge(pte_t pte) { return pte; }
 static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
 
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
Signature · 1 line
1.7.1
#16 lore raw

PATCH 2/7 Add various hugetlb page table fix

arch/arm/include/asm/pgtable.h PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY); · line 247

Quoted 7 lines · Bill Carson
arch/arm/include/asm/pgtable.h +1 -0
@@ -236,6 +244,7 @@ PTE_BIT_FUNC(mkdirty,   |= L_PTE_DIRTY);
 PTE_BIT_FUNC(mkold,     &= ~L_PTE_YOUNG);
 PTE_BIT_FUNC(mkyoung,   |= L_PTE_YOUNG);
 
+static inline pte_t pte_mkhuge(pte_t pte) { return pte; }

Do we need to set the PMD_TYPE_SECT here or you just do it via set_huge_pte()?

Signature · 1 line
Catalin
author
#17 lore raw

PATCH 3/7 Introduce set_hugepte_ext api to setup huge hardware pmds

In reply to Bill Carson
Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/include/asm/glue-proc.h |    3 +
 arch/arm/include/asm/proc-fns.h  |    3 +
 arch/arm/mm/proc-v7-2level.S     |   87 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 93 insertions(+), 0 deletions(-)
arch/arm/include/asm/glue-proc.h +3 -0
index e2be7f1..2bbd452 100644
@@ -256,6 +256,9 @@
 #define cpu_dcache_clean_area		__glue(CPU_NAME,_dcache_clean_area)
 #define cpu_do_switch_mm		__glue(CPU_NAME,_switch_mm)
 #define cpu_set_pte_ext			__glue(CPU_NAME,_set_pte_ext)
+#ifdef CONFIG_ARM_HUGETLB_SUPPORT
+#define cpu_set_hugepte_ext		__glue(CPU_NAME,_set_hugepte_ext)
+#endif
 #define cpu_suspend_size		__glue(CPU_NAME,_suspend_size)
 #define cpu_do_suspend			__glue(CPU_NAME,_do_suspend)
 #define cpu_do_resume			__glue(CPU_NAME,_do_resume)
arch/arm/include/asm/proc-fns.h +3 -0
index f3628fb..75bd755 100644
@@ -87,6 +87,9 @@ extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
 extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte);
 #else
 extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
+#ifdef CONFIG_ARM_HUGETLB_SUPPORT
+extern void cpu_set_hugepte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
+#endif
 #endif
 extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
arch/arm/mm/proc-v7-2level.S +87 -0

93 lines not on this page · raw message

Signature · 1 line
1.7.1
author
#18 lore raw

PATCH 4/7 Store huge page linux pte in mmu_context_t

In reply to Bill Carson
Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/include/asm/mmu.h |    4 ++++
 arch/arm/mm/pgd.c          |   11 +++++++++++
 2 files changed, 15 insertions(+), 0 deletions(-)
arch/arm/include/asm/mmu.h +4 -0
index 1496565..579bf82 100644
@@ -9,6 +9,10 @@ typedef struct {
 	raw_spinlock_t id_lock;
 #endif
 	unsigned int kvm_seq;
+#ifdef CONFIG_ARM_HUGETLB_SUPPORT
+	/* we place hugepage linux pte at mm_struct.context  */
+	pte_t *huge_linux_pte;
+#endif
 } mm_context_t;
 
 #ifdef CONFIG_CPU_HAS_ASID
arch/arm/mm/pgd.c +11 -0
index a3e78cc..895bb3f 100644
@@ -91,6 +91,12 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
 		pte_unmap(new_pte);
 	}
 
+#ifdef CONFIG_ARM_HUGETLB_SUPPORT
+	/* reset the hugepage linux pte pointer
+	 * for new mm_struct when we do the fork
+	 */
+	mm->context.huge_linux_pte = NULL;
+#endif
 	return new_pgd;
 
 no_pte:

@@ -135,6 +141,11 @@ no_pud:
 	pgd_clear(pgd);
 	pud_free(mm, pud);
 no_pgd:
+#ifdef CONFIG_ARM_HUGETLB_SUPPORT
+	/* free huge linux pte table */
+	if (mm->context.huge_linux_pte != NULL)
+		kfree(mm->context.huge_linux_pte);
+#endif
 #ifdef CONFIG_ARM_LPAE
 	/*
 	 * Free modules/pkmap or identity pmd tables.
Signature · 1 line
1.7.1
author
#19 lore raw

PATCH 5/7 Using do_page_fault for section fault handling

In reply to Bill Carson
Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/mm/fault.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)
arch/arm/mm/fault.c +15 -0
index bb7eac3..af6703d 100644
@@ -19,6 +19,7 @@
 #include <linux/sched.h>
 #include <linux/highmem.h>
 #include <linux/perf_event.h>
+#include <linux/hugetlb.h>
 
 #include <asm/exception.h>
 #include <asm/system.h>

@@ -485,6 +486,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
 }
 #endif					/* CONFIG_MMU */
 
+#ifndef CONFIG_ARM_HUGETLB_SUPPORT
 /*
  * Some section permission faults need to be handled gracefully.
  * They can happen due to a __{get,put}_user during an oops.

@@ -496,6 +498,19 @@ do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 	return 0;
 }
 
+#else
+
+/* Since normal 4K page based vma will never fault into section traps,
+ * This will enable us to use do_page_fault for section permission fault.
+ */
+static int
+do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
+{
+	do_page_fault(addr, fsr, regs);
+	return 0;
+}
+#endif
+
 /*
  * This abort handler always returns "fault".
  */
Signature · 1 line
1.7.1
author
#20 lore raw

PATCH 6/7 Add hugetlb Kconfig option

In reply to Bill Carson
Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/Kconfig |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)
arch/arm/Kconfig +29 -0
index a48aecc..161bca6 100644
@@ -985,6 +985,35 @@ config ARCH_ZYNQ
 	  Support for Xilinx Zynq ARM Cortex A9 Platform
 endchoice
 
+config SYS_SUPPORTS_HUGETLBFS
+		def_bool n
+
+config ARM_HUGETLB_SUPPORT
+	bool "Support HUGETLB for ARMv7 (EXPERIMENTAL)"
+	depends on CPU_V7 && EXPERIMENTAL
+	select SYS_SUPPORTS_HUGETLBFS
+	select HUGETLBFS
+	default y
+
+choice
+	prompt "Huge Page Size"
+	depends on ARM_HUGETLB_SUPPORT
+	default HUGEPAGE_SIZE_2MB
+
+config HUGEPAGE_SIZE_2MB
+	bool "2MB"
+	depends on ARM_HUGETLB_SUPPORT
+	help
+	 This option select huge page size in 2MB units
+
+config HUGEPAGE_SIZE_16MB
+	bool "16MB"
+	depends on ARM_HUGETLB_SUPPORT
+	help
+	  This option select huge page size in 16MB units
+
+endchoice
+
 #
 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 # Kconfigs may be included either alphabetically (according to the
Signature · 1 line
1.7.1
#21 lore raw

PATCH 6/7 Add hugetlb Kconfig option

Hello.

Quoted 10 lines · Bill Carson
Signed-off-by Bill Carson<[email protected]>
---
  arch/arm/Kconfig |   29 +++++++++++++++++++++++++++++
  1 files changed, 29 insertions(+), 0 deletions(-)
arch/arm/Kconfig +0 -0
index a48aecc..161bca6 100644

arch/arm/Kconfig config ARCH_ZYNQ · line 989

Quoted 5 lines
arch/arm/Kconfig +2 -0
@@ -985,6 +985,35 @@ config ARCH_ZYNQ
  	  Support for Xilinx Zynq ARM Cortex A9 Platform
  endchoice
 
+config SYS_SUPPORTS_HUGETLBFS
+		def_bool n

This is probably overindented.

WBR, Sergei

author
#22 lore raw

PATCH 6/7 Add hugetlb Kconfig option

Quoted 17 lines · Sergei Shtylyov

Hello.

Quoted 13 lines · Bill Carson
Signed-off-by Bill Carson<[email protected]>

---
arch/arm/Kconfig | 29 +++++++++++++++++++++++++++++

1 files changed, 29 insertions(+), 0 deletions(-)
arch/arm/Kconfig +0 -0
index a48aecc..161bca6 100644
@@ -985,6 +985,35 @@ config ARCH_ZYNQ

Support for Xilinx Zynq ARM Cortex A9 Platform
endchoice

Quoted 5 lines
Quoted 2 lines

+config SYS_SUPPORTS_HUGETLBFS
+ def_bool n

This is probably overindented.

Hi, Sergei

Thanks for your point :)

I'm sure there are other coding style issues like this, I'll pay attention to it in the next review round.

Quoted 2 lines

WBR, Sergei

Signature · 4 lines
I am a slow learner
but I will keep trying to fight for my dreams!

--bill
author
#23 lore raw

PATCH 7/7 Minor compiling fix

In reply to Bill Carson
Signed-off-by Bill Carson <[email protected]>
---
 arch/arm/mm/Makefile      |    1 +
 arch/arm/mm/dma-mapping.c |    3 ---
 2 files changed, 1 insertions(+), 3 deletions(-)
arch/arm/mm/Makefile +1 -0
index bca7e61..9348e1e 100644
@@ -99,4 +99,5 @@ AFLAGS_proc-v7.o	:=-Wa,-march=armv7-a
 obj-$(CONFIG_CACHE_FEROCEON_L2)	+= cache-feroceon-l2.o
 obj-$(CONFIG_CACHE_L2X0)	+= cache-l2x0.o
 obj-$(CONFIG_CACHE_XSC3L2)	+= cache-xsc3l2.o
+obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlb.o
 obj-$(CONFIG_CACHE_TAUROS2)	+= cache-tauros2.o
arch/arm/mm/dma-mapping.c +0 -3
index 1aa664a..8dc5fb4 100644
@@ -152,9 +152,6 @@ static struct arm_vmregion_head consistent_head = {
 	.vm_end		= CONSISTENT_END,
 };
 
-#ifdef CONFIG_HUGETLB_PAGE
-#error ARM Coherent DMA allocator does not (yet) support huge TLB
-#endif
 
 /*
  * Initialise the consistent memory allocation.
Signature · 1 line
1.7.1
#24 lore raw

PATCH 7/7 Minor compiling fix

arch/arm/mm/dma-mapping.c static struct arm_vmregion_head consistent_head = { · line 157

Quoted 9 lines · Bill Carson
arch/arm/mm/dma-mapping.c +0 -3
@@ -152,9 +152,6 @@ static struct arm_vmregion_head consistent_head = {
        .vm_end         = CONSISTENT_END,
 };
 
-#ifdef CONFIG_HUGETLB_PAGE
-#error ARM Coherent DMA allocator does not (yet) support huge TLB
-#endif

This one needs an explanation, too. What has changed that now allows dma_alloc_coherent to work with CONFIG_HUGETLB_PAGE set that did not work before?

In general, please add a description with each patch you send, following the instructions in Documentation/SubmittingPatches.

Arnd

author
#25 lore raw

PATCH 7/7 Minor compiling fix

Quoted 7 lines · Arnd Bergmann
Quoted 6 lines · Bill Carson
arch/arm/mm/dma-mapping.c +0 -0
@@ -152,9 +152,6 @@ static struct arm_vmregion_head consistent_head = {
         .vm_end         = CONSISTENT_END,
  };
Quoted 8 lines

arch/arm/mm/dma-mapping.c static struct arm_vmregion_head consistent_head = { · line 157

Quoted 3 lines
arch/arm/mm/dma-mapping.c +0 -3
-#ifdef CONFIG_HUGETLB_PAGE
-#error ARM Coherent DMA allocator does not (yet) support huge TLB
-#endif

This one needs an explanation, too. What has changed that now allows dma_alloc_coherent to work with CONFIG_HUGETLB_PAGE set that did not work before?

AFAIK, __dma_alloc has the finest granularity at 4k page size even when user requests 1M bytes memory.

but current hugetlb low level set_hugepte_at *ONLY*/*MUST* support 2M page mapping, so it can't be used to create huge dma mapping in a more general way.

comments this error out doesn't mean that it could support huge page dma mapping now with this patch, just shut up gcc when compiling.

Adding a single low level hook to create 1M page mapping can satisfy the needs, but apparently that's out of hugetlb scope. And it's on my TODO list :)

Quoted 3 lines

In general, please add a description with each patch you send, following the instructions in Documentation/SubmittingPatches.

Thanks, I will follow the rules.

Quoted 2 lines

Arnd

Signature · 4 lines
I am a slow learner
but I will keep trying to fight for my dreams!

--bill
#26 lore raw

PATCH 7/7 Minor compiling fix

Quoted 24 lines · On Thursday 01 March 2012, bill4carson wrote:
Quoted 7 lines · Arnd Bergmann
Quoted 6 lines · Bill Carson
arch/arm/mm/dma-mapping.c +0 -0
@@ -152,9 +152,6 @@ static struct arm_vmregion_head consistent_head = {
         .vm_end         = CONSISTENT_END,
  };
Quoted 8 lines

arch/arm/mm/dma-mapping.c static struct arm_vmregion_head consistent_head = { · line 157

Quoted 3 lines
arch/arm/mm/dma-mapping.c +0 -3
-#ifdef CONFIG_HUGETLB_PAGE
-#error ARM Coherent DMA allocator does not (yet) support huge TLB
-#endif

This one needs an explanation, too. What has changed that now allows dma_alloc_coherent to work with CONFIG_HUGETLB_PAGE set that did not work before?

AFAIK, __dma_alloc has the finest granularity at 4k page size even when user requests 1M bytes memory.

but current hugetlb low level set_hugepte_at *ONLY*/*MUST* support 2M page mapping, so it can't be used to create huge dma mapping in a more general way.

Quoted 6 lines

comments this error out doesn't mean that it could support huge page dma mapping now with this patch, just shut up gcc when compiling.

Adding a single low level hook to create 1M page mapping can satisfy the needs, but apparently that's out of hugetlb scope. And it's on my TODO list :)

Hmm, I'm still not sure I'm following. The coherent DMA area is currently limited to 2MB or a small multiple of that, so you would not be able to allocate coherent hugepages anyway.

Further, I don't think there are any device drivers that call dma_alloc_coherent and expect to map the resulting page into user space, or that we even have an interface for that.

This entire chunk of code is also getting changed with the addition of CMA.

Arnd

author
#27 lore raw

PATCH 7/7 Minor compiling fix

2012/3/1 Arnd Bergmann <[email protected]>

Quoted 33 lines · On Thursday 01 March 2012, bill4carson wrote:
Quoted 24 lines · Arnd Bergmann
Quoted 7 lines · Bill Carson
Quoted 6 lines
arch/arm/mm/dma-mapping.c +0 -0
@@ -152,9 +152,6 @@ static struct arm_vmregion_head consistent_head = {
         .vm_end         = CONSISTENT_END,
  };
Quoted 8 lines

arch/arm/mm/dma-mapping.c static struct arm_vmregion_head consistent_head = { · line 157

Quoted 3 lines
arch/arm/mm/dma-mapping.c +0 -3
-#ifdef CONFIG_HUGETLB_PAGE
-#error ARM Coherent DMA allocator does not (yet) support huge TLB
-#endif

This one needs an explanation, too. What has changed that now allows dma_alloc_coherent to work with CONFIG_HUGETLB_PAGE set that did not work before?

AFAIK, __dma_alloc has the finest granularity at 4k page size even when user requests 1M bytes memory.

but current hugetlb low level set_hugepte_at *ONLY*/*MUST* support 2M page mapping, so it can't be used to create huge dma mapping in a more general way.

Quoted 6 lines

comments this error out doesn't mean that it could support huge page dma mapping now with this patch, just shut up gcc when compiling.

Adding a single low level hook to create 1M page mapping can satisfy the needs, but apparently that's out of hugetlb scope. And it's on my TODO list :)

Quoted 9 lines

Hmm, I'm still not sure I'm following. The coherent DMA area is currently limited to 2MB or a small multiple of that, so you would not be able to allocate coherent hugepages anyway.

Further, I don't think there are any device drivers that call dma_alloc_coherent and expect to map the resulting page into user space, or that we even have an interface for that.

This "ifdef" is used to remind dma implementation should use hugetlb low API to set up huge page mappings one day hugetlb is supported, just it!

For now, I don't see any direct relationship dma alloc has to do with hugetlb in a more general way other than both could share low level page table management.

Quoted 3 lines

This entire chunk of code is also getting changed with the addition of CMA.

Arnd